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公开(公告)号：US20080290459A1
公开(公告)日：2008-11-27
申请号：US12182901
申请日：2008-07-30
IPC分类号： H01L29/92
CPC分类号： H01L28/40 , H01L21/28568 , H01L21/31604 , H01L21/31616 , H01L21/3185 , H01L27/0805 , H01L28/55 , H01L28/75
摘要： A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bottom plate. The insulating layer is patterned with a MIM capacitor top plate pattern, and a MIM dielectric material is deposited over the patterned insulating layer. A conductive material is deposited over the MIM dielectric material, and the wafer is planarized to remove the conductive material and MIM dielectric material from the top surface of the insulating layer and form a MIM capacitor top plate. A second cap layer is selectively formed over the MIM capacitor top plate.
摘要翻译： 一种用于形成MIM电容器的方法和由其形成的MIM电容器器件。 优选实施例包括在包括MIM电容器底板的晶片上选择性地形成第一盖层，以及在MIM电容器底板上沉积绝缘层。 用MIM电容器顶板图案对绝缘层进行构图，并且在图案化绝缘层上沉积MIM电介质材料。 在MIM介电材料上沉积导电材料，并且平坦化晶片以从绝缘层的顶表面去除导电材料和MIM电介质材料，并形成MIM电容器顶板。 在MIM电容器顶板上选择性地形成第二盖层。
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公开(公告)号：US06949442B2
公开(公告)日：2005-09-27
申请号：US10429469
申请日：2003-05-05
IPC分类号： H01L21/02 , H01L21/285 , H01L21/316 , H01L21/318 , H01L27/08 , H01L21/20
CPC分类号： H01L28/40 , H01L21/28568 , H01L21/31604 , H01L21/31616 , H01L21/3185 , H01L27/0805 , H01L28/55 , H01L28/75
摘要： A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bottom plate. The insulating layer is patterned with a MIM capacitor top plate pattern, and a MIM dielectric material is deposited over the patterned insulating layer. A conductive material is deposited over the MIM dielectric material, and the wafer is planarized to remove the conductive material and MIM dielectric material from the top surface of the insulating layer and form a MIM capacitor top plate. A second cap layer is selectively formed over the MIM capacitor top plate.
摘要翻译： 一种用于形成MIM电容器的方法和由其形成的MIM电容器器件。 优选实施例包括在包括MIM电容器底板的晶片上选择性地形成第一盖层，以及在MIM电容器底板上沉积绝缘层。 用MIM电容器顶板图案对绝缘层进行构图，并且在图案化绝缘层上沉积MIM电介质材料。 在MIM介电材料上沉积导电材料，并且平坦化晶片以从绝缘层的顶表面去除导电材料和MIM电介质材料，并形成MIM电容器顶板。 在MIM电容器顶板上选择性地形成第二盖层。
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公开(公告)号：US07843035B2
公开(公告)日：2010-11-30
申请号：US12182901
申请日：2008-07-30
IPC分类号： H01L29/00
CPC分类号： H01L28/40 , H01L21/28568 , H01L21/31604 , H01L21/31616 , H01L21/3185 , H01L27/0805 , H01L28/55 , H01L28/75
摘要： An embodiment of a MIM capacitor includes a first insulating layer formed over a wafer and a first capacitor plate formed over the wafer within the first insulating layer. The MIM capacitor further includes a second insulating layer formed over the first insulating layer, a capacitor dielectric formed over the first capacitor plate within the second insulating layer and a second capacitor plate formed over the capacitor dielectric within the second insulating layer. A recess is formed in the second capacitor plate below an upper surface of the second insulating layer and a catalytic activation layer is formed in the recess.
摘要翻译： MIM电容器的一个实施例包括形成在晶片上的第一绝缘层和形成在第一绝缘层内的晶片之上的第一电容器板。 MIM电容器还包括形成在第一绝缘层上的第二绝缘层，形成在第二绝缘层内的第一电容器板上的电容器电介质和形成在第二绝缘层内的电容器电介质上的第二电容器板。 在第二电容器板的第二绝缘层的上表面下方形成有凹部，在凹部形成催化活化层。
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公开(公告)号：US07436016B2
公开(公告)日：2008-10-14
申请号：US11210094
申请日：2005-08-23
IPC分类号： H01L27/108
CPC分类号： H01L28/40 , H01L21/28568 , H01L21/31604 , H01L21/31616 , H01L21/3185 , H01L27/0805 , H01L28/55 , H01L28/75
摘要： A method for forming a MIM capacitor and a MIM capacitor device formed by same. A preferred embodiment comprises selectively forming a first cap layer over a wafer including a MIM capacitor bottom plate, and depositing an insulating layer over the MIM capacitor bottom plate. The insulating layer is patterned with a MIM capacitor top plate pattern, and a MIM dielectric material is deposited over the patterned insulating layer. A conductive material is deposited over the MIM dielectric material, and the wafer is planarized to remove the conductive material and MIM dielectric material from the top surface of the insulating layer and form a MIM capacitor top plate. A second cap layer is selectively formed over the MIM capacitor top plate.
摘要翻译： 一种用于形成MIM电容器的方法和由其形成的MIM电容器器件。 优选实施例包括在包括MIM电容器底板的晶片上选择性地形成第一盖层，以及在MIM电容器底板上沉积绝缘层。 用MIM电容器顶板图案对绝缘层进行构图，并且在图案化绝缘层上沉积MIM电介质材料。 在MIM介电材料上沉积导电材料，并且平坦化晶片以从绝缘层的顶表面去除导电材料和MIM电介质材料，并形成MIM电容器顶板。 在MIM电容器顶板上选择性地形成第二盖层。
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公开(公告)号：US06960835B2
公开(公告)日：2005-11-01
申请号：US10698057
申请日：2003-10-30
IPC分类号： H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/532 , H01L29/00
CPC分类号： H01L23/5329 , H01L21/76801 , H01L21/76829 , H01L21/76835 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： In a semiconductor integrated circuit device, thermo-mechanical stresses on the vias can be reduced by introducing a stress relief layer between the vias and a hard dielectric layer that overlies the vias.
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公开(公告)号：US06559042B2
公开(公告)日：2003-05-06
申请号：US09894337
申请日：2001-06-28
IPC分类号： H01L213205
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： A process for forming fusible links in an integrated circuit includes forming the fusible link in the last metallization layer. The process can be employed in the fabrication of integrated circuits employing copper metallization and low k dielectric materials. The fusible link is formed in the last metallization layer and may be formed simultaneously with the bonding pad areas.
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公开(公告)号：US06872648B2
公开(公告)日：2005-03-29
申请号：US10246999
申请日：2002-09-19
IPC分类号： H01L23/525 , H01L21/71
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and, therefore, can be created in the same fabrication step.
摘要翻译： 使用激光器吹动未激活的电熔丝（例如，熔丝405）的行为可能导致熔丝材料的飞溅并导致电气短路。 形成在由激光器熔断的熔丝区域周围形成的防爆屏障（例如鼓风屏障406）有助于容纳熔丝材料的飞溅。 防爆屏障可以由与熔丝本身相同的材料形成，因此可以在相同的制造步骤中形成。
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公开(公告)号：US06750113B2
公开(公告)日：2004-06-15
申请号：US09764832
申请日：2001-01-17
申请人： Michael D. Armacost , Andreas K. Augustin , Gerald R. Friese , John E. Heidenreich, III , Gary R. Hueckel , Kenneth J. Stein
发明人： Michael D. Armacost , Andreas K. Augustin , Gerald R. Friese , John E. Heidenreich, III , Gary R. Hueckel , Kenneth J. Stein
IPC分类号： H01L2120
CPC分类号： H01L28/40 , H01L21/31116 , H01L21/32136 , H01L21/76802 , H01L21/76816 , H01L23/5223 , H01L28/75 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A parallel plate capacitor in copper technology is formed in an area that has no copper below it (within 0.3 &mgr;m) with a bottom etch stop layer, a composite bottom plate having an aluminum layer below a TiN layer, an oxide capacitor dielectric, and a top plate of TiN; in a process that involves etching the top plate to leave a capacitor area, etching the bottom plate to a larger bottom area having a margin on all sides; depositing an interlayer dielectric having a higher material quality below the top surface of the capacitor top plate; opening contact apertures to the top and bottom plates and to lower interconnect to a two step process that partially opens a nitride cap layer on the lower interconnect and the top plate while penetrating the nitride cap layer above the bottom plate, then cutting through the capacitor dielectric and finishing the penetration of the nitride cap layer.
摘要翻译： 在铜技术中的平行平板电容器形成在其下方没有铜（0.3μm以下）的区域中，底部蚀刻停止层，在TiN层下方具有铝层的复合底板，氧化物电容器电介质和 TiN顶板; 在包括蚀刻顶板以留下电容器区域的过程中，将底板蚀刻到具有在所有侧面上的边缘的较大底部区域; 在电容器顶板的顶表面下沉积具有较高材料质量的层间电介质; 打开接触孔到顶板和底板，并且将互连件下降到两步工艺，其在穿过底板上方的氮化物盖层之后部分地打开下互连和顶板上的氮化物盖层，然后切穿电容器电介质 并完成氮化物盖层的穿透。
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