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    Dual dielectric field effect transistors for protected gate structures for improved yield and performance in thin film transistor matrix addressed liquid crystal displays
    1.
    发明授权
    Dual dielectric field effect transistors for protected gate structures for improved yield and performance in thin film transistor matrix addressed liquid crystal displays 失效
    用于保护栅极结构的双电介质场效应晶体管，用于改善薄膜晶体管矩阵寻址液晶显示器的产量和性能

    公开(公告)号：US5210045A

    公开(公告)日：1993-05-11

    申请号：US862474

    申请日：1992-05-18

    申请人： George E. Possin ,  Harold G. Parks ,  Jack D. Kingsley

    发明人： George E. Possin ,  Harold G. Parks ,  Jack D. Kingsley

    IPC分类号： H01L27/12

    CPC分类号： H01L27/12 ,  Y10S148/043 ,  Y10S438/98

    摘要： A dual dielectric structure is employed in the fabrication of thin film field effect transistors in a matrix addressed liquid display to provide improved transistor device characteristics and also to provide both electrical and chemical isolation for material employed in the gate metallization layer. In particular, the use of a layer of silicon oxide over the gate metallization layer is not only consistent with providing the desired electrical and chemical isolation, but also with providing redundant gate metallization material to be employed beneath source or data lines for electrical circuit redundancy. Gate line redundancy is also possible. The electrical and chemical isolation provided by the dual dielectric layer reduces the possibilities of short circuits occurring in the display. The absence of short circuits together with the improved redundancy characteristics significantly increase manufacturing yield. As display sizes increase, the yield problem becomes more and more significant, generally growing as the square of the diagonal measurement of the screen. The structure in the present invention also significantly reduces gate leakage current. In the process and structure of the present invention, gate electrode material is separated from semiconductor material by the aforementioned dual dielectric, typically comprising layers of silicon oxide disposed beneath a layer of silicon nitride which is, in turn, disposed beneath the active amorphous silicon semiconductor material.

    摘要翻译： 双电介质结构用于在矩阵寻址液体显示器中制造薄膜场效应晶体管以提供改进的晶体管器件特性，并且还为栅极金属化层中所采用的材料提供电和化学隔离。 特别地，在栅极金属化层上使用一层氧化硅不仅与提供期望的电和化学隔离一致，而且还提供要用于电路冗余的源极或数据线下方的冗余栅极金属化材料。 栅线冗余也是可能的。 由双电介质层提供的电气和化学隔离减少了在显示器中发生短路的可能性。 没有短路以及改进的冗余特性显着提高了制造产量。 随着显示尺寸的增加，产量问题变得越来越重要，通常随屏幕对角线测量的平方而增长。 本发明的结构也显着地降低了栅极漏电流。 在本发明的方法和结构中，栅极电极材料通过上述双电介质与半导体材料分离，所述双电介质通常包括设置在有源非晶硅半导体下方的氮化硅层下方的氧化硅层 材料。

    Dual dielectric field effect transistors for protected gate structures for improved yield and performance in thin film transistor matrix addressed liquid crystal displays
    3.
    发明授权
    Dual dielectric field effect transistors for protected gate structures for improved yield and performance in thin film transistor matrix addressed liquid crystal displays 失效
    用于保护栅极结构的双电介质场效应晶体管，用于改善薄膜晶体管矩阵寻址液晶显示器的产量和性能

    公开(公告)号：US5148248A

    公开(公告)日：1992-09-15

    申请号：US303091

    申请日：1989-01-26

    申请人： George E. Possin ,  Harold G. Parks ,  Jack D. Kingsley

    发明人： George E. Possin ,  Harold G. Parks ,  Jack D. Kingsley

    IPC分类号： H01L27/12

    CPC分类号： H01L27/12

    摘要： A dual dielectric structure is employed in the fabrication of thin film field effect transistors in a matrix addressed liquid display to provide improved transistor device characteristics and also to provide both electricial and chemical isolation for material employed in the gate metallization layer. In particular, the use of a layer of silicon oxide over the gate metallization layer is not only consistent with providing the desired electrical and chemical isolation, but also with providing redundant gate metallization material to be employed beneath source or data lines for electrical circuit redundancy. Gate line redundancy is also possible. The electrical and chemical isolation provided by the dual dielectric layer reduces the possibilities of short circuits occurring in the display. The absence of short circuits together with the improved redundancy characteristics significantly increase manufacturing yield. As display sizes increase, the yield problem becomes more and more significant, generally growing as the square of the diagonal measurement of the screen. The structure in the present invention also significantly reduces gate leakage current. In the process and structure of the present invention, gate electrode material is separated from semiconductor material by the aforementioned dual dielectric, typically comprising layers of silicon oxide disposed beneath a layer of silicon nitride which is, in turn, disposed beneath the active amorphous silicon semiconductor material.

    摘要翻译： 在矩阵寻址的液体显示器中制造薄膜场效应晶体管时采用双电介质结构以提供改进的晶体管器件特性，并且还为栅极金属化层中使用的材料提供电化学和化学隔离。 特别地，在栅极金属化层上使用一层氧化硅不仅与提供期望的电和化学隔离一致，而且还提供要用于电路冗余的源极或数据线下方的冗余栅极金属化材料。 栅线冗余也是可能的。 由双电介质层提供的电气和化学隔离减少了在显示器中发生短路的可能性。 没有短路以及改进的冗余特性显着提高了制造产量。 随着显示尺寸的增加，产量问题变得越来越重要，通常随屏幕对角线测量的平方而增长。 本发明的结构也显着地降低了栅极漏电流。 在本发明的方法和结构中，栅极电极材料通过上述双电介质与半导体材料分离，所述双电介质通常包括设置在有源非晶硅半导体下方的氮化硅层下方的氧化硅层 材料。

    Protective tab structure for use in the fabrication of matrix addressed thin film transistor liquid crystal displays
    7.
    发明授权
    Protective tab structure for use in the fabrication of matrix addressed thin film transistor liquid crystal displays 失效
    用于制造矩阵寻址薄膜晶体管液晶显示器的保护片结构

    公开(公告)号：US4778258A

    公开(公告)日：1988-10-18

    申请号：US104452

    申请日：1987-10-05

    申请人： Harold G. Parks ,  William W. Piper ,  George E. Possin

    发明人： Harold G. Parks ,  William W. Piper ,  George E. Possin

    IPC分类号： G02F1/1368 ,  H01L27/12 ,  G02F1/13

    CPC分类号： H01L27/12 ,  G02F1/1368 ,  Y10S359/90

    摘要： A process for the fabrication of thin film field effect transistors in active matrix liquid crystal display devices includes the utilization of a protective, conductive tab disposed on a corner portion of the pixel electrodes. Electrical contact is made to the pixel electrodes not directly, but rather through a via opening in protective, insulative and amorphous silicon layers. The structure is particularly advantageous in that it permits the utilization of a wider range of gate and upper level metallization materials, particularly aluminum, whose etchants are otherwise found deleterious to pixel electrode material such as indium tin oxide. The structure of the present invention is seen to be readily fabricatable in accordance with high yield fabrication procedures.

    摘要翻译： 在有源矩阵液晶显示装置中制造薄膜场效应晶体管的方法包括利用设置在像素电极的角部上的保护导电片。 不直接地对像素电极进行电接触，而是通过保护性，绝缘和非晶硅层中的通孔开口进行电接触。 该结构是特别有利的，因为其允许利用较宽范围的栅极和上层金属化材料，特别是铝，其蚀刻剂被认为对诸如氧化铟锡的像素电极材料有害。 本发明的结构被认为可以根据高产量制造方法容易地制造。

    Archival memory media and method for information recording thereon
    9.
    发明授权
    Archival memory media and method for information recording thereon 失效
    归档存储介质及其上的信息记录方法

    公开(公告)号：US4128897A

    公开(公告)日：1978-12-05

    申请号：US780175

    申请日：1977-03-22

    申请人： James F. Norton ,  Harold G. Parks ,  George E. Possin

    发明人： James F. Norton ,  Harold G. Parks ,  George E. Possin

    IPC分类号： G11C11/23 ,  G11C17/08 ,  G11C11/42 ,  G11C17/06

    CPC分类号： G11C11/23 ,  G11C17/08 ,  Y10S257/917

    摘要： Binary information is stored in a semiconductor archival memory medium by formation of a region of an alloy, of the semiconductor material and a non-doping material, at each of a plurality of potential memory sites at which a first binary value of information is to be stored, with the remaining data sites being devoid of the alloyed region to store the remaining value of binary data. Methods for writing the formation of the alloyed region, and reading the information value stored at each memory site, are also disclosed.

    摘要翻译： 二元信息通过在信息的第一二进制值的多个潜在存储器位置中的每一个处形成半导体材料和非掺杂材料的合金区域来存储在半导体档案存储介质中 存储，剩余的数据站点没有合金区域以存储二进制数据的剩余值。 还公开了写入合金区域的形成以及读取存储在每个存储部位的信息值的方法。

    Electron optics apparatus
    10.
    发明授权
    Electron optics apparatus 失效
    电子光学装置

    公开(公告)号：US4196373A

    公开(公告)日：1980-04-01

    申请号：US894757

    申请日：1978-04-10

    申请人： Harold G. Parks

    发明人： Harold G. Parks

    IPC分类号： H01J29/46 ,  H01J29/56

    CPC分类号： H01J29/46

    摘要： Electron optics apparatus, for use in electron-beam lithography, electron-beam-addressable memory tubes and the like, utilizes a tri-potential collimating condenser lens and a multi-element matrix lens of the "flys eye" type with coarse deflection elements positioned therebetween to deflect the collimated electron beam from the condenser lens to the appropriate aperture in the matrix of lenslets. The condenser lens electrode and matrix lens electrode closest to one another, as well as the coarse deflection electrodes therebetween, are substantially the only elements in the apparatus which float at a relatively high electrical potential, thereby simplifying the requirements of peripheral circuitry while retaining the advantages of the "flys eye" matrix lens.

    摘要翻译： 用于电子束光刻，电子束可寻址存储管等的电子光学装置利用三电位准直聚光透镜和“飞眼”型的多元矩阵透镜，其中定位有粗偏转元件 以将准直电子束从聚光透镜偏转到小透镜矩阵中的适当孔径。 彼此最靠近的聚光透镜电极和矩阵透镜电极以及它们之间的粗偏转电极基本上是在相对较高电势下浮动的设备中的唯一元件，从而简化了外围电路的要求，同时保持了优点 的“飞眼”矩阵镜头。