公开(公告)号：US20120250033A1

公开(公告)日：2012-10-04

申请号：US13512946

申请日：2010-11-05

申请人： Hideki Kitagawa ,  Takuya Watanabe ,  Hajime Imai ,  Yukihiko Nishiyama ,  Atsuhito Murai ,  Kazunori Morimoto

发明人： Hideki Kitagawa ,  Takuya Watanabe ,  Hajime Imai ,  Yukihiko Nishiyama ,  Atsuhito Murai ,  Kazunori Morimoto

IPC分类号： G01B11/14

CPC分类号： G06F3/0428

摘要： An optical sensor circuit in accordance with the present invention detects, based on a change in the amount of light received when a pointer (P) is placed in a coordinate detection area (2) through which light from a light source (3) passes, coordinates of a position of the pointer (3) in the coordinate detection area (2). A first optical sensor circuit including an optical sensor element (41), which receives a larger amount of light due to its position relative to the light source (3), has a first wire to which a refresh signal (Shield_A) is supplied, the refresh signal (Shield_A) initializing a threshold characteristic that determines light sensitivity of the optical sensor element (41); whereas a second optical sensor circuit including an optical sensor element (42), which receives a smaller amount of light, has a second wire to which a refresh signal (Shield_B) is supplied independently of the refresh signal (Shield_A), the refresh signal (Shield_B) initializing a threshold characteristic of the optical element (42).

摘要翻译： 根据本发明的光学传感器电路基于当将指示器（P）放置在来自光源（3）的光通过的坐标检测区域（2）中时接收的光量的变化来检测， 坐标检测区域（2）中的指针（3）的位置的坐标。 包括由于其相对于光源（3）的位置而接收更大量的光的光学传感器元件（41）的第一光学传感器电路具有提供刷新信号（Shield_A）的第一布线， 刷新信号（Shield_A）初始化确定光学传感器元件（41）的光灵敏度的阈值特性; 而包括接收较少光量的光学传感器元件（42）的第二光学传感器电路具有第二导线，独立于刷新信号（Shield_A）提供刷新信号（Shield_B），刷新信号（Shield_A），刷新信号 Shield_B）初始化光学元件（42）的阈值特性。

公开(公告)号：US20120241768A1

公开(公告)日：2012-09-27

申请号：US13508045

申请日：2010-06-25

申请人： Atsuhito Murai ,  Kazunori Morimoto ,  Yukihiko Nishiyama ,  Hajime Imai ,  Hideki Kitagawa

发明人： Atsuhito Murai ,  Kazunori Morimoto ,  Yukihiko Nishiyama ,  Hajime Imai ,  Hideki Kitagawa

IPC分类号： H01L27/146 ,  H01L31/113

CPC分类号： G06F3/0412 ,  G06F3/0416 ,  G06F3/042

摘要： An optical sensor circuit (20) includes a transistor (20c) and a transistor (20d). The transistor (20c) is connected in series with the transistor (20d). The transistor (20d) is configured to receive light. A black matrix is provided so as to face the transistor (20c). A voltage generated at a connecting point (i.e., node (netB)) of the transistor (20d) and the transistor (20c) varies depending on intensity of light received via the transistor (20d).

摘要翻译： 光传感器电路（20）包括晶体管（20c）和晶体管（20d）。 晶体管（20c）与晶体管（20d）串联连接。 晶体管（20d）被配置为接收光。 提供黑矩阵以面对晶体管（20c）。 在晶体管（20d）和晶体管（20c）的连接点（即，节点（netB））处产生的电压根据经由晶体管（20d）接收的光的强度而变化。

公开(公告)号：US20130092927A1

公开(公告)日：2013-04-18

申请号：US13639138

申请日：2011-01-17

申请人： Atsuhito Murai ,  Shinya Tanaka ,  Hideki Kitagawa ,  Hajime Imai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

发明人： Atsuhito Murai ,  Shinya Tanaka ,  Hideki Kitagawa ,  Hajime Imai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

IPC分类号： H01L27/15

CPC分类号： H01L27/15 ,  G02F1/13318 ,  G02F1/13338 ,  G02F1/136204 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

摘要： The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.

摘要翻译： 本发明的电路板（1）包括设置在单个绝缘基板（2）上的多个晶体管元件，用于各个像素的二维排列或者在一组预定数量的像素中的各个像素。 多个晶体管元件中的至少一个是具有由氧化物半导体形成的沟道层（11）的氧化物TFT（10），并且多个晶体管元件中的至少另一个是具有 沟道层（21）由例如非晶硅半导体形成。 氧化物TFT（10）和a-Si TFT（20）中的每一个都是底栅晶体管。

公开(公告)号：US08581257B2

公开(公告)日：2013-11-12

申请号：US13639138

申请日：2011-01-17

申请人： Atsuhito Murai ,  Shinya Tanaka ,  Hideki Kitagawa ,  Hajime Imai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

发明人： Atsuhito Murai ,  Shinya Tanaka ,  Hideki Kitagawa ,  Hajime Imai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

IPC分类号： H01L29/04 ,  H01L29/10 ,  H01L31/00

CPC分类号： H01L27/15 ,  G02F1/13318 ,  G02F1/13338 ,  G02F1/136204 ,  G02F1/1368 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/42384 ,  H01L29/78633 ,  H01L29/7869

摘要： The circuit board (1) of the present invention includes a plurality of transistor elements provided on a single insulating substrate (2) for respective pixels that are two-dimensionally arranged or respective pixels in a group of a predetermined number of the pixels. At least one of the plurality of transistor elements is an oxide TFT (10) having a channel layer (11) formed by an oxide semiconductor, and at least another of the plurality of transistor elements is an a-Si TFT (20) having a channel layer (21) formed by, for example, an amorphous silicon semiconductor. Each of the oxide TFT (10) and the a-Si TFT (20) is a bottom-gate transistor.

摘要翻译： 本发明的电路板（1）包括设置在单个绝缘基板（2）上的多个晶体管元件，用于各个像素的二维排列或者在一组预定数量的像素中的各个像素。 多个晶体管元件中的至少一个是具有由氧化物半导体形成的沟道层（11）的氧化物TFT（10），并且多个晶体管元件中的至少另一个是具有 沟道层（21）由例如非晶硅半导体形成。 氧化物TFT（10）和a-Si TFT（20）中的每一个都是底栅晶体管。

公开(公告)号：US20130146866A1

公开(公告)日：2013-06-13

申请号：US13643652

申请日：2011-03-02

申请人： Hideki Kitagawa ,  Shinya Tanaka ,  Hajime Imai ,  Atsuhito Murai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

发明人： Hideki Kitagawa ,  Shinya Tanaka ,  Hajime Imai ,  Atsuhito Murai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

IPC分类号： H01L27/12

CPC分类号： H01L27/1251 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1446 ,  H01L27/14632 ,  H01L27/14678

摘要： A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.

摘要翻译： 电路板（1）在绝缘基板（2）上包括多个晶体管元件。 多个晶体管元件中的至少一个是氧化物TFT（10），其包括作为沟道层（11）的氧化物半导体。 多个晶体管元件中的至少一个是与作为电路元件的功能的氧化物TFT（10）不同的a-SiTFT（20）（i），（ii）包括作为沟道层（21）的无定形 硅半导体。 氧化物TFT（10）是顶栅晶体管，并且a-SiTFT（20）是底栅晶体管。 这提供：一种配置，其可以（a）增强配备有作为电路部件的各自功能不同的TFT的电路板的性能，（b）减小安装TFT所需的面积; 以及电路基板的制造方法。

公开(公告)号：US09111810B2

公开(公告)日：2015-08-18

申请号：US13643652

申请日：2011-03-02

申请人： Hideki Kitagawa ,  Shinya Tanaka ,  Hajime Imai ,  Atsuhito Murai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

发明人： Hideki Kitagawa ,  Shinya Tanaka ,  Hajime Imai ,  Atsuhito Murai ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Kazunori Morimoto ,  Junya Shimada ,  Jun Nishimura

IPC分类号： H01L29/10 ,  H01L29/12 ,  H01L27/12 ,  H01L27/146 ,  H01L27/144

CPC分类号： H01L27/1251 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1446 ,  H01L27/14632 ,  H01L27/14678

摘要： A circuit board (1) includes a plurality of transistor elements on an insulating substrate (2). At least one of the plurality of transistor elements is an oxide TFT (10) including, as a channel layer (11), an oxide semiconductor. At least one of the plurality of transistor elements is an a-SiTFT (20) (i) being different from the oxide TFT (10) in functions as circuit components and (ii) including, as a channel layer (21), an amorphous silicon semiconductor. The oxide TFT (10) is a top gate transistor, and the a-SiTFT (20) is a bottom gate transistor. This provides: a configuration that can (a) enhance the performance of the circuit board equipped with the TFTs differing in their respective functions as circuit components and (b) reduce the area necessary for mounting the TFTs; and a method for producing the circuit board.

摘要翻译： 电路板（1）在绝缘基板（2）上包括多个晶体管元件。 多个晶体管元件中的至少一个是氧化物TFT（10），其包括作为沟道层（11）的氧化物半导体。 多个晶体管元件中的至少一个是与作为电路元件的功能的氧化物TFT（10）不同的a-SiTFT（20）（i），（ii）包括作为沟道层（21）的无定形 硅半导体。 氧化物TFT（10）是顶栅晶体管，并且a-SiTFT（20）是底栅晶体管。 这提供：一种配置，其可以（a）增强配备有作为电路部件的各自功能不同的TFT的电路板的性能，（b）减小安装TFT所需的面积; 以及电路基板的制造方法。

公开(公告)号：US20130214279A1

公开(公告)日：2013-08-22

申请号：US13695082

申请日：2011-02-23

申请人： Jun Nishimura ,  Hideki Kitagawa ,  Atsuhito Murai ,  Hajime Imai ,  Shinya Tanaka ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Junya Shimada ,  Kazunori Morimoto

发明人： Jun Nishimura ,  Hideki Kitagawa ,  Atsuhito Murai ,  Hajime Imai ,  Shinya Tanaka ,  Mitsunori Imade ,  Tetsuo Kikuchi ,  Junya Shimada ,  Kazunori Morimoto

IPC分类号： H01L27/02

CPC分类号： H01L29/78663 ,  G02F1/13338 ,  G02F1/13624 ,  G06F3/0412 ,  H01L27/0207 ,  H01L27/0705 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/78633 ,  H01L29/7869

摘要： A source and drain electrode layer (3s/3d) of an oxide TFT element (3) is formed by a first conductive layer. A gate electrode (3g) of the oxide TFT element (3) and a gate electrode (5g) of an a-Si TFT element (5) are formed by a single conductive layer, that is, a second conductive layer. A source and drain electrode layer (5s/5d) of the a-Si TFT element (5) is formed by a third conductive layer. The third conductive layer is formed above the second conductive layer in a thickness direction in which each conductive layer is stacked on an insulating substrate (2). Further, the first conductive layer is formed below the second conductive layer in the thickness direction. Therefore, it is possible to provide a circuit board that can have an improved degree of integration of transistor elements formed on the insulating substrate.

摘要翻译： 氧化物TFT元件（3）的源极和漏极电极层（3s / 3d）由第一导电层形成。 氧化物TFT元件（3）的栅极（3g）和a-Si TFT元件（5）的栅电极（5g）由单个导电层即第二导电层形成。 a-Si TFT元件（5）的源极和漏极电极层（5s / 5d）由第三导电层形成。 第三导电层形成在第二导电层上方的厚度方向上，其中每个导电层堆叠在绝缘基板（2）上。 此外，第一导电层在厚度方向上形成在第二导电层的下方。 因此，可以提供可以使形成在绝缘基板上的晶体管元件的集成度提高的电路板。

公开(公告)号：US20120092302A1

公开(公告)日：2012-04-19

申请号：US13379783

申请日：2010-02-26

申请人： Hajime Imai ,  Takuya Watanabe ,  Atsuhito Murai ,  Hideki Kitagawa

发明人： Hajime Imai ,  Takuya Watanabe ,  Atsuhito Murai ,  Hideki Kitagawa

IPC分类号： G06F3/042

CPC分类号： H01L27/1214 ,  G02F1/13318 ,  G06F3/0412 ,  G06F3/042 ,  G09G3/3225 ,  G09G2300/0809 ,  G09G2360/14 ,  H01L27/12 ,  H01L27/3269 ,  H01L31/03682 ,  H01L31/03762 ,  H01L31/1136 ,  Y02E10/546 ,  Y02E10/548

摘要： It is an object of the present invention to provide a display device equipped with a display panel that is provided with a photo-detection section with improved accuracy of detecting a touch position. A display panel (11) of an organic EL display device (10) includes a photo-detection section (40) that detects reflected light when a screen is touched by a finger or the like. The photo-detection section (40) includes a photodiode (41) that receives the reflected light, and an output amplifier (42) that outputs an output voltage corresponding to the amount of the received light. If an a-Si diode is used for such a photodiode (41), a sufficiently large signal difference in sensitivity between the bright state and the dark state can be achieved. Also, if a p-Si amplifier is used for the output amplifier (42), the output voltage becomes the saturation voltage at the time of read-out. This allows the p-Si amplifier to directly output the large sensitivity difference detected by the a-Si diode as a large difference in the output voltage.

摘要翻译： 本发明的目的是提供一种配备有显示面板的显示装置，该显示面板具有提高检测触摸位置的精度的光检测部。 有机EL显示装置（10）的显示面板（11）具有检测手指等触摸屏幕时的反射光的光检测部（40）。 光检测部分（40）包括接收反射光的光电二极管（41）和输出与接收光量对应的输出电压的输出放大器（42）。 如果对这种光电二极管（41）使用a-Si二极管，则可以实现明亮状态和暗态之间的足够大的灵敏度信号差。 此外，如果使用p-Si放大器作为输出放大器（42），则输出电压成为读出时的饱和电压。 这允许p-Si放大器直接输出由a-Si二极管检测的大的灵敏度差，作为输出电压的大差异。

公开(公告)号：US08717334B2

公开(公告)日：2014-05-06

申请号：US13258868

申请日：2009-10-27

申请人： Atsuhito Murai ,  Yoshiharu Kataoka ,  Takuya Watanabe ,  Hajime Imai ,  Hideki Kitagawa

发明人： Atsuhito Murai ,  Yoshiharu Kataoka ,  Takuya Watanabe ,  Hajime Imai ,  Hideki Kitagawa

IPC分类号： G06F3/041

CPC分类号： G06F3/042 ,  G02F1/13338 ,  G02F2001/13312 ,  G06F3/0412 ,  G06F3/0414

摘要： A display device includes: an optical sensor circuit provided in a display region, the optical sensor circuit including a light-receiving element and detecting intensity of light incident to the light-receiving element; and a pressure detection circuit which detects pressure applied to a display surface of a display panel on a basis of a change of the display surface in a panel thickness direction which change is caused by the pressure, with respect to a region in which the pressure is to be detected, both of the detection of the pressure by the pressure detection circuit and the detection of the intensity of the light by the optical sensor circuit being carried out within a period allocated to acquisition of detection data concerning the pressure in the display region.

摘要翻译： 显示装置包括：设置在显示区域的光学传感器电路，所述光学传感器电路包括光接收元件，并检测入射到所述光接收元件的光的强度; 以及压力检测电路，其基于显示面在面板厚度方向上的变化来检测施加到显示面板的显示面上的压力，所述变化是由压力引起的，相对于压力为 要被检测时，通过压力检测电路的压力检测和由光学传感器电路检测光的强度在分配用于获取关于显示区域内的压力的检测数据的时间段内执行。

公开(公告)号：US20120019496A1

公开(公告)日：2012-01-26

申请号：US13258775

申请日：2009-10-27

申请人： Atsuhito Murai ,  Yoshiharu Kataoka ,  Takuya Watanabe ,  Hajime Imai ,  Hideki Kitagawa

发明人： Atsuhito Murai ,  Yoshiharu Kataoka ,  Takuya Watanabe ,  Hajime Imai ,  Hideki Kitagawa

IPC分类号： G09G5/00 ,  H01L31/0368 ,  H01L29/786 ,  H01L31/0376

CPC分类号： G01J1/46 ,  G01J1/0209 ,  G01J1/0228 ,  G02F1/13338 ,  G02F2001/13312 ,  H01L27/12 ,  H01L27/14612 ,  H01L27/14692

摘要： A field-effect transistor (62a) has a back gate (62ag2). The back gate (62ag2), a cathode of a photodiode (62b), and a first end of a first capacitor (62c) are connected with each other via a first node (netA). An anode of the photodiode (62b) is connected with a first line (Vrst). A second end of the first capacitor (62c) is connected with a second line (Csn). A gate (62ag1) of the field-effect transistor (62a) is connected with a third line (Vrwn), and a drain of the filed-effect transistor (62a) is connected with a fourth line (Vsm). A source of the field-effect transistor (62a) is an output of an output amplifier (62a).

摘要翻译： 场效应晶体管（62a）具有背栅（62ag2）。 背栅（62ag2），光电二极管（62b）的阴极和第一电容器（62c）的第一端经由第一节点（netA）彼此连接。 光电二极管（62b）的阳极与第一线（Vrst）连接。 第一电容器（62c）的第二端与第二线（Csn）连接。 场效应晶体管（62a）的栅极（62ag1）与第三线（Vrwn）连接，并且场效应晶体管（62a）的漏极与第四线（Vsm）连接。 场效应晶体管（62a）的源极是输出放大器（62a）的输出。