公开(公告)号：US20060065949A1

公开(公告)日：2006-03-30

申请号：US11230040

申请日：2005-09-19

申请人： Hidenori Kato ,  Masahide Mori ,  Hirofumi Watanabe

发明人： Hidenori Kato ,  Masahide Mori ,  Hirofumi Watanabe

IPC分类号： H01L29/00

CPC分类号： H01L21/76865 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76883 ,  H01L23/5228 ,  H01L27/0629 ,  H01L28/24

摘要： A semiconductor device equipped with an integrated circuit including a metal thin-film-resistor object is disclosed. The semiconductor device includes a lower layer side insulator film formed on a semiconductor substrate, a metal wiring pattern formed on the lower layer side insulator film, an underground insulator film having a silicon oxide-film that contains at least phosphor, or phosphor and boron in the uppermost layer formed on the lower layer side insulator film and the metal wiring pattern, and a connection hole formed in the underground insulator film on the metal wiring pattern. The metal thin-film-resistor object is formed covering the underground insulator film, and inside of the connection hole, and is electrically connected to the metal wiring pattern in the connection hole.

摘要翻译： 公开了一种配备有包括金属薄膜电阻体的集成电路的半导体器件。 半导体器件包括形成在半导体衬底上的下层侧绝缘膜，形成在下层侧绝缘膜上的金属布线图案，具有氧化硅膜的地下绝缘膜，所述氧化硅膜至少包含磷光体，或磷光体和硼 形成在下层侧绝缘膜和金属布线图案上的最上层，以及形成在金属布线图案上的地下绝缘膜的连接孔。 金属薄膜电阻体形成为覆盖地下绝缘膜，连接孔内部，与连接孔中的金属布线图案电连接。

公开(公告)号：US07425753B2

公开(公告)日：2008-09-16

申请号：US11230040

申请日：2005-09-19

申请人： Hidenori Kato ,  Masahide Mori ,  Hirofumi Watanabe

发明人： Hidenori Kato ,  Masahide Mori ,  Hirofumi Watanabe

IPC分类号： H01L29/00

CPC分类号： H01L21/76865 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/76883 ,  H01L23/5228 ,  H01L27/0629 ,  H01L28/24

摘要： A semiconductor device equipped with an integrated circuit including a metal thin-film-resistor object is disclosed. The semiconductor device includes a lower layer side insulator film formed on a semiconductor substrate, a metal wiring pattern formed on the lower layer side insulator film, an underground insulator film having a silicon oxide-film that contains at least phosphor, or phosphor and boron in the uppermost layer formed on the lower layer side insulator film and the metal wiring pattern, and a connection hole formed in the underground insulator film on the metal wiring pattern. The metal thin-film-resistor object is formed covering the underground insulator film, and inside of the connection hole, and is electrically connected to the metal wiring pattern in the connection hole.

摘要翻译： 公开了一种配备有包括金属薄膜电阻体的集成电路的半导体器件。 半导体器件包括形成在半导体衬底上的下层侧绝缘膜，形成在下层侧绝缘膜上的金属布线图案，具有氧化硅膜的地下绝缘膜，所述氧化硅膜至少包含磷光体，或磷光体和硼 形成在下层侧绝缘膜和金属布线图案上的最上层，以及形成在金属布线图案上的地下绝缘膜的连接孔。 金属薄膜电阻体形成为覆盖地下绝缘膜，连接孔内部，与连接孔中的金属布线图案电连接。

公开(公告)号：US09749566B2

公开(公告)日：2017-08-29

申请号：US14641683

申请日：2015-03-09

申请人： Kazuhiro Yoneda ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Katsuhiko Aisu ,  Yasukazu Nakatani ,  Katsuyuki Sakurano

发明人： Kazuhiro Yoneda ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Katsuhiko Aisu ,  Yasukazu Nakatani ,  Katsuyuki Sakurano

IPC分类号： H04N5/374 ,  H04N5/355

CPC分类号： H04N5/374 ,  H04N5/35527

摘要： An imaging device includes a photoelectric conversion element which photoelectrically converts incident light and generates a charge, accumulates and amplifies the charge, and outputs a photocurrent, wherein a level of an output signal when a charge which is accumulated in the photoelectric conversion element is outputted over a saturated amount of accumulable charge includes a level of an output signal of a charge of a photocurrent of DC component which is generated in the photoelectric conversion element and outputted during a readout time when the charge which is accumulated in the photoelectric conversion element is outputted.

公开(公告)号：US09478568B2

公开(公告)日：2016-10-25

申请号：US14305821

申请日：2014-06-16

申请人： Katsuhiko Aisu ,  Takaaki Negoro ,  Kazuhiro Yoneda ,  Katsuyuki Sakurano ,  Hirofumi Watanabe

发明人： Katsuhiko Aisu ,  Takaaki Negoro ,  Kazuhiro Yoneda ,  Katsuyuki Sakurano ,  Hirofumi Watanabe

IPC分类号： H01L27/144 ,  H01L27/146 ,  H04N5/359 ,  H04N5/374 ,  H04N5/3745

CPC分类号： H01L27/144 ,  H01L27/14609 ,  H04N5/359 ,  H04N5/374 ,  H04N5/3745

摘要： A photoelectric conversion device includes a first output line, a second output line; and a photoelectric conversion cell. The photoelectric conversion cell further includes, a photoelectric conversion element configured to generate an output current corresponding to an intensity of incident light, a first switch element configured to transmit the first output current to the first output line according to a first control signal, and a second switch element configured to transmit the second output current to second output line according to a second control signal. As a result, the photoelectric conversion device can be provided to generate rapidly the image data with wide dynamic range without the need for complex control outside of the photoelectric conversion device.

摘要翻译： 光电转换装置包括第一输出线，第二输出线， 和光电转换单元。 光电转换单元还包括：光电转换元件，被配置为产生与入射光强度相对应的输出电流;第一开关元件，被配置为根据第一控制信号将第一输出电流传输到第一输出线;以及 第二开关元件，被配置为根据第二控制信号将第二输出电流传输到第二输出线。 结果，可以提供光电转换装置以快速生成具有宽动态范围的图像数据，而不需要光电转换装置外部的复杂控制。

公开(公告)号：US20160195431A1

公开(公告)日：2016-07-07

申请号：US14978172

申请日：2015-12-22

申请人： Katsuhiko Aisu ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Yoshinori Ueda ,  Yasukazu Nakatani ,  Kazuhiro Yoneda ,  Katsuyuki Sakurano

发明人： Katsuhiko Aisu ,  Hirofumi Watanabe ,  Takaaki Negoro ,  Yoshinori Ueda ,  Yasukazu Nakatani ,  Kazuhiro Yoneda ,  Katsuyuki Sakurano

IPC分类号： G01J1/44

CPC分类号： G01J1/44 ,  G01J2001/444 ,  G01J2001/4473 ,  H04N5/361 ,  H04N5/3655 ,  H04N5/378

摘要： A photoelectric conversion device includes a pixel cell including a phototransistor, a reference cell including a reference transistor having a temperature characteristic identical to that of the phototransistor and having a fixed electrical state, an analog-to-digital converter that converts an analog output of the pixel cell into a digital output, a correction amount computation unit that computes a correction amount for the digital output of the analog-to-digital converter based on an output of the reference cell and a reference value, and a correction unit that corrects the digital output of the analog-to-digital converter based on the correction amount.

摘要翻译： 光电转换装置包括具有光电晶体管的像素单元，具有与光电晶体管的温度特性相同的具有固定电气状态的参考晶体管的参考晶体管，转换模拟输出的模数转换器 像素单元转换为数字输出;校正量计算单元，其基于所述参考单元的输出和参考值计算所述模数转换器的数字输出的校正量，以及校正单元， 基于校正量的模数转换器的输出。

公开(公告)号：US09169676B2

公开(公告)日：2015-10-27

申请号：US13353916

申请日：2012-01-19

申请人： Hirofumi Watanabe ,  Shintaro Okawa

发明人： Hirofumi Watanabe ,  Shintaro Okawa

IPC分类号： E05C3/06 ,  E05B85/02 ,  E05B77/34 ,  E05B77/38 ,  E05B81/14 ,  E05B81/36 ,  E05B81/66

CPC分类号： E05B85/02 ,  E05B77/34 ,  E05B77/38 ,  E05B81/14 ,  E05B81/36 ,  E05B81/66 ,  Y10T292/1075

摘要： A latch device for vehicle LA provided on a door D of a vehicle, including: a latch 20, which meshes with a striker S; a ratchet 30, which regulates rotation of the latch 20; a detecting sensor 200 including a body 201 and terminals 202a and 202b exposed from the body 201, which detects operation of the latch 20 or the ratchet 30; and a main body 40 in which the detecting sensor 200 is arranged, wherein the main body 40 includes a discharging portion 417 formed on a position corresponding to the terminals 202a and 202b of the latch detecting sensor 200, and the terminals 202a and 202b of the detecting sensor 200 are arranged on an upper side of a vehicle than the discharging portion 417 in a state in which the door D is closed.

摘要翻译： 一种设置在车辆的门D上的用于车辆LA的闩锁装置，包括：与撞针S啮合的闩锁20; 棘轮30，其调节闩锁20的旋转; 检测传感器200，其包括主体201和从主体201露出的端子202a和202b，其检测闩锁20或棘轮30的操作; 以及设置有检测传感器200的主体40，其中主体40包括形成在与闩锁检测传感器200的端子202a和202b相对应的位置处的排出部分417，以及 在门D关闭的状态下，检测传感器200配置在车辆的上侧，而不是排出部417。

公开(公告)号：US20150171129A1

公开(公告)日：2015-06-18

申请号：US14560037

申请日：2014-12-04

申请人： Katsuyuki Sakurano ,  Takaaki Negoro ,  Katsuhiko Aisu ,  Kazuhiro Yoneda ,  Yasukazu Nakatani ,  Hirofumi Watanabe

发明人： Katsuyuki Sakurano ,  Takaaki Negoro ,  Katsuhiko Aisu ,  Kazuhiro Yoneda ,  Yasukazu Nakatani ,  Hirofumi Watanabe

IPC分类号： H01L27/146 ,  H01L31/113

CPC分类号： H01L31/1136 ,  H01L27/14614 ,  H01L27/14623 ,  H01L27/1463 ,  H01L27/14638 ,  H01L27/14643 ,  H01L27/14689

摘要： A semiconductor device and a method of manufacturing a semiconductor device are disclosed. The method includes forming a trench, in a vertical direction of a semiconductor substrate having a plurality of photoelectric converting elements arranged on the semiconductor device, at positions between the photoelectric converting elements that are next to each other, forming a first conductive-material layer in and above the trench by implanting a first conductive material into the trench after an oxide film is formed on an inner wall of the trench, forming a first conductor by removing the first conductive-material layer excluding a first conductive portion of the first conductive-material layer implanted into the trench, and forming an upper gate electrode above the first conductor, the upper gate electrode configured to be conductive with the first conductor. The semiconductor device includes a semiconductor substrate, an image sensor, a trench, a first conductor, and an upper gate electrode.

摘要翻译： 公开了半导体器件和制造半导体器件的方法。 该方法包括在彼此相邻的光电转换元件之间的位置处形成在具有布置在半导体器件上的多个光电转换元件的半导体衬底的垂直方向上形成沟槽，形成第一导电材料层 并且在沟槽的内壁上形成氧化膜之后，通过将第一导电材料注入到沟槽中并在沟槽之上形成第一导体，通过除去除第一导电材料的第一导电部分之外的第一导电材料层 层，并且在第一导体上形成上栅电极，上栅电极被配置为与第一导体导电。 半导体器件包括半导体衬底，图像传感器，沟槽，第一导体和上部栅电极。

公开(公告)号：US08785777B2

公开(公告)日：2014-07-22

申请号：US12976001

申请日：2010-12-22

申请人： Daisuke Yasukawa ,  Hirofumi Watanabe ,  Kazuhiko Nakano ,  Kenji Kikuchi

发明人： Daisuke Yasukawa ,  Hirofumi Watanabe ,  Kazuhiko Nakano ,  Kenji Kikuchi

IPC分类号： H02G5/00

CPC分类号： B60T8/368 ,  B29C45/14065 ,  B29C45/14639 ,  B29C45/14836 ,  B29C2045/14131 ,  B60T8/441 ,  H02M7/003

摘要： An actuator control device includes a circuit device that is resin-molded by a plurality of metal molds including at least one movable metal mold to include a first bus bar and a second bus bar. The first bus bar and the second bus bar each include a flat plate-like portion that includes two main flat-face portions having large surface areas, and two sub flat-face portions that are adjacent to the main flat-face portions and have smaller surface areas than the surface areas of the main flat-face portions. One of the main flat-face portions of the first bus bar faces one of the main flat-face portions of the second bus bar. The facing direction differs from the mold release direction of the movable metal mold.

摘要翻译： 致动器控制装置包括由包括至少一个活动金属模具的多个金属模具树脂模塑的电路装置，以包括第一母线和第二母线。 第一母线和第二母线各自包括平板状部分，其包括具有大表面积的两个主平面部分和与主平面部分相邻的两个副平面部分，并且具有较小的 表面积大于主平面部分的表面积。 第一汇流条的主平面部分之一面向第二汇流条的主平面部分之一。 面向的方向与可动金属模具的脱模方向不同。

公开(公告)号：US20130234277A1

公开(公告)日：2013-09-12

申请号：US13793445

申请日：2013-03-11

申请人： Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

发明人： Takaaki Negoro ,  Hirofumi Watanabe ,  Yutaka Hayashi ,  Toshitaka Ota ,  Yasushi Nagamune

IPC分类号： H01L27/146 ,  H01L29/73

CPC分类号： H01L27/14681 ,  H01L27/14683 ,  H01L29/73 ,  H01L29/739 ,  H01L31/1105

摘要： The invention relates to a semiconductor device having a vertical transistor bipolar structure of emitter, base, and collector formed in this order from a semiconductor substrate surface in a depth direction. The semiconductor device includes an electrode embedded from the semiconductor substrate surface into the inside and insulated by an oxide film. In the surface of the substrate, a first-conductivity-type first semiconductor region, a second-conductivity-type second semiconductor region, and a first-conductivity-type third semiconductor region are arranged, from the surface side, inside a semiconductor device region surrounded by the electrode and along the electrode with the oxide film interposed therebetween, the second semiconductor region located below the first semiconductor region, the third semiconductor region located below the second semiconductor region. The electrode is insulated from the first to third semiconductor regions, and current gain is variable through application of voltage to the electrode.

摘要翻译： 本发明涉及一种半导体器件，其具有从半导体衬底表面沿深度方向依次形成的发射极，基极和集电极的垂直晶体管双极结构。 半导体器件包括从半导体衬底表面嵌入内部并由氧化物膜绝缘的电极。 在基板的表面中，从第一导电型第一半导体区域，第二导电型第二半导体区域和第一导电型第三半导体区域的表面侧配置在半导体器件区域 被电极围绕并且沿着电极，氧化膜插入其间，位于第一半导体区域下方的第二半导体区域，位于第二半导体区域下方的第三半导体区域。 电极与第一至第三半导体区域绝缘​​，电流增益可通过向电极施加电压而变化。

公开(公告)号：US20120270026A1

公开(公告)日：2012-10-25

申请号：US13516523

申请日：2010-12-15

申请人： Hisashi Mihori ,  Hirofumi Watanabe ,  Yuki Saito

发明人： Hisashi Mihori ,  Hirofumi Watanabe ,  Yuki Saito

IPC分类号： B32B27/42 ,  B29C44/06 ,  B32B5/18

CPC分类号： C08J9/141 ,  B29C44/24 ,  B29C44/321 ,  B29C44/326 ,  B29C44/468 ,  B32B5/32 ,  B32B2266/0271 ,  C08G14/08 ,  C08J2361/24 ,  C08L61/34

摘要： A phenolic resin foamed plate having a thickness of 50 mm or more, in which when the phenolic resin foamed plate is sliced from one main surface of the phenolic resin foamed plate along the main surface in a thickness direction at 5 mm intervals to produce n pieces, which are designated as Q1 to Qn in order from the main surface side, where average densities of Q1 to Qn are dq1 to dqn, respectively, the ratio (dqmin/dqave) of a minimum value dqmin of dq2 to dq(n-1) to an average value dqave of dq2 to dq(n-1) is 0.91≦dqmin/dqave≦0.98, and when a density distribution line is obtained, there exists a straight line parallel with the axis of abscissas that intersects the density distribution line at four points. The phenolic resin foamed plate exhibiting practically sufficient compressive strength and thermal conductivity even when the product thickness is increased.

摘要翻译： 一种厚度为50mm以上的酚醛树脂发泡板，其中当酚醛树脂发泡板沿酚醛树脂发泡板的主表面沿厚度方向以5mm间隔从主表面切片以产生n个片 ，其中从主面侧开始按照Q1〜Qn的平均密度dq1〜dqn分别指定为Q1〜Qn，dq2的最小值dqmin与dq（n-1）的比（dqmin / dqave） ）至dq2至dq（n-1）的平均值dqave为0.91＆nlE; dqmin / dqave＆nlE; 0.98，并且当获得密度分布线时，存在与横坐标轴平行的直线与密度分布相交 在四点。 即使产品厚度增加，酚醛树脂发泡板也具有足够的抗压强度和导热性。