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144 条记录 (耗时 0.046 秒)

    Regulator Circuit and RFID Tag Including the Same
    4.
    发明申请
    Regulator Circuit and RFID Tag Including the Same 有权
    调节器电路和包括它的RFID标签

    公开(公告)号：US20100181985A1

    公开(公告)日：2010-07-22

    申请号：US12686579

    申请日：2010-01-13

    申请人： Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

    发明人： Hiroki Inoue ,  Kiyoshi Kato ,  Shuhei Nagatsuka ,  Koichiro Kamata ,  Tsutomu Murakawa ,  Takahiro Tuji ,  Kaori Ikada

    IPC分类号： G05F3/16

    CPC分类号： G05F3/16 ,  G05F1/56 ,  G05F3/242

    摘要： One object of the present invention is to provide a regulator circuit with an improved noise margin. In a regulator circuit including a bias circuit generating a reference voltage on the basis of the potential difference between a first power supply terminal and a second power supply terminal, and a voltage regulator outputting a potential to an output terminal on the basis of a reference potential input from the bias circuit, a bypass capacitor is provided between a power supply terminal and a node to which a gate of a transistor included in the bias circuit is connected.

    摘要翻译： 本发明的一个目的是提供一种具有改善的噪声容限的调节器电路。 在包括基于第一电源端子和第二电源端子之间的电位差产生参考电压的偏置电路的调节器电路中，以及基于参考电位向输出端子输出电位的电压调节器 在偏置电路的输入端，在电源端子与偏置电路中包含的晶体管的栅极连接的节点之间设置有旁路电容器。

    Semiconductor device with memory cells
    5.
    发明授权
    Semiconductor device with memory cells 有权
    具有存储单元的半导体器件

    公开(公告)号：US08502292B2

    公开(公告)日：2013-08-06

    申请号：US13182488

    申请日：2011-07-14

    申请人： Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Hiroki Inoue

    发明人： Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka ,  Hiroki Inoue

    IPC分类号： H01L27/108 ,  H01L29/94

    CPC分类号： H01L27/11517 ,  G11C16/0433 ,  G11C16/26 ,  H01L27/1156 ,  H01L29/78

    摘要： A semiconductor device with a novel structure is provided, which can hold stored data even when no power is supplied and which has no limitations on the number of writing operations. A semiconductor device is formed using a material which enables off-state current of a transistor to be reduced significantly; e.g., an oxide semiconductor material which is a wide-gap semiconductor. With use of a semiconductor material which enables off-state current of a transistor to be reduced significantly, the semiconductor device can hold data for a long period. In a semiconductor device with a memory cell array, parasitic capacitances generated in the nodes of the first to the m-th memory cells connected in series are substantially equal, whereby the semiconductor device can operate stably.

    摘要翻译： 提供具有新颖结构的半导体器件，其即使在没有供电的情况下也可以保存存储的数据，并且对写入操作的数量没有限制。 使用能够显着降低晶体管的截止电流的材料形成半导体器件; 例如，作为宽间隙半导体的氧化物半导体材料。 通过使用能够显着降低晶体管的截止电流的半导体材料，半导体器件可以长期保存数据。 在具有存储单元阵列的半导体器件中，在串联连接的第一至第m存储器单元的节点中产生的寄生电容基本相等，由此半导体器件可以稳定地工作。

    Semiconductor device
    6.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08488394B2

    公开(公告)日：2013-07-16

    申请号：US13197839

    申请日：2011-08-04

    申请人： Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

    发明人： Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

    IPC分类号： G11C7/00

    CPC分类号： G11C7/00 ,  G11C11/403 ,  G11C11/4087 ,  H01L27/11517 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225

    摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in off-state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided.

    摘要翻译： 目的是提供具有新颖结构的半导体器件，其即使在不提供电力且具有无限数量的写周期的情况下也可以保存存储的数据。 使用包括诸如氧化物半导体的宽带隙半导体的存储单元形成半导体器件。 半导体器件包括具有输出低于用于从存储单元读取数据的参考电位的电位的功能的电位变化电路。 当使用允许充分降低包含在存储单元中的晶体管的截止电流的宽带隙半导体时，可以提供能够长期保存数据的半导体器件。

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08411480B2

    公开(公告)日：2013-04-02

    申请号：US13082464

    申请日：2011-04-08

    申请人： Shuhei Nagatsuka ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Hiroki Inoue

    发明人： Shuhei Nagatsuka ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Hiroki Inoue

    IPC分类号： G11C5/06

    CPC分类号： G11C11/4093 ,  G11C11/405 ,  G11C11/4074 ,  G11C11/4085 ,  G11C11/4096 ,  H01L27/1156 ,  H01L27/1203

    摘要： An object is to provide a semiconductor device having a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor. The memory cell includes a writing transistor, a reading transistor, and a selecting transistor. Using a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and holding data for a long time can be provided.

    摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也能够保存存储的数据。 半导体器件包括具有宽栅半导体的存储单元，例如氧化物半导体。 存储单元包括写入晶体管，读取晶体管和选择晶体管。 使用宽栅半导体，可以提供能够充分降低存储单元中包含的晶体管的截止电流并长时间保持数据的半导体器件。

    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE 有权
    用于驱动半导体器件的半导体器件和方法

    公开(公告)号：US20120033486A1

    公开(公告)日：2012-02-09

    申请号：US13195089

    申请日：2011-08-01

    申请人： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

    发明人： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

    IPC分类号： G11C11/24 ,  H01L27/06 ,  H01L29/04

    CPC分类号： G11C16/0408 ,  G11C11/405 ,  G11C16/02

    摘要： It is an object to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and does not have a limitation on the number of writing operations. A semiconductor device includes a plurality of memory cells each including a transistor including a first semiconductor material, a transistor including a second semiconductor material that is different from the first semiconductor material, and a capacitor, and a potential switching circuit having a function of supplying a power supply potential to a source line in a writing period. Thus, power consumption of the semiconductor device can be sufficiently suppressed.

    摘要翻译： 本发明的目的是提供一种具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保持存储的数据，并且对写入操作的数量没有限制。 半导体器件包括多个存储单元，每个存储单元包括包括第一半导体材料的晶体管，包括与第一半导体材料不同的第二半导体材料的晶体管，以及电容器，以及电位切换电路， 在写作期间的电源供应潜力。 因此，可以充分地抑制半导体器件的功耗。

    Semiconductor device and driving method thereof
    10.
    发明授权
    Semiconductor device and driving method thereof 有权
    半导体装置及其驱动方法

    公开(公告)号：US08654566B2

    公开(公告)日：2014-02-18

    申请号：US13221947

    申请日：2011-08-31

    申请人： Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

    发明人： Shuhei Nagatsuka ,  Takanori Matsuzaki ,  Hiroki Inoue ,  Kiyoshi Kato

    IPC分类号： G11C11/24

    CPC分类号： G11C11/403 ,  G11C16/0433 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1156 ,  H01L27/1225 ,  H01L29/7869

    摘要： The semiconductor device includes a memory cell including a first transistor including a first channel formation region, a first gate electrode, and first source and drain regions; a second transistor including a second channel formation region provided so as to overlap with at least part of either of the first source region or the first drain region, a second source electrode, a second drain electrode electrically connected to the first gate electrode, and a second gate electrode; and an insulating layer provided between the first transistor and the second transistor. In a period during which the second transistor needs in an off state, at least when a positive potential is supplied to the first source region or the first drain region, a negative potential is supplied to the second gate electrode.

    摘要翻译： 半导体器件包括存储单元，其包括第一晶体管，第一晶体管包括第一沟道形成区，第一栅电极以及第一源区和漏区; 第二晶体管，包括设置成与第一源极区域或第一漏极区域中的至少一部分重叠的第二沟道形成区域，第二源极电极，电连接到第一栅极电极的第二漏极电极，以及 第二栅电极; 以及设置在第一晶体管和第二晶体管之间的绝缘层。 在第二晶体管需要处于截止状态的期间中，至少当向第一源极区域或第一漏极区域提供正电位时，向第二栅电极提供负电位。