公开(公告)号：US07837791B2

公开(公告)日：2010-11-23

申请号：US12153726

申请日：2008-05-23

申请人： Hiroki Murakami ,  Masahiko Okui ,  Hiroshi Asano

发明人： Hiroki Murakami ,  Masahiko Okui ,  Hiroshi Asano

IPC分类号： C30B15/22

CPC分类号： C30B29/06 ,  C30B15/203

摘要： A silicon single crystal wafer for a particle monitor is presented, which wafer has an extremely small amount in the surface density of light point defects and is capable of still maintaining a small surface density even after repeating the SC-1. The wafer is prepared by slicing a silicon single crystal ingot including an area in which crystal originated particles are generated, and the surface density of particles having a size of not less than 0.12 mum is not more than 15 counts/cm2 after repeating the SC-1. More preferably, a silicon single crystal wafer having a nitrogen concentration of 1×1013 1×1015 atoms/cm3 provides a surface density of not more than 1 counts/cm2 for the particles having a diameter of not less than 0.12 mum even after repeating the SC-1. Hence, a high quality wafer optimally used for a particle monitor can be obtained and a very small number of defects in the wafer make it possible to produce devices.

摘要翻译： 提出了一种用于粒子监测器的硅单晶晶片，该晶片在光点缺陷的表面密度中具有非常小的量，并且即使在重复SC-1之后也能够保持较小的表面密度。 通过对包含产生结晶起始粒子的区域的硅单晶锭进行切片来制作晶片，并且在重复SC-层之后，尺寸不小于0.12μm的颗粒的表面密度不超过15个计数/ cm 2， 1。 更优选的是，氮浓度为1×1013×1015原子/ cm3的硅单晶晶片，即使重复使用了直径不小于0.12μm的颗粒，表面密度也不超过1个/ cm 2 SC-1。 因此，可以获得最佳地用于粒子监测器的高品质晶片，并且晶片中的非常少量的缺陷使得可以生产器件。

公开(公告)号：US20080236476A1

公开(公告)日：2008-10-02

申请号：US12153726

申请日：2008-05-23

申请人： Hiroki Murakami ,  Masahiko Okui ,  Hiroshi Asano

发明人： Hiroki Murakami ,  Masahiko Okui ,  Hiroshi Asano

IPC分类号： C30B15/00

CPC分类号： C30B29/06 ,  C30B15/203

摘要： A silicon single crystal wafer for a particle monitor is presented, which wafer has an extremely small amount in the surface density of light point defects and is capable of still maintaining a small surface density even after repeating the SC-1. The wafer is prepared by slicing a silicon single crystal ingot including an area in which crystal originated particles are generated, and the surface density of particles having a size of not less than 0.12 mum is not more than 15 counts/cm2 after repeating the SC-1. More preferably, a silicon single crystal wafer having a nitrogen concentration of 1×1013 1×1015 atoms/cm3 provides a surface density of not more than 1 counts/cm2 for the particles having a diameter of not less than 0.12 mum even after repeating the SC-1. Hence, a high quality wafer optimally used for a particle monitor can be obtained and a very small number of defects in the wafer make it possible to produce devices.

摘要翻译： 提出了一种用于粒子监测器的硅单晶晶片，该晶片在光点缺陷的表面密度中具有非常小的量，并且即使在重复SC-1之后也能够保持较小的表面密度。 通过对包括产生结晶起始粒子的区域的硅单晶锭进行切片来制作晶片，并且尺寸不小于0.12μm的颗粒的表面密度不超过15个/ cm 2， / SUP>重复SC-1。 更优选地，氮浓度为1×10 13/15 15原子/ cm 3的硅单晶晶片提供不超过1×10 15原子/ cm 3的表面密度 即使在重复SC-1之后，直径不小于0.12μm的颗粒的1个计数/ cm 2。 因此，可以获得最佳地用于粒子监测器的高品质晶片，并且晶片中的非常少量的缺陷使得可以生产器件。

公开(公告)号：US06458204B1

公开(公告)日：2002-10-01

申请号：US09717135

申请日：2000-11-22

申请人： Masahiko Okui ,  Hiroki Murakami ,  Kazuyuki Egashira ,  Makoto Ito ,  Hiroshi Hayakawa ,  Kelly Garret ,  Yoshinori Shirakawa

发明人： Masahiko Okui ,  Hiroki Murakami ,  Kazuyuki Egashira ,  Makoto Ito ,  Hiroshi Hayakawa ,  Kelly Garret ,  Yoshinori Shirakawa

IPC分类号： C30B1520

CPC分类号： C30B29/06 ,  C30B15/203 ,  C30B15/305

摘要： A method of producing high-quality and large-diameter single crystals by the Czochralski method is disclosed which can provide wafers with a minimized number of such grown-in defects as dislocation clusters and laser scattering tomography defects. Specifically, it is a method of producing silicon single crystals which comprises carrying out the crystal pulling while maintaining the solid-melt interface during pulling in the shape of an upward convex with the central portion of the interface being higher by at least 5 mm than the peripheral region thereof and while applying a magnetic field, and optionally in addition to the above, while maintaining the temperature gradient in the direction of axis of pulling in the peripheral region at a level lower than that in the central portion in the range of from the melting point to 1,200° C. In this case, it is desirable that the portion of the single crystal surface lying at least 50 mm above the melt surface be shielded from direct radiant heat from the heater and/or crucible wall, that a horizontal magnetic field of 0.08 to 0.3 T be applied in parallel with the melt surface or a cusped magnetic field showing an intensity of 0.02 to 0.07 T at a crucible wall site on the melt surface be applied and that the crucible be rotated at a speed of not more than 5 min−1 and the single crystal at a speed of not less than 13 min−1.

摘要翻译： 公开了通过Czochralski方法生产高质量和大直径单晶的方法，其可以为晶片提供最少数量的诸如位错簇和激光散射层析成像缺陷的这种生长缺陷。 具体地说，它是一种生产硅单晶的方法，其中包括在拉伸成呈向上凸起的形状的同时保持固溶体界面的同时进行晶体拉伸，其中界面的中心部分高​​于 并且在施加磁场的同时，并且可选地除了上述之外，同时保持在周边区域中的拉动轴线方向上的温度梯度比在中心部分的温度梯度低 熔点为1200℃。在这种情况下，希望在熔体表面上方至少50毫米的单晶表面的部分被屏蔽不受来自加热器和/或坩埚壁的直接辐射热，即水平磁 在熔融表面上的坩埚壁部位处，与熔体表面平行施加0.08〜0.3T的场，或者表示强度为0.02〜0.07T的尖细磁场b 并且坩埚以不超过5分钟-1的速度旋转，并且单晶以不小于13分钟-1的速度旋转。

公开(公告)号：US09112488B2

公开(公告)日：2015-08-18

申请号：US13303153

申请日：2011-11-23

申请人： Hiroki Murakami

发明人： Hiroki Murakami

IPC分类号： G11C7/10 ,  G11C7/22 ,  G11C5/14 ,  H03K19/00 ,  G11C16/20 ,  G11C16/30

CPC分类号： H03K19/0016 ,  G11C5/147 ,  G11C5/148 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/225 ,  G11C16/20 ,  G11C16/30 ,  G11C2207/2227

摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。

公开(公告)号：US09006021B2

公开(公告)日：2015-04-14

申请号：US13094043

申请日：2011-04-26

申请人： Kazuhide Hasebe ,  Hiroki Murakami ,  Akinobu Kakimoto

发明人： Kazuhide Hasebe ,  Hiroki Murakami ,  Akinobu Kakimoto

IPC分类号： H01L21/00 ,  C23C16/24 ,  C23C16/02

CPC分类号： H01L21/76843 ,  C23C16/0272 ,  C23C16/24 ,  C23C16/52 ,  H01L21/76876

摘要： The amorphous silicon film formation method includes forming a seed layer on the surface of a base by heating the base and flowing aminosilane-based gas onto the heated base; and forming an amorphous silicon film on the seed layer by heating the base, supplying silane-based gas containing no amino group onto the seed layer on the surface of the heated base, and thermally decomposing the silane-based gas containing no amino group.

摘要翻译： 非晶硅膜形成方法包括通过加热基底并将氨基硅烷基气体流动到加热的基底上在基底的表面上形成籽晶层; 通过加热基底，在加热的基体的表面上的种子层上供给不含氨基的硅烷系气体，将不含氨基的硅烷类气体进行热分解，在种子层上形成非晶硅膜。

公开(公告)号：US08753984B2

公开(公告)日：2014-06-17

申请号：US13332691

申请日：2011-12-21

申请人： Hiroki Murakami ,  Yosuke Watanabe ,  Kazuhide Hasebe

发明人： Hiroki Murakami ,  Yosuke Watanabe ,  Kazuhide Hasebe

IPC分类号： H01L21/20

CPC分类号： C23C16/345 ,  C23C16/45525

摘要： A method of forming a silicon nitride film on the surface of an object to be processed, the method including forming a seed layer functioning as a seed of the silicon nitride film on the surface of the object to be processed by using at least an aminosilane-based gas, prior to forming the silicon nitride film on the surface of the object to be processed.

摘要翻译： 一种在待处理物体的表面上形成氮化硅膜的方法，该方法包括通过使用至少一种氨基硅烷化合物形成在待加工物体的表面上起氮化硅膜的晶种的种子层的作用， 在将待加工物体的表面上形成氮化硅膜之前。

公开(公告)号：US20140033752A1

公开(公告)日：2014-02-06

申请号：US14113025

申请日：2011-06-01

申请人： Munehisa Gunjima ,  Hiroki Murakami

发明人： Munehisa Gunjima ,  Hiroki Murakami

IPC分类号： B60H1/00

CPC分类号： B60H1/00021 ,  B60H1/00207 ,  B60H1/00371 ,  B60H1/008 ,  B60H1/00849 ,  B60H2001/00221 ,  B61D27/0072

摘要： In vehicle air-conditioning devices including a refrigerant circuit having a compressor, an outdoor heat exchanger, an expansion device, and an indoor heat exchanger that are connected by refrigerant pipes to form a refrigeration cycle; an indoor air-sending device that supplies air to the indoor heat exchanger; and an outdoor air-sending device that supplies air to the outdoor heat exchanger, the refrigerant circuit is installed under the floor of a vehicle and uses carbon dioxide as the refrigerant.

摘要翻译： 在包括具有压缩机，室外热交换器，膨胀装置和室内热交换器的制冷剂回路的车辆用空调装置中，通过制冷剂管连接而形成制冷循环; 向室内热交换器供给空气的室内送风装置; 以及向室外热交换器供给空气的室外送风装置，将制冷剂回路安装在车辆的地板下方，并使用二氧化碳作为制冷剂。

公开(公告)号：US20120287712A1

公开(公告)日：2012-11-15

申请号：US13303153

申请日：2011-11-23

申请人： Hiroki Murakami

发明人： Hiroki Murakami

IPC分类号： G11C16/04 ,  H03K19/00 ,  H03K19/20 ,  G11C5/06 ,  H03K19/096

CPC分类号： H03K19/0016 ,  G11C5/147 ,  G11C5/148 ,  G11C7/1057 ,  G11C7/1084 ,  G11C7/225 ,  G11C16/20 ,  G11C16/30 ,  G11C2207/2227

摘要： A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

摘要翻译： 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp，Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极，将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp，Tn的栅极和源极之间的电压幅度大于晶体管Tp，Tn的阈值。

公开(公告)号：US07835667B2

公开(公告)日：2010-11-16

申请号：US12025825

申请日：2008-02-05

申请人： Shigeo Ohno ,  Tsutomu Sugimoto ,  Tomoya Ichikawa ,  Yasuo Takayama ,  Yoji Yamaguchi ,  Yoshitaka Kuroda ,  Tohru Inoue ,  Kuniaki Tanaka ,  Takahiro Shinkawa ,  Hiroki Murakami

发明人： Shigeo Ohno ,  Tsutomu Sugimoto ,  Tomoya Ichikawa ,  Yasuo Takayama ,  Yoji Yamaguchi ,  Yoshitaka Kuroda ,  Tohru Inoue ,  Kuniaki Tanaka ,  Takahiro Shinkawa ,  Hiroki Murakami

IPC分类号： G03G15/02

CPC分类号： G03G15/0291 ,  G03G2215/027

摘要： A discharger includes: a discharge electrode member that is placed opposedly to a member to be charged; an opposed electrode member that is placed opposedly to the discharge electrode member; and a power source circuit that applies a discharge voltage for generating a discharge between the discharge electrode member and the opposed electrode member, and the electrode member having a surface that includes a covered layer covered by a covering material is formed on a surface opposed thereto, and the covering material containing a carbon atom, or a carbon atom and another atom or other plural atoms as a main component, and having an SP3 structure by a carbon atom.

摘要翻译： 放电器包括：与要充电的元件相对放置的放电电极元件; 与放电电极部件相对设置的对置电极部件; 以及电源电路，其施加用于在放电电极构件和相对电极构件之间产生放电的放电电压，并且具有包括被覆盖材料覆盖的覆盖层的表面的电极构件形成在与其相对的表面上， 和含有碳原子，碳原子和其它原子或其它多个原子作为主要成分并且具有通过碳原子的SP 3结构的覆盖材料。

公开(公告)号：US07810052B2

公开(公告)日：2010-10-05

申请号：US11785897

申请日：2007-04-20

申请人： Katsushi Aoki ,  Junya Yamasaki ,  Hiroki Murakami

发明人： Katsushi Aoki ,  Junya Yamasaki ,  Hiroki Murakami

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： A logical-group creating unit creates a logical group from a cell included in a selected range of a logical drawing that is specified in a logical page. A logical-group extracting unit extracts a same/similar logical group by determining whether logical drawings of created logical groups are same or similar to each other. A pattern creating unit creates an implementation pattern of a logical group included in extracted same/similar logical group.

摘要翻译： 逻辑组创建单元从在逻辑页面中指定的逻辑绘图的选定范围中包括的单元创建逻辑组。 逻辑组提取单元通过确定所创建的逻辑组的逻辑图是否相同或相似来提取相同/相似的逻辑组。 模式创建单元创建包括在提取的相同/相似的逻辑组中的逻辑组的实现模式。