公开(公告)号：US4351099A

公开(公告)日：1982-09-28

申请号：US149621

申请日：1980-05-12

申请人： Hiromitsu Takagi ,  Shotaro Umebachi ,  Gota Kano ,  Iwao Teramoto

发明人： Hiromitsu Takagi ,  Shotaro Umebachi ,  Gota Kano ,  Iwao Teramoto

IPC分类号： H01L21/033 ,  H01L21/337 ,  H01L29/80 ,  H01L29/808 ,  H01L21/31 ,  H01L21/225 ,  H01L21/265

CPC分类号： H01L29/66909 ,  H01L21/033 ,  H01L29/80 ,  H01L29/808

摘要： A novel self-align type method of making an FET with a very short gate length and a good high frequency characteristic, and a low noise characteristic, the method comprising the steps of:forming on a silicon epitaxial layer (13) of n-type conductivity a doped oxide film (14) containing boron as an impurity to give p-type conductivity,forming a mask (15a, 16a) containing Si.sub.3 N.sub.4 film and having a width larger than that of a gate region (19) to be formed on said n-type epitaxial layer (13),etching said doped oxide film (14) by utilizing said mask (15a, 16a) as an etching mask to expose surface of said silicon crystal layer (13) in a manner that sides of the part of said doped oxide film (14) covered by said mask (15, 16a) are side-etched by a predetermined width,ion-implanting an impurity of said first conductivity type into said n-type epitaxial layer (13) by utilizing said mask as implanting mask, andcarrying out a heat treating thereby diffusing said second conductivity type impurity from said doped oxide film (14) retained only under said mask into said n-type epitaxial layer (13) to form said gate region (19) and driving said ion-implanted first conductivity type impurity into said silicon crystal layer (13) to form a source region (17) and a drain region (18).

摘要翻译： 一种制造具有非常短的栅极长度和良好的高频特性以及低噪声特性的FET的新型自对准型方法，该方法包括以下步骤：在n型硅外延层（13）上形成 电导率为含有硼作为杂质的掺杂氧化物膜（14）以产生p型导电性，形成包含Si 3 N 4膜的掩模（15a，16a），其宽度大于所述栅极区域（19）的宽度 通过利用所述掩模（15a，16a）作为蚀刻掩模蚀刻所述掺杂氧化物膜（14），以使得所述硅晶体层（13）的所述一部分的侧面 将由所述掩模（15,16a）覆盖的所述掺杂氧化物膜（14）以预定宽度进行侧蚀刻，通过利用所述掩模将所述第一导电类型的杂质离子注入所述n型外延层（13） 植入掩模，并进行热处理，从而扩散所述第二导电型不动杆 将所述掺杂氧化物膜（14）保留在所述掩模内的所述n型外延层（13）中以形成所述栅极区域（19）并将所述离子注入的第一导电类型杂质驱动到所述硅晶体层（13）中， 以形成源极区（17）和漏极区（18）。

公开(公告)号：US4194927A

公开(公告)日：1980-03-25

申请号：US923689

申请日：1978-07-11

申请人： Hiromitsu Takagi ,  Gota Kano ,  Iwao Teramoto

发明人： Hiromitsu Takagi ,  Gota Kano ,  Iwao Teramoto

IPC分类号： H01L21/3105 ,  H01L21/324 ,  H01L7/36 ,  H01L7/44

CPC分类号： H01L21/3105 ,  H01L21/3245

摘要： In the process of forming a thermal oxide film or heat treatment of an oxide film in making a semiconductor device comprising a compound semiconductor of arsenic, the semiconductor is handled in an atmosphere containing arsenic oxide vapor in order to prevent evaporation of the arsenic tri-oxide in the thermal oxidation film or the oxide film under heat treatment, thereby to form a thermal oxide film having good chemical stability and good electrical characteristics, or to improve the oxide film so as to have good chemical stability and good electrical characteristics.

摘要翻译： 在制造包含砷化合物半导体的半导体器件中形成热氧化膜或氧化膜的热处理的过程中，在含有氧化砷蒸汽的气氛中处理半导体，以防止三氧化砷的蒸发 在热氧化膜或氧化膜中进行热处理，从而形成具有良好的化学稳定性和良好的电特性的热氧化膜，或改善氧化膜以具有良好的化学稳定性和良好的电特性。

公开(公告)号：US4053798A

公开(公告)日：1977-10-11

申请号：US658052

申请日：1976-02-13

申请人： Susumu Koike ,  Gota Kano ,  Iwao Teramoto

发明人： Susumu Koike ,  Gota Kano ,  Iwao Teramoto

IPC分类号： G11C11/36 ,  G11C14/00 ,  H01L27/06 ,  H01L27/092 ,  H03K3/3565 ,  G11C11/40 ,  G11C5/02 ,  H01L29/78 ,  H03K3/353

CPC分类号： H03K3/3565 ,  G11C11/36 ,  G11C14/00 ,  H01L27/0629 ,  H01L27/0927 ,  G11C2211/5614

摘要： A negative resistance device formed by series-connection of a complementary pair of insulated gate type FETs (field effect transistors), the source of the FETs being connected to each other and the gates of each of the FETs being connected to the respective drain of the other FET at least one FET having a double layered gate insulation film under the gate electrode, thereby forming a non-volatile memory element. The negative resistance device acquires or loses negative resistance characteristics by responding to signals to the gates, thereby memorizing the signals and resulting in a highly efficient memory which requires little power in writing-in, erasing and memory-holding.

公开(公告)号：US4432092A

公开(公告)日：1984-02-14

申请号：US270351

申请日：1981-06-04

申请人： Iwao Teramoto ,  Takashi Sugino ,  Kunio Itoh

发明人： Iwao Teramoto ,  Takashi Sugino ,  Kunio Itoh

IPC分类号： H01S5/00 ,  H01S5/20 ,  H01S5/22 ,  H01S5/223 ,  H01S3/19

CPC分类号： H01S5/22 ,  H01S5/20 ,  H01S5/2059 ,  H01S5/2202 ,  H01S5/2231

摘要： A very narrow current injection region (16") is made by means of terrace-shaping of the surface of the current limiting layer (13) forming a step thereon, the current limiting layer being on the epitaxially grown double hetero structure layers (10, 11 and 12) including the active layer (11). By so terrace-shaping, when Zn as a p-type impurity to form the current injection region (16) is diffused from the surface of the current limiting layer (13), the diffused region is formed to have a deeper part (16") and a shallower part (16'), and the deeper part (16") can be made very narrow by selecting the position of the stripe-shaped diffused region with respect to the step (14).

摘要翻译： 通过对在其上形成台阶的限流层（13）的表面进行露台成形来制造非常窄的电流注入区域（16“），限流层位于外延生长的双异质结构层（10” ，11和12），包括有源层（11）。 通过这样的露台成形，当形成电流注入区域（16）的作为p型杂质的Zn从限流层（13）的表面扩散时，扩散区域形成为具有较深部分（16' '）和较浅部分（16'），并且通过相对于台阶（14）选择条形扩散区域的位置，可以使较深部分（16“）非常窄。

公开(公告)号：US4675074A

公开(公告)日：1987-06-23

申请号：US761023

申请日：1985-07-31

申请人： Masaru Wada ,  Hirokazu Shimizu ,  Takao Shibutani ,  Kunio Itoh ,  Ken Hamada ,  Iwao Teramoto

发明人： Masaru Wada ,  Hirokazu Shimizu ,  Takao Shibutani ,  Kunio Itoh ,  Ken Hamada ,  Iwao Teramoto

IPC分类号： H01L21/306 ,  H01L33/00 ,  H01S5/20 ,  H01S5/22 ,  H01S5/223 ,  H01S5/323 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： H01S5/2232 ,  H01L21/30612 ,  H01L21/30617 ,  H01L33/0062 ,  H01S5/32308 ,  H01S5/2081 ,  H01S5/2201 ,  H01S5/32316

摘要： The invention provides a chemical etching method for a semiconductor device, which comprises a step of forming a first layer of Ga.sub.1-x Al.sub.x As (0.ltoreq.x . The slope angle of etch face of the second layer depends on the mol fraction y of the second layer, and the slope angle of etch face of the first layer depends on the mol fraction y of the second layer and the mol fraction x of the first layer. These facts are best utilized in the invention so that the etch profile of the first layer may have a desired slope angle. By utilizing this chemical etching method it is possible to produce by chemical etching a semiconductor laser having a flat cavity facet perpendicular to a junction; it is also possible to provide an inner stripe type semiconductor laser having grooves whose side walls are perpendicular.

摘要翻译： 本发明提供一种用于半导体器件的化学蚀刻方法，其包括形成具有表面（100）的第一层Ga 1-x Al x As（0 的方向化学蚀刻所述层的步骤。 第二层的蚀刻面的倾斜角取决于第二层的摩尔分数y，第一层的蚀刻面的倾斜角取决于第二层的摩尔分数y和第一层的摩尔分数x 层。 这些事实在本发明中最好地利用，使得第一层的蚀刻轮廓可以具有期望的倾斜角。 通过利用这种化学蚀刻方法，可以通过化学蚀刻具有垂直于结的平坦腔面的半导体激光器来制造; 也可以提供具有侧壁垂直的槽的内条型半导体激光器。

公开(公告)号：US4651322A

公开(公告)日：1987-03-17

申请号：US754195

申请日：1985-07-10

申请人： Hirokazu Shimizu ,  Kunio Itoh ,  Takashi Sugino ,  Masaru Wada ,  Iwao Teramoto ,  Kazuo Fujimoto

发明人： Hirokazu Shimizu ,  Kunio Itoh ,  Takashi Sugino ,  Masaru Wada ,  Iwao Teramoto ,  Kazuo Fujimoto

IPC分类号： H01S5/00 ,  H01S5/028 ,  H01S5/223 ,  H01S3/19

CPC分类号： H01S5/2238 ,  H01S5/028

摘要： In a laser of such type that the distribution of the effective refractive index varies in a direction which is along the face of its active layer and perpendicular to the direction of the laser light transmission, thereby defining the active region to be between a pair of refractive index changing zones, the refractive indexes of a pair of end surfaces of a laser resonator (i.e. the active region) is made smaller than the intrinsic refractive indexes of the cleavage face of the active layer.

摘要翻译： 在这种类型的激光器中，有效折射率的分布沿着其有源层的面并且垂直于激光传输的方向的方向变化，从而将有源区域限定在一对折射率 折射率变化区域，使激光谐振器（即有源区域）的一对端面的折射率小于有源层的解理面的固有折射率。

公开(公告)号：US3937949A

公开(公告)日：1976-02-10

申请号：US365242

申请日：1973-05-30

申请人： Kiyotsugu Ishikawa ,  Tetsuo Kobune ,  Hitoo Iwasa ,  Iwao Teramoto

发明人： Kiyotsugu Ishikawa ,  Tetsuo Kobune ,  Hitoo Iwasa ,  Iwao Teramoto

IPC分类号： G03B17/00 ,  H03J9/00 ,  H03J9/06 ,  H04B10/00 ,  H04B10/114 ,  H04N5/00 ,  H04B9/00

CPC分类号： H04B10/114 ,  H03J9/06

摘要： An improvement in optical remote-control apparatus which comprises a light-beam transmitter and a light-receiver, wherein the improvement is that a light-scattering (i.e., light-diffusing) plate having a suitable area is provided in front of the light-receiver, so that the aiming tolerance of the light-beam transmitter becomes broader, enabling easy remote-control.

摘要翻译： 光学遥控装置的改进包括光束发射器和光接收器，其中改进之处在于，具有合适区域的光散射（即，光扩散） 接收器，使得光束发射器的瞄准公差变得更宽，使得易于远程控制。