公开(公告)号：US20070262374A1

公开(公告)日：2007-11-15

申请号：US11878296

申请日：2007-07-23

申请人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

摘要： After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

公开(公告)号：US20060228899A1

公开(公告)日：2006-10-12

申请号：US11441237

申请日：2006-05-26

申请人： Hiroyuki Nansei ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Hiroyuki Nansei ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/31 ,  H01L21/336

CPC分类号： H01L21/0234 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02326 ,  H01L21/02332 ,  H01L21/3145 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  H01L27/11568 ,  Y10S438/954

摘要： After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a silicon nitride film. Subsequently, a surface layer of the silicon nitride film is oxidized by a plasma oxidizing method to be replaced by an upper silicon oxide film. An ONO film as a multilayered insulating film composed of the lower silicon oxide film, the silicon nitride film, and the upper silicon oxide film is formed.

公开(公告)号：US07098147B2

公开(公告)日：2006-08-29

申请号：US10643967

申请日：2003-08-20

申请人： Hiroyuki Nansei ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Hiroyuki Nansei ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/31

CPC分类号： H01L27/11568 ,  H01L21/3145 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11546 ,  Y10S438/954

摘要： After a lower silicon oxide film is formed on a silicon region, a silicon film is formed on the lower silicon oxide film by, for example, a thermal CVD method. Subsequently, the silicon film is completely nitrided by a plasma nitriding method to be replaced by a silicon nitride film. Subsequently, a surface layer of the silicon nitride film is oxidized by a plasma oxidizing method to be replaced by an upper silicon oxide film. An ONO film as a multilayered insulating film composed of the lower silicon oxide film, the silicon nitride film, and the upper silicon oxide film is formed.

摘要翻译： 在硅区域上形成下部氧化硅膜之后，通过例如热CVD法在下部氧化硅膜上形成硅膜。 随后，通过等离子体氮化方法将硅膜完全氮化，由氮化硅膜代替。 随后，通过等离子体氧化方法氧化氮化硅膜的表面层，以被上部氧化硅膜代替。 形成作为由下部氧化硅膜，氮化硅膜和上部氧化硅膜构成的多层绝缘膜的ONO膜。

公开(公告)号：US07253046B2

公开(公告)日：2007-08-07

申请号：US11065305

申请日：2005-02-25

申请人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/8238

CPC分类号： H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

摘要： After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

摘要翻译： 在通过使用具有径向线槽天线的等离子体处理器通过等离子体氮化方法形成的氮化硅膜（22）夹在氧化硅膜（21），（23）上的ONO膜之后，位线扩散层（17） ）通过离子注入形成在存储单元阵列区域（11）中，作为抗蚀剂图案（16）作为掩模，然后通过进一步的离子注入向氮化硅膜（22）提供晶格缺陷。 因此，可以实现在低温条件下形成高质量氮化物膜的高度可靠的半导体存储器件，此外，氮化物膜可以用作具有充分适应于 小型化和高度一体化是最近的需求。

公开(公告)号：US20050212074A1

公开(公告)日：2005-09-29

申请号：US11065307

申请日：2005-02-25

申请人： Kentaro Sera ,  Hiroyuki Nansei ,  Manabu Nakamura ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Kentaro Sera ,  Hiroyuki Nansei ,  Manabu Nakamura ,  Masahiko Higashi ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L29/00

CPC分类号： H01L21/76235

摘要： A trench (4) is formed in a semiconductor substrate (1), and then a plasma oxynitride film (5) is formed on a side wall surface and a bottom surface of the trench (4) at a temperature of approximately 300° C. to 650° C. At such a temperature, no outward diffusion of impurities from the semiconductor substrate (1) occurs. Therefore, any problems such as formation of a parasitic transistor hardly occur even when ions of impurities are not implanted thereafter. After the plasma oxynitride film (5) is formed, it is thermally oxidized, and a portion where the outermost surface of the semiconductor substrate (1) meets the wall surface of the trench (4) is turned into a curved surface. As a result, the outermost surface of the semiconductor substrate (1) and the wall surface of the trench (4) meet each other while forming a curved surface, and hence a parasitic transistor is hardly formed at this portion. Consequently, formation of a hump is prevented, thereby achieving favorable characteristics.

摘要翻译： 在半导体衬底（1）中形成沟槽（4），然后在约300℃的温度下在沟槽（4）的侧壁表面和底表面上形成等离子体氧氮化物膜（5） 到650℃。在这样的温度下，不会发生杂质从半导体衬底（1）的向外扩散。 因此，即使其后没有植入杂质的离子，也难以形成诸如形成寄生晶体管的问题。 在形成等离子体氮氧化物膜（5）之后，其被热氧化，并且半导体衬底（1）的最外表面与沟槽（4）的壁表面相交的部分变成弯曲表面。 结果，半导体衬底（1）的最外表面和沟槽（4）的壁表面在形成弯曲表面的同时彼此相遇，因此在该部分难以形成寄生晶体管。 因此，防止形成隆起，从而获得有利的特性。

公开(公告)号：US20080265309A1

公开(公告)日：2008-10-30

申请号：US12213542

申请日：2008-06-20

申请人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/40117 ,  H01L29/66833

摘要： After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

摘要翻译： 在通过使用具有径向线槽天线的等离子体处理器通过等离子体氮化法形成的氮化硅膜（22）夹在氧化硅膜（21），（23）上的ONO膜之后，位线扩散层（17） ）通过离子注入形成在存储单元阵列区域（11）中，作为抗蚀剂图案（16）作为掩模，然后通过进一步的离子注入向氮化硅膜（22）提供晶格缺陷。 因此，可以实现在低温条件下形成高质量氮化物膜的高度可靠的半导体存储器件，此外，氮化物膜可以用作具有充分适应于 小型化和高度一体化是最近的需求。

公开(公告)号：US07410857B2

公开(公告)日：2008-08-12

申请号：US11878296

申请日：2007-07-23

申请人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/8238

CPC分类号： H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

摘要： After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

公开(公告)号：US20050224866A1

公开(公告)日：2005-10-13

申请号：US11065305

申请日：2005-02-25

申请人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Masahiko Higashi ,  Manabu Nakamura ,  Kentaro Sera ,  Hiroyuki Nansei ,  Yukihiro Utsuno ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/3115 ,  H01L21/318 ,  H01L21/336 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/0217 ,  H01L21/022 ,  H01L21/02252 ,  H01L21/28282 ,  H01L21/31155 ,  H01L21/3185 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/66833

摘要： After an ONO film in which a silicon nitride film (22) formed by a plasma nitriding method using a plasma processor having a radial line slot antenna is sandwiched by silicon oxide films (21), (23), a bit line diffusion layer (17) is formed in a memory cell array region (11) by an ion implantation as a resist pattern (16) taken as a mask, then lattice defects are given to the silicon nitride film (22) by a further ion implantation. Accordingly, a highly reliable semiconductor memory device can be realized, in which a high quality nitride film is formed in a low temperature condition, in addition, the nitride film can be used as a charge trap film having a charge capture function sufficiently adaptable for a miniaturization and a high integration which are recent demands.

摘要翻译： 在通过使用具有径向线槽天线的等离子体处理器通过等离子体氮化方法形成的氮化硅膜（22）夹在氧化硅膜（21），（23）上的ONO膜之后，位线扩散层（17） ）通过离子注入形成在存储单元阵列区域（11）中，作为抗蚀剂图案（16）作为掩模，然后通过进一步的离子注入向氮化硅膜（22）提供晶格缺陷。 因此，可以实现在低温条件下形成高质量氮化物膜的高度可靠的半导体存储器件，此外，氮化物膜可以用作具有充分适应于 小型化和高度一体化是最近的需求。

公开(公告)号：US20050212035A1

公开(公告)日：2005-09-29

申请号：US11065306

申请日：2005-02-25

申请人： Yukihiro Utsuno ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Hiroyuki Nansei ,  Hideo Takagi ,  Tatsuya Kajita

发明人： Yukihiro Utsuno ,  Manabu Nakamura ,  Kentaro Sera ,  Masahiko Higashi ,  Hiroyuki Nansei ,  Hideo Takagi ,  Tatsuya Kajita

IPC分类号： H01L21/28 ,  H01L21/8246 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/51 ,  H01L29/788

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/513 ,  H01L29/518 ,  H01L29/7883

摘要： Tunnel insulating films (3) are formed in element regions demarcated by element isolation insulating films (2). Thereafter, for each memory cell, a floating gate (4) is formed, and an ONO film (5) and a control gate (6) are further formed. Next, a plasma insulating film (7) is formed on surfaces of stacked gates. The plasma insulating film is immune to plane orientation of a base film. Therefore, the entire plasma insulating film (7) has a substantially uniform thickness, and consequently, even if the maximum thickness thereof is not as large as that of a thermal oxide film, hydrogen entrance is prevented when the interlayer insulating film is thereafter formed, and electron leakage is also prevented. The reduction in thickness of this insulating film makes it possible to reduce birds' beaks, and efficiency in erase/write of data can be enhanced.

摘要翻译： 隧道绝缘膜（3）形成在由元件隔离绝缘膜（2）划分的元件区域中。 此后，对于每个存储单元，形成浮置栅极（4），并且还形成ONO膜（5）和控制栅极（6）。 接下来，在层叠栅极的表面上形成等离子体绝缘膜（7）。 等离子体绝缘膜不受基膜的平面取向的影响。 因此，整个等离子体绝缘膜（7）的厚度基本均匀，因此即使最大厚度不如热氧化膜的厚度那样大，因此当形成层间绝缘膜时，防止了氢入口， 并且也防止电子泄漏。 该绝缘膜的厚度的减小使得可以减少鸟的喙，并且可以提高擦除/写入数据的效率。

公开(公告)号：US07820547B2

公开(公告)日：2010-10-26

申请号：US12179400

申请日：2008-07-24

申请人： Naofumi Takahata ,  Masahiko Higashi ,  Yukihiro Utsuno

发明人： Naofumi Takahata ,  Masahiko Higashi ,  Yukihiro Utsuno

IPC分类号： H01L21/4763

CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11568

摘要： A method for manufacturing a semiconductor device, the method including: forming a bit line in a semiconductor substrate; forming a plurality of word lines which intersect with the bit line at predetermined intervals on the semiconductor substrate; eliminating a portion of the plurality of word lines; forming an interlayer insulating film on the semiconductor substrate; and forming a metal plug which penetrates through the interlayer insulating film and is coupled to the bit line in a region where the portion of the plurality of word lines was eliminated.

摘要翻译： 一种制造半导体器件的方法，所述方法包括：在半导体衬底中形成位线; 在所述半导体衬底上形成与所述位线以预定间隔相交的多个字线; 消除多个字线的一部分; 在半导体衬底上形成层间绝缘膜; 以及形成穿过所述层间绝缘膜的金属插塞，并且在所述多个字线的所述部分被去除的区域中耦合到所述位线。