Non-contact sensing and reading of signals transmitted by a cable
    4.
    发明授权
    Non-contact sensing and reading of signals transmitted by a cable 有权
    通过电缆传输的信号的非接触式感测和读取

    公开(公告)号:US09306622B2

    公开(公告)日:2016-04-05

    申请号:US14482867

    申请日:2014-09-10

    Abstract: A method for sensing modulated signals in a process facility. The method includes providing a monitoring device that includes a non-contact electromagnetic sensor (EM sensor) configured to sense a modulated signal transmitted on a cable including a conductor coupled to a sensing device or apparatus in the process facility. The monitoring device further includes a non-transitory machine readable storage device and a processor. The non-transitory machine readable storage device stores a data decoding program including protocol information for identifying different communication protocols. The monitoring device is positioned in proximity to the cable for the EM sensor to detect the modulated signal. The data decoding program is implemented by the processor causing the processor to detect the modulated signal and condition the modulated signal to provide a conditioned modulated signal. The conditioned modulated signal is decoded to generate decoded signal data, and the decoded signal data is displayed.

    Abstract translation: 一种在过程设备中感测调制信号的方法。 该方法包括提供一种监测装置,其包括配置成感测在电缆上传输的调制信号的非接触电磁传感器(EM传感器),所述调制信号包括耦合到处理设备中的感测装置或设备的导体。 监视装置还包括非暂时机器可读存储装置和处理器。 非暂时机器可读存储装置存储包括用于识别不同通信协议的协议信息的数据解码程序。 监测装置位于靠近EM传感器的电缆以检测调制信号。 数据解码程序由处理器实现,使得处理器检测调制信号并调节调制信号以提供经调节的调制信号。 经调节的调制信号被解码以产生解码的信号数据,并且显示解码的信号数据。

    FSK decoding using envelope comparison in the digital domain
    6.
    发明授权
    FSK decoding using envelope comparison in the digital domain 有权
    FSK解码使用数字域中的包络比较

    公开(公告)号:US09363119B1

    公开(公告)日:2016-06-07

    申请号:US14812827

    申请日:2015-07-29

    CPC classification number: H04L27/14 H04L27/1563

    Abstract: A method of FSK decoding includes generating a pulse waveform (R'Edge) from a received FSK encoded signal (FSK signal) and a system clock (Sys_clk). From R'Edge and Sys_clk clocks are generated including a first clock and second clock framing a logic ‘0’ level of the FSK signal, and a third clock and fourth clock framing a logic ‘1’ level of the FSK signal. At least four frequency envelopes are generated from the clocks including a logic ‘0’ envelope, a logic ‘1’ envelope, a lower frequency envelope below the logic ‘0’ envelope, and an upper frequency envelope above the logic ‘1’ envelope. R'Edge is compared to the four envelopes, and a decoded output is produced, logic ‘0’ if the R'Edge overlaps the logic ‘0’ envelope, logic ‘1’ if R'Edge overlaps the logic ‘1’ envelope, and a previous output state if R'Edge does not overlap the logic ‘0’ or logic ‘1’ envelope.

    Abstract translation: FSK解码的方法包括从接收的FSK编码信号(FSK信号)和系统时钟(Sys_clk)产生脉冲波形(R'Edge)。 从R'Edge和Sys_clk时钟产生,包括构成FSK信号的逻辑“0”电平的第一时钟和第二时钟,以及构成FSK信号的逻辑“1”电平的第三时钟和第四时钟。 从包括逻辑'0'包络,逻辑'1'包络,低于逻辑“0”包络的较低频率包络以及逻辑“1”包络以上的较高频率包络的时钟产生至少四个频率包络。 将R'Edge与四个信封进行比较,并产生解码输出,如果R'Edge与逻辑“0”包络重叠,逻辑“0”,如果R'Edge与逻辑'1'信封重叠,逻辑'1' 如果R'Edge不与逻辑“0”或逻辑“1”包络重叠,则为先前的输出状态。

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