公开(公告)号：US5830786A

公开(公告)日：1998-11-03

申请号：US654030

申请日：1996-05-28

申请人： Hongyong Zhang ,  Hideki Uochi ,  Shunpei Yamazaki ,  Yasuhiko Takemura ,  Minoru Miyazaki ,  Akane Murakami ,  Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara

发明人： Hongyong Zhang ,  Hideki Uochi ,  Shunpei Yamazaki ,  Yasuhiko Takemura ,  Minoru Miyazaki ,  Akane Murakami ,  Toshimitsu Konuma ,  Akira Sugawara ,  Yukiko Uehara

IPC分类号： H01L21/02 ,  H01L21/28 ,  H01L21/3213 ,  H01L21/336 ,  H01L21/76 ,  H01L29/49 ,  H01L21/3215

CPC分类号： H01L21/02071 ,  H01L21/28079 ,  H01L21/32134 ,  H01L29/4908 ,  H01L29/66757

摘要： A process for fabricating an electronic circuit by oxidizing the surroundings of a metallic interconnection such as of aluminum, tantalum, and titanium, wherein anodic oxidation is effected at a temperature not higher than room temperature, preferably, at 10.degree. C. or lower, and more preferably, at 0.degree. C. or lower. The surface oxidation rate of a metallic interconnection can be maintained constant to provide a surface free of irregularities.

摘要翻译： 通过氧化诸如铝，钽和钛的金属互连的周围来制造电子电路的方法，其中阳极氧化在不高于室温，优选在10℃或更低的温度下进行，以及 更优选在0℃以下。 金属互连的表面氧化速率可以保持恒定，以提供没有凹凸的表面。

公开(公告)号：US5650636A

公开(公告)日：1997-07-22

申请号：US456404

申请日：1995-06-01

申请人： Yasuhiko Takemura ,  Toshiji Hamatani ,  Toshimitsu Konuma ,  Jun Koyama ,  Yuji Kawasaki ,  Hongyong Zhang ,  Shunpei Yamazaki

发明人： Yasuhiko Takemura ,  Toshiji Hamatani ,  Toshimitsu Konuma ,  Jun Koyama ,  Yuji Kawasaki ,  Hongyong Zhang ,  Shunpei Yamazaki

IPC分类号： G02F1/1362 ,  G09G3/36 ,  H01L29/786 ,  H01L29/04

CPC分类号： H01L27/12 ,  G02F1/13624 ,  G09G3/3648 ,  H01L29/78645 ,  H01L29/78696 ,  G02F2001/13685 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2320/0214 ,  H01L27/124 ,  H01L29/78621

摘要： A structure for reducing the OFF current of an active matrix display. In the active matrix display, plural TFTs are connected in series with each one pixel electrode. Of these TFTs connected in series, at least one TFT excluding the TFTs located at opposite ends is maintained in conduction. Alternatively, at least one capacitor is connected between the junction of the drain and source of each TFT connected in series and an AC grounded point. Thus, the amount of electric charge released from auxiliary capacitors during cutoff of the TFTs is reduced.

摘要翻译： 一种用于降低有源矩阵显示器的截止电流的结构。 在有源矩阵显示器中，多个TFT与每个像素电极串联连接。 在串联连接的这些TFT中，除了位于相对端的TFT之外的至少一个TFT保持导通。 或者，至少一个电容器连接在串联连接的每个TFT的漏极和源极的接点与AC接地点之间。 因此，在TFT的截止期间从辅助电容器释放的电荷量减少。

公开(公告)号：US06259117B1

公开(公告)日：2001-07-10

申请号：US09475245

申请日：1999-12-30

申请人： Yasuhiko Takemura ,  Toshiji Hamatani ,  Toshimitsu Konuma ,  Jun Koyama ,  Yuji Kawasaki ,  Hongyong Zhang ,  Shunpei Yamazaki

发明人： Yasuhiko Takemura ,  Toshiji Hamatani ,  Toshimitsu Konuma ,  Jun Koyama ,  Yuji Kawasaki ,  Hongyong Zhang ,  Shunpei Yamazaki

IPC分类号： H01L2904

CPC分类号： H01L27/12 ,  G02F1/13624 ,  G02F2001/13685 ,  G09G3/3648 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0852 ,  G09G2320/0214 ,  H01L27/124 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78696

摘要： A structure for reducing the OFF current of an active matrix display. In the active matrix display, plural TFTs are connected in series with each one pixel electrode. Of these TFTs connected in series, at least one TFT excluding the TFTs located at opposite ends is maintained in conduction. Alternatively, at least one capacitor is connected between the junction of the drain and source of each TFT connected in series and an AC grounded point. Thus, the amount of electric charge released from auxiliary capacitors during cutoff of the TFTs is reduced.

摘要翻译： 一种用于降低有源矩阵显示器的截止电流的结构。 在有源矩阵显示器中，多个TFT与每个像素电极串联连接。 在串联连接的这些TFT中，除了位于相对端的TFT之外的至少一个TFT保持导通。 或者，至少一个电容器连接在串联连接的每个TFT的漏极和源极的接点与AC接地点之间。 因此，在TFT的截止期间从辅助电容器释放的电荷量减少。

公开(公告)号：US6013928A

公开(公告)日：2000-01-11

申请号：US479393

申请日：1995-06-07

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi ,  Hideki Nemoto

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi ,  Hideki Nemoto

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H04N3/12 ,  H01L27/01 ,  H01L31/0392 ,  H01L29/04

CPC分类号： H04N3/127 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78618 ,  G02F1/1368 ,  G02F2001/136245 ,  G09G2300/0823

摘要： An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.

摘要翻译： 一种适用于有源矩阵液晶显示器的绝缘栅场效应晶体管。 沟道长度或源极区域和漏极区域之间的距离大于沿着沟道的纵向方向取得的栅电极的长度。 偏移区域形成在源极和漏极区域的侧面上的沟道区域中。 没有或非常弱的电场被施加到来自栅电极的这些偏移区域。

公开(公告)号：US6110770A

公开(公告)日：2000-08-29

申请号：US229306

申请日：1999-01-13

申请人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Shunpei Yamazaki ,  Yasuhiko Takemura

发明人： Hongyong Zhang ,  Hideki Uochi ,  Toru Takayama ,  Shunpei Yamazaki ,  Yasuhiko Takemura

IPC分类号： H01L21/20 ,  H01L21/00 ,  H01L21/324 ,  H01L21/336 ,  H01L27/12 ,  H01L29/02 ,  H01L29/78 ,  H01L29/786 ,  H01L21/84

CPC分类号： H01L21/2022 ,  H01L27/1281 ,  H01L29/66757

摘要： A process for fabricating a semiconductor by crystallizing a silicon film in a substantially amorphous state by annealing it at a temperature not higher than the crystallization temperature of amorphous silicon, and it comprises forming selectively, on the surface or under an amorphous silicon film, a coating, particles, clusters, and the like containing nickel, iron, cobalt, platinum or palladium either as a pure metal or a compound thereof such as a silicide, a salt, and the like, shaped into island-like portions, linear portions, stripes, or dots; and then annealing the resulting structure at a temperature lower than the crystallization temperature of an amorphous silicon by 20 to 150.degree. C.

摘要翻译： 一种通过在不高于非晶硅的结晶温度的温度下进行退火将基本无定形态的硅膜结晶化的半导体制造方法，其包括在表面上或非晶硅膜下选择性地形成涂层 ，含有镍，铁，钴，铂或钯的颗粒，簇等作为纯金属或其化合物，例如硅化物，盐等，成形为岛状部分，线状部分，条纹 ，或点; 然后在低于非晶硅的结晶温度的温度下将所得结构退火20〜150℃。

公开(公告)号：US5956579A

公开(公告)日：1999-09-21

申请号：US893361

申请日：1997-07-15

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

IPC分类号： H01L29/78 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/78696 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78618

摘要： Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.

公开(公告)号：US5650338A

公开(公告)日：1997-07-22

申请号：US216277

申请日：1994-03-23

申请人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

发明人： Shunpei Yamazaki ,  Hongyong Zhang ,  Hideki Uochi ,  Hiroki Adachi ,  Yasuhiko Takemura

IPC分类号： H01L21/336 ,  H01L21/84

CPC分类号： H01L27/1214 ,  H01L29/66757

摘要： In film forming of thin film semiconductors (TFTs), a gate electrode having an anodic-oxidizable material is formed on a substrate, and the surface of the gate electrode is oxidized by anodic oxidation in an electrolytic solution so that the surface of the gate electrode is coated with an insulating film. The doping is performed using the gate electrode and the anodic oxide film as a mask, to form a source and a drain region. Then, when the laminate is again dipped in an electrolytic solution, and a voltage is applied to the gate electrode so that a current curing produces in the laminate. During the current curing, a positive voltage is preferably applied to the gate electrode for N-channel TFTs and a negative voltage is preferably to the gate electrode for P-channel TFTs. After the doping, the source and the drain region is activated by laser annealing or the like, prior to the current curing.

摘要翻译： 在薄膜半导体（TFT）的成膜中，在基板上形成具有阳极氧化材料的栅电极，并且通过电解液中的阳极氧化使栅电极的表面氧化，使得栅电极的表面 涂有绝缘膜。 使用栅电极和阳极氧化膜作为掩模进行掺杂，以形成源区和漏区。 然后，当层叠体再次浸渍在电解液中时，向栅电极施加电压，使得层压体产生电流固化。 在电流固化期间，优选对N沟道TFT的栅电极施加正电压，对P沟道TFT优选施加负电压。 在掺杂之后，在目前的固化之前，源极和漏极区域被激光退火等激活。

公开(公告)号：US06997985B1

公开(公告)日：2006-02-14

申请号：US08768535

申请日：1996-12-18

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

IPC分类号： C30B1/06

CPC分类号： H01L21/02672 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02686 ,  H01L21/2026 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78618 ,  H01L29/78696

摘要： Method of fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.

摘要翻译： 通过在低于非晶硅的正常结晶温度或低于基板的玻璃化转变点的温度下退火基本上非晶硅膜以使硅膜结晶的方法来制造诸如薄膜晶体管的半导体器件。 镍，铁，钴或铂的岛，条纹，线或点，镍，铁，钴或铂的硅化物，乙酸盐或硝酸盐，含有各种盐，包含至少一种镍， 铁，钴和铂用作结晶的起始原料。 这些材料形成在非晶硅膜上或下方。

公开(公告)号：US06977392B2

公开(公告)日：2005-12-20

申请号：US10390014

申请日：2003-03-18

申请人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi ,  Hideki Nemoto

发明人： Shunpei Yamazaki ,  Akira Mase ,  Masaaki Hiroki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Hideki Uochi ,  Hideki Nemoto

IPC分类号： G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/78 ,  H01L29/786 ,  H04N3/12 ,  H01L31/0392

CPC分类号： H01L27/1222 ,  G02F1/1368 ,  G02F2001/136245 ,  G09G2300/0823 ,  H01L27/1214 ,  H01L27/1248 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78618 ,  H04N3/127

摘要： An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.

摘要翻译： 一种适用于有源矩阵液晶显示器的绝缘栅场效应晶体管。 沟道长度或源极区域和漏极区域之间的距离大于沿着沟道的纵向方向取得的栅电极的长度。 偏移区域形成在源极和漏极区域的侧面上的沟道区域中。 没有或非常弱的电场被施加到来自栅电极的这些偏移区域。

公开(公告)号：US5608232A

公开(公告)日：1997-03-04

申请号：US462770

申请日：1995-06-05

申请人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

发明人： Shunpei Yamazaki ,  Yasuhiko Takemura ,  Hongyong Zhang ,  Toru Takayama ,  Hideki Uochi

IPC分类号： H01L29/78 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/786 ,  H01L29/76 ,  H01L31/036 ,  H01L31/112 ,  H01L29/04

CPC分类号： H01L29/78696 ,  H01L21/2022 ,  H01L21/2026 ,  H01L27/1277 ,  H01L29/66757 ,  H01L29/78618

摘要： Method or fabricating semiconductor devices such as thin-film transistors by annealing a substantially amorphous silicon film at a temperature either lower than normal crystallization temperature of amorphous silicon or lower than the glass transition point of the substrate so as to crystallize the silicon film. Islands, stripes, lines, or dots of nickel, iron, cobalt, or platinum, silicide, acetate, or nitrate of nickel, iron, cobalt, or platinum, film containing various salts, particles, or clusters containing at least one of nickel, iron, cobalt, and platinum are used as starting materials for crystallization. These materials are formed on or under the amorphous silicon film.

摘要翻译： 通过在低于非晶硅的正常结晶温度或低于衬底的玻璃化转变温度的温度下对基本上非晶硅膜进行退火以便使硅膜结晶来制造或制造半导体器件如薄膜晶体管。 镍，铁，钴或铂的岛，条纹，线或点，镍，铁，钴或铂的硅化物，乙酸盐或硝酸盐，含有各种盐，包含至少一种镍， 铁，钴和铂用作结晶的起始原料。 这些材料形成在非晶硅膜上或下方。