MILLIMETER-WAVE WIDEBAND FREQUENCY DOUBLER
    2.
    发明申请
    MILLIMETER-WAVE WIDEBAND FREQUENCY DOUBLER 有权
    MILLIMETER-WAVE WIDEBAND频率双打

    公开(公告)号:US20120146747A1

    公开(公告)日:2012-06-14

    申请号:US12967160

    申请日:2010-12-14

    IPC分类号: H03B19/00

    CPC分类号: H03B19/00

    摘要: A millimeter-wave wideband frequency doubler stage for use in a distributed frequency doubler includes: a differential input pair of transistors, each transistor having respective gate, drain and source terminals, wherein the source terminals are coupled together to a first power supply node and the drain terminals are coupled together at a first node to a second power supply node; first and second pairs of bandpass gate lines coupled to the gate terminals of the transistors; and a pair of bandpass drain lines coupled to the drain terminals of the transistors.

    摘要翻译: 用于分布式倍频器的毫米波宽带倍频器级包括:差分输入对晶体管,每个晶体管具有相应的栅极,漏极和源极端子,其中源极端子耦合到第一电源节点,并且 漏极端子在第一节点耦合到第二电源节点; 耦合到晶体管的栅极端子的第一和第二对带通栅极线; 以及耦合到晶体管的漏极端子的一对带通漏极线。

    THROUGH CHIP COUPLING FOR SIGNAL TRANSPORT
    3.
    发明申请
    THROUGH CHIP COUPLING FOR SIGNAL TRANSPORT 有权
    通过芯片耦合进行信号传输

    公开(公告)号:US20120122395A1

    公开(公告)日:2012-05-17

    申请号:US12946072

    申请日:2010-11-15

    IPC分类号: H04B5/00

    CPC分类号: H04B5/0081

    摘要: Through-chip coupling is utilized for signal transport, where an interface is formed between a first coil on a first integrated circuit (IC) chip and a second coil on a second IC chip. The first coil is coupled to an antenna. The second coil is coupled to an amplifier circuit. The second coil is not in direct contact with the first coil. The first coil and the second coil communicatively transmit signals between the antenna and the first amplifier circuit.

    摘要翻译: 芯片耦合用于信号传输,其中在第一集成电路(IC)芯片上的第一线圈和第二IC芯片上的第二线圈之间形成接口。 第一线圈耦合到天线。 第二线圈耦合到放大器电路。 第二线圈不与第一线圈直接接触。 第一线圈和第二线圈在天线和第一放大器电路之间通信地传送信号。

    BALANCED TRANSFORMER STRUCTURE
    5.
    发明申请
    BALANCED TRANSFORMER STRUCTURE 审中-公开
    平衡变压器结构

    公开(公告)号:US20120092121A1

    公开(公告)日:2012-04-19

    申请号:US12974080

    申请日:2010-12-21

    IPC分类号: H01F27/28

    摘要: A multi-chip electronic device includes a first winding having a first port (P+) and a second port (P−). The first winding is formed in a metal layer of a first chip. The device further includes a second winding having a third (S+) and a fourth port (S−). The second winding is formed in a metal layer of a second chip. A center tap of the second winding is connected to a reference potential.

    摘要翻译: 多芯片电子设备包括具有第一端口(P +)和第二端口(P-)的第一绕组。 第一绕组形成在第一芯片的金属层中。 该装置还包括具有第三(S +)和第四端口(S)的第二绕组。 第二绕组形成在第二芯片的金属层中。 第二绕组的中心抽头连接到参考电位。

    JUNCTION VARACTOR FOR ESD PROTECTION OF RF CIRCUITS
    6.
    发明申请
    JUNCTION VARACTOR FOR ESD PROTECTION OF RF CIRCUITS 有权
    用于ESD保护射频电路的连接变压器

    公开(公告)号:US20110233678A1

    公开(公告)日:2011-09-29

    申请号:US12731562

    申请日:2010-03-25

    IPC分类号: H01L29/93 H01L27/06 H01L23/60

    摘要: An ESD protection device includes a first well of a first semiconductor type disposed in a substrate of a second semiconductor type forming a first diode. A second well of the second semiconductor type is formed in the substrate to form a second diode with the first well. A first plurality of doped regions of the first semiconductor type are formed in an upper surface of the first well. A second plurality of doped regions of the second semiconductor type are formed in the upper surface of the first well forming a third diode with the first well. A plurality of STI regions are formed in the upper surface of the first well. Each STI region is disposed between a doped region of the first and second semiconductor types. The third diode provides a current bypass when an ESD voltage spike is received at one of the first or second plurality of doped regions.

    摘要翻译: ESD保护装置包括设置在形成第一二极管的第二半导体类型的衬底中的第一半导体类型的第一阱。 第二半导体类型的第二阱形成在衬底中以与第一阱形成第二二极管。 第一半导体类型的第一多个掺杂区域形成在第一阱的上表面中。 第二半导体类型的第二多个掺杂区域形成在第一阱的上表面中,其与第一阱形成第三二极管。 多个STI区域形成在第一阱的上表面中。 每个STI区域设置在第一和第二半导体类型的掺杂区域之间。 当在第一或第二多个掺杂区域中的一个处接收ESD电压尖峰时,第三二极管提供电流旁路。

    POWER CELL, POWER CELL CIRCUIT FOR A POWER AMPLIFIER AND A METHOD OF MAKING AND USING A POWER CELL
    7.
    发明申请
    POWER CELL, POWER CELL CIRCUIT FOR A POWER AMPLIFIER AND A METHOD OF MAKING AND USING A POWER CELL 有权
    电源单元,用于功率放大器的电源单元电路以及制造和使用电源的方法

    公开(公告)号:US20140184275A1

    公开(公告)日:2014-07-03

    申请号:US13753995

    申请日:2013-01-30

    IPC分类号: H01L27/06 H03K17/06 H01L29/66

    摘要: A power cell including an isolation region having a first dopant type formed in a substrate. The power cell further includes a bottom gate having a second dopant type different from the first dopant type formed on the isolation region and a channel layer having the first dopant type formed on the bottom gate. The power cell further includes source/drain regions having the first dopant type formed in the channel layer and a first well region having the second dopant type formed around the channel layer and the source/drain regions, and the first well region electrically connected to the bottom gate. The power cell further includes a second well region having the first dopant type formed around the channel layer and contacting the isolation region and a gate structure formed on the channel layer.

    摘要翻译: 一种功率单元,包括形成在基板中的具有第一掺杂剂类型的隔离区域。 功率单元还包括具有不同于在隔离区上形成的第一掺杂剂类型的第二掺杂剂型的底栅和在底栅上形成的具有第一掺杂剂类型的沟道层。 功率单元还包括在沟道层中形成的具有第一掺杂剂类型的源极/漏极区域和形成在沟道层和源极/漏极区域周围的具有第二掺杂剂类型的第一阱区域,以及与第一阱区域电连接的第一阱区域 底门 功率单元还包括具有第一掺杂剂类型的第二阱区,该第二阱区形成在沟道层周围并与隔离区接触并形成在沟道层上的栅极结构。

    POWER CELL AND POWER CELL CIRCUIT FOR A POWER AMPLIFIER
    8.
    发明申请
    POWER CELL AND POWER CELL CIRCUIT FOR A POWER AMPLIFIER 有权
    功率放大器的功率单元和电源单元电路

    公开(公告)号:US20140183660A1

    公开(公告)日:2014-07-03

    申请号:US13731873

    申请日:2012-12-31

    IPC分类号: H01L29/78

    CPC分类号: H01L29/785 H01L29/66901

    摘要: A power cell includes a fin over a substrate, the fin extending in a direction substantially perpendicular to a bottom surface of the substrate. The fin includes a first dopant type. The power cell further includes at least one isolation region over the substrate between the fin and an adjacent fin. The power cell further includes a gate structure in contact with the fin and the at least one isolation region, wherein the gate structure comprises a doped region in the fin, wherein the doped region has a second dopant type different from the first dopant type and the doped region defines a channel region in the fin.

    摘要翻译: 功率单元包括在衬底上的翅片,翅片沿基本上垂直于衬底的底表面的方向延伸。 散热片包括第一掺杂剂类型。 功率单元还包括在鳍片和相邻鳍片之间的衬底上的至少一个隔离区域。 所述功率单元还包括与所述鳍片和所述至少一个隔离区域接触的栅极结构,其中所述栅极结构包括所述鳍片中的掺杂区域,其中所述掺杂区域具有不同于所述第一掺杂剂类型的第二掺杂剂类型, 掺杂区域限定鳍片中的沟道区域。

    ESD BLOCK ISOLATION BY RF CHOKE
    10.
    发明申请
    ESD BLOCK ISOLATION BY RF CHOKE 有权
    防静电块隔离由RF CHOKE

    公开(公告)号:US20120212865A1

    公开(公告)日:2012-08-23

    申请号:US13029240

    申请日:2011-02-17

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0288 H02H9/046

    摘要: A circuit includes a first node configured to receive a radio frequency (“RF”) signal, a first electrostatic discharge (ESD) protection circuit coupled to a first voltage supply rail for an RF circuit and to a second node, and a second ESD protection circuit coupled to the second node and to a second voltage supply node for the RF circuit. An RF choke circuit is coupled to the second node and to a third node disposed between the first node and the RF circuit.

    摘要翻译: 电路包括被配置为接收射频(“RF”)信号的第一节点,耦合到用于RF电路的第一电压供电轨和第二节点的第一静电放电(ESD)保护电路,以及第二ESD保护 耦合到第二节点的电路和用于RF电路的第二电压供应节点。 RF扼流电路耦合到第二节点和设置在第一节点和RF电路之间的第三节点。