公开(公告)号：US06627475B1

公开(公告)日：2003-09-30

申请号：US09483034

申请日：2000-01-18

申请人： Hua Yu Yang ,  Ching-Wen Cho ,  Chih-Heng Shen

发明人： Hua Yu Yang ,  Ching-Wen Cho ,  Chih-Heng Shen

IPC分类号： H01L2100

CPC分类号： H01L27/14689 ,  H01L27/14601 ,  H01L27/1463

摘要： A method of forming an image sensor is disclosed. A partially processed semiconductor wafer is provided, containing a p-type region. An n-type photodiode region is formed within the p-type region. A field oxide isolation region is then formed which extends beyond the p-type region and also covers the p-type region except for an active region and an overlap part of the n-type photodiode region. An n-channel MOSFET is fabricated in the active region with one of the source/drain regions of the MOSFET extending over the overlap part of the n-type photodiode region. A blanket transparent insulating layer is then deposited.

摘要翻译： 公开了一种形成图像传感器的方法。 提供了部分处理的半导体晶片，其包含p型区域。 在p型区域内形成n型光电二极管区域。 然后形成场氧化物隔离区，其延伸超出p型区域，并且还覆盖除了n型光电二极管区域的有源区域和重叠部分之外的p型区域。 在有源区中制造n沟道MOSFET，MOSFET的源/漏区中的一个在n型光电二极管区域的重叠部分上延伸。 然后沉积一层覆盖的透明绝缘层。

公开(公告)号：US6071826A

公开(公告)日：2000-06-06

申请号：US249259

申请日：1999-02-12

申请人： Ching-Wen Cho ,  Hua-Yu Yang ,  Sen-Fu Chen ,  Chih-Heng Shen ,  Wen-Cheng Chien ,  Chang-Jen Wu ,  Chi-Hsin Lo ,  Hui-Chen Chu

发明人： Ching-Wen Cho ,  Hua-Yu Yang ,  Sen-Fu Chen ,  Chih-Heng Shen ,  Wen-Cheng Chien ,  Chang-Jen Wu ,  Chi-Hsin Lo ,  Hui-Chen Chu

IPC分类号： H01L21/336 ,  H01L27/146 ,  H01L21/00

CPC分类号： H01L29/6659 ,  H01L27/14601 ,  H01L27/14683

摘要： A method for forming a CMOS image sensor spacer structure. A polysilicon gate electrode is formed on a substrate; a thin layer of first dielectric is deposited over the exposed surfaces of the gate electrode and the top of the substrate. Next a second layer of dielectric is deposited after which etching is performed to create the electrode spacer. The deposited second layer of dielectric serves as an etch stop and prevents damage to the substrate surface between spacers of the gate electrodes. An alternate method uses a thin ply layer as the stop layer and, in so doing, source/drain damage caused by the white pixel problem.

摘要翻译： 一种用于形成CMOS图像传感器间隔结构的方法。 在基板上形成多晶硅栅电极; 第一电介质的薄层沉积在栅电极和衬底的顶部的暴露表面上。 接下来，沉积第二层电介质，之后进行蚀刻以形成电极间隔物。 沉积的第二介电层用作蚀刻停止层并且防止对栅电极的间隔物之间​​的衬底表面的损坏。 一种替代方法是使用薄层层作为停止层，并且在这样做时，由白色像素问题引起的源/漏损坏。

公开(公告)号：US06624466B2

公开(公告)日：2003-09-23

申请号：US10074972

申请日：2002-02-12

申请人： Sen-Fu Chen ,  Ching-Wen Cho ,  Huan-Wen Wang ,  Chih-Heng Shen

发明人： Sen-Fu Chen ,  Ching-Wen Cho ,  Huan-Wen Wang ,  Chih-Heng Shen

IPC分类号： H01L29788

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L29/42324

摘要： A method is disclosed to form a reliable silicon nitride spacer between the lower edges of the floating gate and the control gate of a split-gate flash memory cell. This is accomplished by forming a floating gate with vertical sidewalls, forming a high temperature oxide layer followed by silicon nitride layer over the floating gate including the vertical sidewalls, ion implanting the nitride layer and then selectively etching it to form a robust silicon nitride spacer of well defined rectangular shape.

公开(公告)号：US06380030B1

公开(公告)日：2002-04-30

申请号：US09298448

申请日：1999-04-23

申请人： Sen-Fu Chen ,  Ching-Wen Cho ,  Huan-Wen Wang ,  Chih-Heng Shen

发明人： Sen-Fu Chen ,  Ching-Wen Cho ,  Huan-Wen Wang ,  Chih-Heng Shen

IPC分类号： H01L21336

CPC分类号： H01L29/66825 ,  H01L21/28273 ,  H01L29/42324

摘要： A method is disclosed to form a reliable silicon nitride spacer between the lower edges of the floating gate and the control gate of a split-gate flash memory cell. This is accomplished by forming a floating gate with vertical sidewalls, forming a high temperature oxide layer followed by silicon nitride layer over the floating gate including the vertical sidewalls, ion implanting the nitride layer and then selectively etching it to form a robust silicon nitride spacer of well defined rectangular shape.

摘要翻译： 公开了一种在浮动栅极的下边缘和分裂栅极闪存单元的控制栅极之间形成可靠的氮化硅间隔物的方法。 这通过形成具有垂直侧壁的浮动栅极，在包括垂直侧壁的浮动栅极之上形成高温氧化物层，随后是氮化硅层，离子注入氮化物层，然后选择性地蚀刻以形成稳定的氮化硅间隔物 定义明确的矩形。

公开(公告)号：US6147372A

公开(公告)日：2000-11-14

申请号：US246293

申请日：1999-02-08

申请人： Hua-Yu Yang ,  Chih-Heng Shen ,  Wen-Cheng Chang

发明人： Hua-Yu Yang ,  Chih-Heng Shen ,  Wen-Cheng Chang

IPC分类号： H01L27/146 ,  H01L31/0352 ,  H01L27/148 ,  H01L29/768 ,  H01L29/80 ,  H01L31/112 ,  H01L31/288

CPC分类号： H01L31/0352 ,  H01L27/14603 ,  H01L27/14643

摘要： Device layouts are described which increase the photon current of a metal oxide semiconductor image sensor. The metal oxide semiconductor can be NMOS, PMOS, or CMOS. The key part of the photon current of the image sensors comes from the depletion region at the PN junction between the drain region and the substrate material. The layouts used significantly increase the area of this depletion region illuminated by a stream of photons. The layouts have a drain region which takes the shape of a number of parallel fingers perpendicular to the gate electrode, a number of parallel fingers parallel to the gate electrode, or a spiral. The drain regions of these layouts significantly increase the area of the drain depletion region illuminated by a stream of electrons.

摘要翻译： 描述了增加金属氧化物半导体图像传感器的光子电流的装置布局。 金属氧化物半导体可以是NMOS，PMOS或CMOS。 图像传感器的光子电流的关键部分来自漏极区域和衬底材料之间的PN结处的耗尽区。 使用的布局显着增加了由光子束照射的这个耗尽区域的面积。 布局具有漏极区域，其具有垂直于栅电极的多个平行指状物，平行于栅电极的多个平行指状物或螺旋形的形状。 这些布局的漏极区域显着地增加了由电子流照射的漏极耗尽区域的面积。

公开(公告)号：US06627971B1

公开(公告)日：2003-09-30

申请号：US09654777

申请日：2000-09-05

申请人： Chih-Heng Shen ,  Sen-Fu Chen ,  Huan-Wen Wang ,  Ying-Tzu Yen

发明人： Chih-Heng Shen ,  Sen-Fu Chen ,  Huan-Wen Wang ,  Ying-Tzu Yen

IPC分类号： H01L2900

CPC分类号： H01L21/32137 ,  H01L21/28035 ,  H01L21/32139 ,  H01L21/82345 ,  H01L27/0629 ,  H01L27/0802 ,  H01L27/0805 ,  H01L28/20 ,  H01L28/40

摘要： A device with a plurality of structures with different resistance values is formed on a substrate. A polysilicon layer is formed upon the substrate. A silicon oxide layer is formed over the substrate. A hard masking layer is formed over the silicon oxide layer. The hard masking layer includes a full thickness portion and a thinner portion. The polysilicon layer below the full thickness portion is lightly doped forming a high resistance region. Below the thinner portion the polysilicon layer is heavily doped forming a low resistance region. However, in spite of the differences in resistance, the high resistance region and the low resistance region have the same thickness.

摘要翻译： 具有不同电阻值的多个结构的器件形成在衬底上。 在基板上形成多晶硅层。 在衬底上形成氧化硅层。 在氧化硅层上形成硬掩模层。 硬掩模层包括全厚度部分和较薄部分。 全厚部分下面的多晶硅层被轻掺杂形成高电阻区域。 在较薄部分之下，多晶硅层被重掺杂形成低电阻区域。 然而，尽管电阻的差异，但是高电阻区域和低电阻区域具有相同的厚度。

公开(公告)号：US06187639B1

公开(公告)日：2001-02-13

申请号：US08844629

申请日：1997-04-21

申请人： Jyh-Haur Wang ,  Chih-Heng Shen

发明人： Jyh-Haur Wang ,  Chih-Heng Shen

IPC分类号： H01L21336

CPC分类号： H01L21/823418 ,  H01L21/266 ,  H01L21/823468 ,  Y10S438/948

摘要： A method for preventing gate oxide damage caused by post poly definition implantation is disclosed. It is shown that the antenna ratio that is correlatable to oxide damage can be reduced and made to approach zero by implementing a mask layout during ion implantation. This involves covering all of the polysilicon electrodes with a photoresist mask, and reducing the effective antenna ratio to zero, and performing ion implantation to form source/drain regions thereafter. In this manner, the dependency of ion implantation to pattern sensitivity is also removed.

摘要翻译： 公开了一种用于防止由后多聚定义植入引起的栅极氧化物损伤的方法。 显示出可以减少与氧化物损伤相关的天线比，并且通过在离子注入期间实现掩模布局使其接近零。 这包括用光致抗蚀剂掩模覆盖所有多晶硅电极，并且将有效天线比率降低到零，然后执行离子注入以形成源极/漏极区域。 以这种方式，离子注入对图案灵敏度的依赖性也被消除。

公开(公告)号：US5913979A

公开(公告)日：1999-06-22

申请号：US780399

申请日：1997-01-08

申请人： Chih-Heng Shen ,  Hui-Tzu Lin

发明人： Chih-Heng Shen ,  Hui-Tzu Lin

IPC分类号： B08B3/08 ,  H01L21/00

CPC分类号： H01L21/67028 ,  B08B3/08

摘要： The present invention provides a method for removing unwanted coating layer at wafer edge by first immersing the wafer edge in a cleaning solution and then immersing in a rinsing solution such as deionized water to remove the residual cleaning solution from the surface of the wafer. The wafer can be dried in a subsequent spin dry process.

摘要翻译： 本发明提供了一种通过首先将晶片边缘浸入清洁溶液中然后浸入诸如去离子水的冲洗溶液中以从晶片表面去除残留的清洁溶液来在晶片边缘去除不需要的涂层的方法。 可以在随后的旋转干燥过程中干燥晶片。

公开(公告)号：US5492868A

公开(公告)日：1996-02-20

申请号：US327587

申请日：1994-10-24

申请人： Ting H. Lin ,  Chung-An Lin ,  Chih-Heng Shen

发明人： Ting H. Lin ,  Chung-An Lin ,  Chih-Heng Shen

IPC分类号： H01L21/768 ,  H01L21/465

CPC分类号： H01L21/76804 ,  H01L2221/1057

摘要： This invention provides a method of preventing contact autodoping and supressing tungsten silicide peeling during the reflow cycle for a borophosphosilicate glass insulating layer during fabrication of large scale integrated circuits. The invention uses a thin oxide layer to protect the contact areas during the reflow cycle. The thin oxide layer is thin enough to allow satisfactory reflow of the borophosphosilicate glass insulating layer and thick enough to prevent autodoping and tungsten silicide peeling. The thin oxide layer is also thin enough so that process time required to remove the thin oxide layer is not a significant increase in process time. The thin oxide layer thickness is controlled by depositing a helium diluted tetraethoxysilane vapor and oxygen using chemical vapor deposition.

摘要翻译： 本发明提供了一种在制造大规模集成电路期间防止硼磷硅酸盐玻璃绝缘层在回流循环期间的接触自掺杂和抑制硅化钨剥离的方法。 本发明使用薄氧化物层来在回流循环期间保护接触区域。 薄氧化物层足够薄以允许硼磷硅酸盐玻璃绝缘层的令人满意的回流，并且足够厚以防止自掺杂和硅化钨剥离。 薄氧化物层也足够薄，使得除去薄氧化物层所需的处理时间不是处理时间的显着增加。 通过使用化学气相沉积沉积氦稀释的四乙氧基硅烷蒸汽和氧来控制薄的氧化物层厚度。

公开(公告)号：US6162584A

公开(公告)日：2000-12-19

申请号：US73948

申请日：1998-05-07

申请人： Sen-Fu Chen ,  Chih-Heng Shen

发明人： Sen-Fu Chen ,  Chih-Heng Shen

IPC分类号： G03F7/00 ,  H01L21/02 ,  H01L21/3215 ,  H01L21/8234 ,  H01L27/06

CPC分类号： H01L28/20 ,  G03F7/0035 ,  H01L21/32155 ,  H01L21/823456 ,  H01L27/0629

摘要： A method is provided for forming a plurality of structures with different resistance values in a single polysilicon film as follows. Form a polysilicon layer upon a substrate. Pattern the polysilicon to expose a portion thereof which is to be reduced in thickness. Partially etch through the polysilicon to produce a reduced thickness thereof while leaving the remainder of the polysilicon with the original thickness. Dope the polysilicon layer through the polysilicon with variable doping as a function of the reduced thickness and the original thickness of the polysilicon.

摘要翻译： 提供一种用于在单个多晶硅膜中形成具有不同电阻值的多个结构的方法，如下。 在基板上形成多晶硅层。 对多晶硅进行图案化以暴露其厚度减小的部分。 部分地通过多晶硅蚀刻以产生其厚度减小，同时留下具有原始厚度的剩余多晶硅。 通过具有可变掺杂的多晶硅掺杂多晶硅层作为多晶硅的厚度减小和原始厚度的函数。