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公开(公告)号：US12289838B2
公开(公告)日：2025-04-29
申请号：US18164655
申请日：2023-02-06
Applicant: IBIDEN CO., LTD.
Inventor： Yasuki Kimishima
Abstract: A wiring substrate includes a first insulating layer, a first conductor layer formed on the first insulating layer, a second insulating layer formed on the first conductor layer, a second conductor layer formed on the second insulating layer, and a via conductor formed in the second insulating layer such that the via conductor is connecting the first and second conductor layers. The second insulating layer has a via hole in which the via conductor is formed, and the via conductor includes a first plating film and a second plating film such that the first plating film has a bottom portion formed at bottom of the via hole and a side portion formed on side of the via hole and separated from the bottom portion by gap and that the second plating film is covering the gap of the first plating film and at least part of the first plating film.
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公开(公告)号：US11291118B2
公开(公告)日：2022-03-29
申请号：US17184865
申请日：2021-02-25
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole, and a second through-hole conductor including a metal film formed in the second through hole. The core substrate and the magnetic resin are formed such that a surface in the first through hole has a roughness that is larger than a roughness of a surface in the second through hole.
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公开(公告)号：US11871515B2
公开(公告)日：2024-01-09
申请号：US17488373
申请日：2021-09-29
Applicant: IBIDEN CO., LTD.
Inventor： Yasuki Kimishima , Satoru Kawai
CPC classification number: H05K1/115 , H05K1/0298 , H05K1/111 , H05K1/116 , H05K1/165
Abstract: A wiring substrate includes an insulating layer having a through hole, a first conductor layer formed on a first surface of the insulating layer, a second conductor layer formed on a second surface of the insulating layer, an interlayer connection conductor formed in the through hole such that the interlayer connection conductor is connecting the first and second conductor layers, and a resin body formed in the through hole of the insulating layer such that a volume occupancy rate of the resin body is in a range of 30% to 55% in the through hole. The interlayer connection conductor is formed such that the interlayer connection conductor has a length in a range of 1000 μm to 2000 μm in a thickness direction of the insulating layer and that a volume occupancy rate of the interlayer connection conductor is in a range of 45% to 70% in the through hole.
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公开(公告)号：US11330713B2
公开(公告)日：2022-05-10
申请号：US17230457
申请日：2021-04-14
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
IPC: H05K1/11
Abstract: A printed wiring board includes an insulating substrate having openings, a first conductor layer formed on a first surface of the insulating substrate, a second conductor layer formed on a second surface of the insulating substrate, magnetic material portions formed in the openings of the insulating substrate and having through holes extending from the first surface to second surface of the insulating substrate, and through-hole conductors formed on side walls of the through holes such that the through-hole conductors connect the first conductor layer and second conductor layer. The magnetic material portions include magnetic particles and resin such that the magnetic particles include particles forming the side walls and that gaps are formed between the particles and the resin, and each of the through-hole conductors includes a chemical copper plating film such that the chemical copper plating film is deposited in the gaps formed between the particles and the resin.
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公开(公告)号：US11122686B2
公开(公告)日：2021-09-14
申请号：US17132376
申请日：2020-12-23
Applicant: IBIDEN CO., LTD.
Inventor： Yasuki Kimishima , Satoru Kawai
Abstract: A wiring substrate includes an insulating layer having through holes, a first conductor layer formed on first surface of the insulating layer, a second conductor layer formed on second surface of the insulting layer on the opposite side, and interlayer connection conductors formed in the through holes through the insulating layer and connecting the first and second conductor layers. The insulating layer is formed such that the though holes include first and second groups of through holes and that the through holes in the second group have inner walls covered with non-conductive resin, and the interlayer conductors includes first interlayer conductors each including a plating film formed in the first group of through holes, and second interlayer conductors each including a plating film formed in the second group of through holes such that minimum distance between the second interlayer conductors is smaller than minimum distance between the first interlayer conductors.
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Patent Agency Ranking
公开(公告)号：US20150034378A1
公开(公告)日：2015-02-05
申请号：US14446702
申请日：2014-07-30
Applicant: IBIDEN CO., LTD.
Inventor： Kazuki KAJIHARA , Yasuki Kimishima
CPC classification number: H05K3/427 , H05K1/0366 , H05K3/0047 , H05K3/429 , H05K3/4602 , H05K2201/0355 , H05K2201/09536 , H05K2203/1476 , H05K2203/1492
Abstract: A printed wiring board includes an insulative resin substrate having a penetrating hole, a first conductive layer formed on first surface of the substrate, a second conductive layer formed on second surface of the substrate on the opposite side, and a through-hole conductor formed in the penetrating hole and connecting the first and second conductive layers. The through-hole conductor includes a seed layer on inner wall of the penetrating hole, a first electrolytic plated layer on the seed layer such that the first plated layer is filling the space formed by the seed layer in the penetrating hole and forming recesses at the ends of the penetrating hole, respectively, and second electrolytic plated layers filling the recesses, respectively, and the second plated layers includes electrolytic plating having an average crystalline particle diameter greater than an average crystalline particle diameter of electrolytic plating forming the first plated layer.
Abstract translation: 印刷电路板包括具有贯通孔的绝缘树脂基板，形成在基板的第一表面上的第一导电层，在相对侧的基板的第二表面上形成的第二导电层，以及形成在 穿透孔并连接第一和第二导电层。 所述通孔导体在所述贯通孔的内壁上具有种子层，所述种子层上的第一电解电镀层，使得所述第一镀层在所述贯通孔中填充由所述籽晶层形成的空间， 并且第二镀层分别包括平均结晶粒径大于形成第一镀层的电解电镀的平均结晶粒径的电解电镀。
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公开(公告)号：US12041729B2
公开(公告)日：2024-07-16
申请号：US17158500
申请日：2021-01-26
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
CPC classification number: H05K3/429 , H05K1/115 , H05K3/4605 , H05K2201/09563 , H05K2201/0959
Abstract: A printed wiring board includes an insulating substrate, a first conductor layer formed on a first surface of the substrate, a second conductor layer formed on a second surface of the substrate, and through-hole conductors formed through the substrate and connecting the first and second conductor layers. The substrate has openings formed such that each opening extends from the first to second surfaces of the substrate, and magnetic material filling the openings and forming through holes such that each through hole extends from the first to second surfaces of the substrate, the through-hole conductors are formed on sidewalls of the through holes in the magnetic material, and the magnetic material includes resin and particles including magnetic metal such that the particles include a group of particles forming the sidewalls of the through holes and that each particle in the group has a substitution plating film formed on a surface thereof.
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公开(公告)号：US12020843B2
公开(公告)日：2024-06-25
申请号：US17102878
申请日：2020-11-24
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
IPC: H01F27/28 , H01F27/255 , H01F41/04 , H01F41/24 , H01L21/48 , H01L23/498 , H01L23/64
CPC classification number: H01F27/2804 , H01F27/255 , H01F41/041 , H01F41/24 , H01L21/486 , H01L21/4864 , H01L23/49827 , H01L23/49838 , H01L23/645 , H01F2027/2809 , Y10T428/32
Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening of the core substrate and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole of the core substrate, and a second through-hole conductor including a metal film formed in the second through hole of the magnetic resin. The magnetic resin includes a resin material and magnetic particles such that the metal film of the second through-hole conductor is in contact with the magnetic particles.
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公开(公告)号：US11856699B2
公开(公告)日：2023-12-26
申请号：US17123756
申请日：2020-12-16
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
CPC classification number: H05K1/165 , H05K1/115 , H05K2201/0212 , H05K2201/0959
Abstract: An inductor built-in substrate includes a core substrate having openings and first through holes formed therein, a magnetic resin filling the openings and having second through holes formed therein, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes an electroless plating film and an electrolytic plating film, and second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes an electroless plating film and an electrolytic plating film. The first through-hole conductors and the second through-hole conductors are formed such that a thickness of the electroless plating film in the first through-hole conductors is larger than a thickness of the electroless plating film in the second through-hole conductors.
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公开(公告)号：US20210195748A1
公开(公告)日：2021-06-24
申请号：US17123756
申请日：2020-12-16
Applicant: IBIDEN CO., LTD.
Inventor： Satoru Kawai , Yasuki Kimishima
Abstract: An inductor built-in substrate includes a core substrate having openings and first through holes formed therein, a magnetic resin filling the openings and having second through holes formed therein, first through-hole conductors formed in the first through holes respectively such that each of the first through-hole conductors includes an electroless plating film and an electrolytic plating film, and second through-hole conductors formed in the second through holes respectively such that each of the second through-hole conductors includes an electroless plating film and an electrolytic plating film. The first through-hole conductors and the second through-hole conductors are formed such that a thickness of the electroless plating film in the first through-hole conductors is larger than a thickness of the electroless plating film in the second through-hole conductors.
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