公开(公告)号：US20210168000A1

公开(公告)日：2021-06-03

申请号：US17252709

申请日：2018-09-19

Applicant: Intel Corporation

Inventor： Bryan Casper ,  James Jaussi ,  Chintan Thakkar ,  Stefan Shopov

IPC: H04L25/03 ,  H04L27/36 ,  H03F3/193 ,  H03F3/24 ,  H03F3/45

Abstract: A digital transmitter architecture is disclosed to transmit (TX) multi-gigabit per second data signals on single carriers (SC) or orthogonal frequency division multiplexing (OFDM) carriers at millimeter wave frequencies in either one of a high-resolution modulation mode or a spectral shaping mode. The architecture includes a number of digital power amplifier (DPA) and modulation reconfigurable circuit segments to process individual bits of a data bit stream in parallel according to a specific circuit configuration corresponding to the selected TX mode using a multiplexer to switch between configurations.

公开(公告)号：US10923164B2

公开(公告)日：2021-02-16

申请号：US16147634

申请日：2018-09-29

Applicant: Intel Corporation

Inventor： Hariprasath Venkatram ,  Mohammed G. Mostofa ,  Rajesh Inti ,  Roger K. Cheng ,  Aaron Martin ,  Christopher Mozak ,  Pavan Kumar Kappagantula ,  Hsien-Pao Yang ,  Mozhgan Mansuri ,  James Jaussi ,  Harishankar Sridharan

IPC: G11C7/10 ,  G06F1/3234 ,  G06F13/16

Abstract: An apparatus is provided which comprises: a first power supply rail to provide a first power supply; second and third power supply rails to provide second and third power supplies, respectively, wherein a voltage level of the first power supply is higher than a voltage level of each of the second and third power supplies; a first driver circuitry coupled to the first power supply rail and the second power supply rail; a second driver circuitry coupled to the third power supply rail, and coupled to the first driver circuitry; and a stack of transistors of N conductivity type coupled to the first power supply rail, and to the second driver circuitry.

公开(公告)号：US12148742B2

公开(公告)日：2024-11-19

申请号：US16816669

申请日：2020-03-12

Applicant: Intel Corporation

Inventor： Thomas Liljeberg ,  Andrew C. Alduino ,  Ravindranath Vithal Mahajan ,  Ling Liao ,  Kenneth Brown ,  James Jaussi ,  Bharadwaj Parthasarathy ,  Nitin A Deshpande

IPC: G02B6/42 ,  H01L23/00 ,  H01L23/36 ,  H01L23/367 ,  H01L25/16 ,  H04B10/40

Abstract: Embodiments may relate to a microelectronic package that includes a package substrate with an active bridge positioned therein. An active die may be coupled with the package substrate, and communicatively coupled with the active bridge. A photonic integrated circuit (PIC) may also be coupled with the package substrate and communicatively coupled with the active bridge. Other embodiments may be described or claimed.

公开(公告)号：US20170235701A1

公开(公告)日：2017-08-17

申请号：US15503097

申请日：2014-12-24

Applicant: INTEL CORPORATION

Inventor： Akshay Pethe ,  Mahesh Wagh ,  David Harriman ,  Su Wei Lim ,  Debendra Das Sharma ,  Daniel Froelich ,  Venkatraman Iyer ,  James Jaussi ,  Zuoguo Wu

IPC: G06F13/42 ,  G06F13/38

CPC classification number: G06F13/4286 ,  G06F13/385 ,  G06F13/4027 ,  G06F2213/0042 ,  G06F2213/4002

Abstract: Techniques for embedded high speed serial interface methods are described herein. The techniques include an apparatus for sideband signaling including a first serial sideband link module and a second serial sideband link module. The first serial sideband link module is to propagate packets from an upstream port to a downstream port via a first signaling lane, and the second serial sideband link module is to propagate packets from the downstream port to the upstream port via a second signaling lane.

公开(公告)号：US11483186B2

公开(公告)日：2022-10-25

申请号：US17252709

申请日：2018-09-19

Applicant: Intel Corporation

Inventor： Bryan Casper ,  James Jaussi ,  Chintan Thakkar ,  Stefan Shopov

IPC: H04L25/03 ,  H04L27/36 ,  H03F3/193 ,  H03F3/24 ,  H03F3/45

Abstract: A digital transmitter architecture is disclosed to transmit (TX) multi-gigabit per second data signals on single carriers (SC) or orthogonal frequency division multiplexing (OFDM) carriers at millimeter wave frequencies in either one of a high-resolution modulation mode or a spectral shaping mode. The architecture includes a number of digital power amplifier (DPA) and modulation reconfigurable circuit segments to process individual bits of a data bit stream in parallel according to a specific circuit configuration corresponding to the selected TX mode using a multiplexer to switch between configurations.

公开(公告)号：US20250160059A1

公开(公告)日：2025-05-15

申请号：US18508617

申请日：2023-11-14

Applicant: Intel Corporation

Inventor： Khaled Ahmed ,  Joshua Fryman ,  Junyi Qiu ,  Mozhgan Mansuri ,  James Jaussi

IPC: H01L33/10 ,  H01L25/075 ,  H01L33/32 ,  H01L33/62

Abstract: A micro-LED includes a light emitter between a pair of reflective metasurfaces formed from nanostructures. The metasurfaces have different levels of reflectivity, with one metasurface reflecting nearly all light, and the other metasurface allowing some light to pass through. The reflections of the light within the micro-LED result in an improved radiation recombination rate, which results in an increased modulation speed. In addition, the light emitted from the micro-LED has a relatively narrow divergence angle and narrow emission linewidth, making the micro-LED suitable for optical communications.

公开(公告)号：US20210288035A1

公开(公告)日：2021-09-16

申请号：US16816669

申请日：2020-03-12

Applicant: Intel Corporation

Inventor： Thomas Liljeberg ,  Andrew C. Alduino ,  Ravindranath Vithal Mahajan ,  Ling Liao ,  Kenneth Brown ,  James Jaussi ,  Bharadwaj Parthasarathy ,  Nitin A. Deshpande

IPC: H01L25/16 ,  H01L23/00 ,  G02B6/42 ,  H01L23/367 ,  H04B10/40

Abstract: Embodiments may relate to a microelectronic package that includes a package substrate with an active bridge positioned therein. An active die may be coupled with the package substrate, and communicatively coupled with the active bridge. A photonic integrated circuit (PIC) may also be coupled with the package substrate and communicatively coupled with the active bridge. Other embodiments may be described or claimed.