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公开(公告)号：US11380974B2
公开(公告)日：2022-07-05
申请号：US16050507
申请日：2018-07-31
发明人： Josephine B. Chang , John M. Cotte
IPC分类号： H01P11/00 , H01P7/06 , H01P7/08 , H01P3/08 , H01P5/02 , H05K1/02 , H05K1/09 , H05K3/46 , H05K3/00
摘要： A technique relates to a superconducting airbridge on a structure. A first ground plane, resonator, and second ground plane are formed on a substrate. A first lift-off pattern is formed of a first lift-off resist and a first photoresist. The first photoresist is deposited on the first lift-off resist. A superconducting sacrificial layer is deposited while using the first lift-off pattern. The first lift-off pattern is removed. A cross-over lift-off pattern is formed of a second lift-off resist and a second photoresist. The second photoresist is deposited on the second lift-off resist. A cross-over superconducting material is deposited to be formed as the superconducting airbridge while using the cross-over lift-off pattern. The cross-over lift-off pattern is removed. The superconducting airbridge is formed to connect the first and second ground planes by removing the superconducting sacrificial layer underneath the cross-over superconducting material. The superconducting airbridge crosses over the resonator.
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2.发明授权公开(公告)号：US11069775B2
公开(公告)日：2021-07-20
申请号：US16690338
申请日：2019-11-21
发明人： Josephine B. Chang , Michael A. Guillorn , Isaac Lauer , Xin Miao
IPC分类号： H01L27/12 , H01L29/06 , H01L29/66 , H01L29/08 , H01L29/423 , H01L29/10 , H01L21/84 , H01L29/417 , H01L29/78
摘要： Field effect transistors and methods of forming the same include forming a stack of nanosheets of alternating layers of channel material and sacrificial material. A layer of sacrificial material forms a top layer of the stack. A dummy gate is formed over the stack. Stack material outside of a region covered by the dummy gate is removed. The sacrificial material is etched to form recesses in the sacrificial material layers. Spacers are formed in the recesses in the sacrificial material layers. At least one pair of spacers is formed in recesses above an uppermost layer of channel material. The dummy gates are etched away. The top layer of sacrificial material protects an uppermost layer of channel material from damage from the anisotropic etch. The sacrificial material is etched away to expose the layers of channel material. A gate stack is formed over, around, and between the layers of channel material.
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公开(公告)号：US10775258B2
公开(公告)日：2020-09-15
申请号：US15919405
申请日：2018-03-13
发明人： Ramachandran Muralidhar , Josephine B. Chang , Siyuan Lu , Theodore van Kessel , Hendrik F. Hamann
摘要： Heuristic-based techniques for gas leak source identification are provided. In one aspect, a method for identifying a location of a gas leak source includes: obtaining gas sensor data and wind data synchronously from a gas leak detection system having a network of interconnected motes comprising gas sensors and wind sensors, with the gas sensors arranged around possible gas leak sources in a given area of interest; identifying the location of the gas leak source using the gas sensor data and wind data; and determining a magnitude of gas leak from the gas leak source using the location of the gas leak source and a distance d between the location of the gas leak source and a select one of the gas sensors from which the gas sensor data was obtained. A gas leak detection system is also provided.
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4.发明申请公开(公告)号：US20200011843A1
公开(公告)日：2020-01-09
申请号：US16574593
申请日：2019-09-18
发明人： Josephine B. Chang , Hendrik F. Hamann , Siyuan Lu , Ramachandran Muralidhar , Theodore G. Van Kessel
摘要： A method for measuring pollution that includes providing a plurality of analyte sensors arranged in a grid over a sensing area, wherein the analyte sensors measure a pollutant, and positioning at least one current sensor in the sensing area. A pollution source is localized using a pollution source locator including a dispersion model and at least one hardware processor to interpolate a location of a pollution source from variations in current measured from the current sensors and measurements of pollutants from the analyte sensors.
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5.发明申请公开(公告)号：US20190237541A1
公开(公告)日：2019-08-01
申请号：US16375218
申请日：2019-04-04
发明人： Josephine B. Chang , Michael A. Guillorn , Isaac Lauer , Xin Miao
IPC分类号： H01L29/06 , H01L27/12 , H01L29/66 , H01L29/423 , H01L29/08 , H01L29/417 , H01L29/78 , H01L29/10
摘要： Field effect transistors include a stack of nanosheets of vertically arranged channel layers. A gate stack is formed over, around, and between the vertically arranged channel layers. Spacers are formed, with at least one top pair of spacers being positioned above an uppermost channel layer. The top pair of spacers each has a curved lower portion with a curved surface in contact with the gate stack and a straight upper portion that extends vertically from the curved portion along a straight sidewall of the gate stack.
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6.发明授权公开(公告)号：US10366892B2
公开(公告)日：2019-07-30
申请号：US15898958
申请日：2018-02-19
IPC分类号： H01L21/265 , H01L21/762 , H01L27/12 , H01L21/84 , H01L29/786
摘要： Techniques for forming dual III-V semiconductor channel materials to enable fabrication of different device types on the same chip/wafer are provided. In one aspect, a method of forming dual III-V semiconductor channel materials on a wafer includes the steps of: providing a wafer having a first III-V semiconductor layer on an oxide; forming a second III-V semiconductor layer on top of the first III-V semiconductor layer, wherein the second III-V semiconductor layer comprises a different material with an electron affinity that is less than an electron affinity of the first III-V semiconductor layer; converting the first III-V semiconductor layer in at least one second active area to an insulator using ion implantation; and removing the second III-V semiconductor layer from at least one first active area selective to the first III-V semiconductor layer.
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公开(公告)号：US20190137469A1
公开(公告)日：2019-05-09
申请号：US16242488
申请日：2019-01-08
IPC分类号： G01N33/00
摘要： The present invention involves a multimodal sensor network for analyte detection. A first mode may involve low-power detection and a second mode may involve determining an analyte concentration and transmitting data associated with the analyte concentration. Specifically, the first mode may include establishing an analyte sensor network in a detection region, detecting an analyte in the detection region, and generating an electrical signal in response to the detecting the analyte. In response to the electrical signal exceeding a first threshold, the analyte detection system may operate in the second mode. The second mode may include requesting data associated with the one or more environmental conditions, determining an analyte concentration based on one or more environmental conditions transmitting data associated with the analyte concentration.
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公开(公告)号：US20190049403A1
公开(公告)日：2019-02-14
申请号：US15674265
申请日：2017-08-10
发明人： Josephine B. Chang , Talia S. Gershon , Supratik Guha , Hendrik F. Hamann , Jiaxing Liu , Theodore G. van Kessel
IPC分类号： G01N27/407 , G01N27/416
摘要： Low power combustible gas sensors using a thermocouple design are provided. In one aspect, a combustible gas sensor includes: at least one first electrode; at least one second electrode formed from a dissimilar material from the first electrode; and a catalytic material at an active reaction junction between the first electrode and the second electrode, wherein the active reaction junction between the first electrode and the second electrode forms a thermocouple. A sensing device is including, e.g., multiple sensors, and a method for sensing combustible gas using the present sensors are also provided.
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公开(公告)号：US20190042962A1
公开(公告)日：2019-02-07
申请号：US15669139
申请日：2017-08-04
IPC分类号： G06N99/00 , G11C11/44 , H03K19/195 , H01L27/18 , G11C16/02
CPC分类号： G06N10/00 , G11C11/44 , G11C16/02 , H01L27/18 , H01L39/025 , H01L39/045 , H01L39/22 , H01L39/223 , H01L39/2493 , H03K19/1952
摘要： A technique relates to a superconducting qubit. A Josephson junction includes a first superconductor and a second superconductor formed on a non-superconducting metal. A capacitor is coupled in parallel with the Josephson junction.
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公开(公告)号：US20180350909A1
公开(公告)日：2018-12-06
申请号：US16042498
申请日：2018-07-23
IPC分类号： H01L29/06 , H01L29/08 , H01L29/423 , H01L29/78 , H01L29/66 , H01L29/40 , H01L29/775 , H01L29/417
CPC分类号： H01L29/0673 , H01L29/0847 , H01L29/401 , H01L29/41725 , H01L29/42392 , H01L29/66439 , H01L29/6653 , H01L29/66545 , H01L29/66553 , H01L29/6656 , H01L29/66795 , H01L29/775 , H01L29/785
摘要： Field effect transistors include a stack of nanowires of vertically arranged channel layers. A source and drain region is disposed at respective ends of the vertically arranged channel layers. A gate stack is formed over, around, and between the vertically arranged channel layers. Internal spacers are each formed between the gate stack and a respective source or drain region, with at least one pair of spacers being positioned above an uppermost channel layer.
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