公开(公告)号：US20180174935A1

公开(公告)日：2018-06-21

申请号：US15838417

申请日：2017-12-12

Applicant: Infineon Technologies AG

Inventor： Hock Heng CHONG ,  Sook Woon CHAN ,  Chau Fatt CHIANG ,  Khar Foong CHUNG ,  Chee Hong FANG ,  Muhammat Sanusi MUHAMMAD ,  Mei Chin NG ,  Yean Seng NG ,  Pei Luan POK ,  Choon Huey WANG

IPC: H01L23/28 ,  H01L23/00

Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.

公开(公告)号：US20170256472A1

公开(公告)日：2017-09-07

申请号：US15448018

申请日：2017-03-02

Applicant: Infineon Technologies AG

Inventor： Sook Woon CHAN ,  Chau Fatt CHIANG ,  Kok Yau CHUA ,  Soon Lock GOH ,  Swee Kah LEE ,  Joachim MAHLER ,  Mei Chin NG ,  Beng Keh SEE ,  Guan Choon Matthew Nelson TEE

IPC: H01L23/31 ,  H01L23/29 ,  H01L23/552 ,  H01L21/56 ,  C23C18/16 ,  C09D5/00 ,  C09D201/00 ,  C23C18/34 ,  C23C18/18 ,  H01L23/66 ,  H01L23/00

CPC classification number: H01L23/3192 ,  C09D5/002 ,  C09D5/24 ,  C09D201/00 ,  C23C18/1608 ,  C23C18/1612 ,  C23C18/1637 ,  C23C18/166 ,  C23C18/1689 ,  C23C18/182 ,  C23C18/1831 ,  C23C18/1834 ,  C23C18/1837 ,  C23C18/1868 ,  C23C18/1879 ,  C23C18/1882 ,  C23C18/34 ,  H01L21/56 ,  H01L21/568 ,  H01L23/293 ,  H01L23/295 ,  H01L23/552 ,  H01L23/66 ,  H01L24/16 ,  H01L2223/6677 ,  H01L2224/16501 ,  H01L2224/97 ,  H01L2924/15313 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2224/81

Abstract: A package which comprises a first encapsulant configured so that electrically conductive material is plateable thereon, and a second encapsulant configured so that electrically conductive material is not plateable thereon.

公开(公告)号：US20190341324A1

公开(公告)日：2019-11-07

申请号：US16514853

申请日：2019-07-17

Applicant: Infineon Technologies AG

Inventor： Sook Woon CHAN ,  Chau Fatt CHIANG ,  Kok Yau CHUA ,  Soon Lock GOH ,  Swee Kah LEE ,  Joachim MAHLER ,  Mei Chin NG ,  Beng Keh SEE ,  Guan Choon Matthew Nelson TEE

IPC: H01L23/31 ,  H01L23/29 ,  C23C18/18 ,  C23C18/16 ,  C09D5/24 ,  C09D5/00 ,  C09D201/00 ,  H01L21/56 ,  C23C18/34 ,  H01L23/552 ,  H01L23/66 ,  H01L23/00

Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.