公开(公告)号：US20160225707A1

公开(公告)日：2016-08-04

申请号：US14778128

申请日：2014-12-16

Applicant: Intel Corporation

Inventor： Huiyang FEI ,  Prasanna RAGHAVAN

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/00 ,  H01L23/29 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/065

CPC classification number: H01L23/49833 ,  H01L21/4853 ,  H01L21/565 ,  H01L23/13 ,  H01L23/16 ,  H01L23/293 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49883 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/1703 ,  H01L2224/17181 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2924/14 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/37001 ,  H01L2924/384 ,  H01L2924/014 ,  H01L2924/00014

Abstract: The electronic package includes a substrate and an electronic component mounted to a surface of the substrate. An interposer is mounted to the surface of the substrate such that the interposer surrounds the electronic component and is electrically connected to the substrate. An over-mold covers the electronic component. In other forms, the example electronic package may be incorporated into an electronic assembly. The electronic assembly further includes a second electronic component mounted to the interposer. As an example, the second electronic component may be mounted to the interposer using solder bumps. It should be noted that any technique that is known now, or discovered in the future, may be used to mount the second electronic component to the interposer.

Abstract translation: 电子封装包括基板和安装到基板的表面的电子部件。 插入器安装到基板的表面，使得插入件围绕电子部件并且电连接到基板。 一个覆盖模具覆盖电子元件。 在其他形式中，示例性电子封装可以并入到电子组件中。 电子组件还包括安装到插入器的第二电子部件。 作为示例，第二电子部件可以使用焊料凸块安装到插入器。 应当注意，现在已知或将来发现的任何技术可以用于将第二电子部件安装到插入器。

公开(公告)号：US20190317285A1

公开(公告)日：2019-10-17

申请号：US16473216

申请日：2017-09-12

Applicant: Intel Corporation

Inventor： Shawna M. LIFF ,  Henning BRAUNISCH ,  Timothy A. GOSSELIN ,  Prasanna RAGHAVAN ,  Yikang DENG ,  Zhiguo QIAN

IPC: G02B6/42 ,  F21V8/00 ,  G02B6/293

Abstract: An optoelectronic apparatus is presented. In embodiments, the apparatus may include a package including a substrate with a first side and a second side opposite the first side, wherein the first side comprises a ball grid array (BGA) field. The apparatus may further include one or more integrated circuits (ICs) disposed on the first side of the substrate, inside the BGA field, that thermally interface with a printed circuit board (PCB), to which the package is to be coupled, one or more optical ICs coupled to the second side and communicatively coupled with the one or more ICs via interconnects provided in the substrate, wherein at least one of the optical ICs is at least partially covered by an integrated heat spreader (IHS), to provide dissipation of heat produced by the at least one optical IC.

公开(公告)号：US20200066655A1

公开(公告)日：2020-02-27

申请号：US16611830

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Feras EID ,  Venkata Suresh R. GUTHIKONDA ,  Shankar DEVASENATHIPATHY ,  Chandra M. JHA ,  Je-Young CHANG ,  Kyle YAZZIE ,  Prasanna RAGHAVAN ,  Pramod MALATKAR

IPC: H01L23/00 ,  H01L23/544 ,  H05K1/02 ,  H05K1/18 ,  H01L25/065 ,  H01L21/50

Abstract: A foundation layer having a stiffener and methods of forming a stiffener are described. One or more dies are formed over the foundation layer. Each die has a front side surface that is electrically coupled to the foundation layer and a back side surface that is opposite from the front side surface. A stiffening layer (or a stiffener) is formed on the back side surface of at least one of the dies. The stiffening layer may be directly coupled to the back side surface of the one or more dies without an adhesive layer. The stiffening layer may include one or more materials, including at least one of a metal, a metal alloy, and a ceramic. The stiffening layer may be formed to reduce warpage based on the foundation layer and the dies. The one or more materials of the stiffening layer can be formed using a cold spray.

公开(公告)号：US20230307379A1

公开(公告)日：2023-09-28

申请号：US17703768

申请日：2022-03-24

Applicant: Intel Corporation

Inventor： Phil GENG ,  Patrick NARDI ,  Ravindranath V. MAHAJAN ,  Dingying David XU ,  Prasanna RAGHAVAN ,  John HARPER ,  Sanjoy SAHA ,  Yang JIAO

IPC: H01L23/00 ,  H01L23/498

CPC classification number: H01L23/562 ,  H01L23/49816

Abstract: Embodiments disclosed herein include an electronic package. In an embodiment, the electronic package comprises a package substrate, and a die coupled to the package substrate. In an embodiment, the electronic package further comprises a stiffener on the package substrate surrounding the die. In an embodiment, the stiffener is a ring with one or more corner regions and one or more beams. In an embodiment, each beam is between a pair of corner regions, and the one or more corner regions have a first thickness and the one or more beams have a second thickness that is greater than the first thickness.