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公开(公告)号：US20180067533A1
公开(公告)日：2018-03-08
申请号：US15689646
申请日：2017-08-29
Applicant: INTEL CORPORATION
Inventor： Federico Ardanaz , Jonathan M. Eastep , Richard J. Greco , Ramkumar Nagappan , Alan B. Kyker
IPC: G06F1/32
CPC classification number: G06F1/325 , G06F1/3287 , G06F1/3293 , Y02D10/122 , Y02D10/171
Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
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公开(公告)号：US20210325952A1
公开(公告)日：2021-10-21
申请号：US17357479
申请日：2021-06-24
Applicant: INTEL CORPORATION
Inventor： Federico Ardanaz , Jonathan M. Eastep , Richard J. Greco , Ramkumar Nagappan , Alan B. Kyker
IPC: G06F1/3234 , G06F1/3287 , G06F1/3293
Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
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公开(公告)号：US20170185129A1
公开(公告)日：2017-06-29
申请号：US14998082
申请日：2015-12-24
Applicant: Intel Corporation
Inventor： Alan G. Gara , Steve S. Sylvester , Jonathan M. Eastep , Ramkumar Nagappan , Christopher M. Cantalupo
CPC classification number: G06F1/3203 , G06F1/206 , G06F1/26 , G06F1/329 , G06F1/3296 , G06F9/5094 , Y02B70/14 , Y02D10/24
Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
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公开(公告)号：US11061463B2
公开(公告)日：2021-07-13
申请号：US15689646
申请日：2017-08-29
Applicant: INTEL CORPORATION
Inventor： Federico Ardanaz , Jonathan M. Eastep , Richard J. Greco , Ramkumar Nagappan , Alan B. Kyker
IPC: G06F1/32 , G06F1/3234 , G06F1/3287 , G06F1/3293
Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
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公开(公告)号：US10355959B2
公开(公告)日：2019-07-16
申请号：US15357415
申请日：2016-11-21
Applicant: INTEL CORPORATION
Inventor： Manasi Deval , Jim Daubert , Eric K. Mann , Cong Li , Muralidhar Murali Rajappa , Anjaneya Reddy Chagam Reddy , David Wescott , Ramkumar Nagappan , Raed Kanjo
IPC: H04L12/28 , H04L12/26 , H04L29/08 , H04L1/16 , H04L12/24 , H04L12/851 , H04L12/931 , H04L29/06
Abstract: Examples are disclosed for determining or using server transaction latency information. In some examples, a network input/output device coupled to a server may be capable of time stamping information related to ingress request and egress response packets for a transaction. For these examples, elements of the server may be capable of determining transaction latency values based on the time stamped information. The determined transaction latency values may be used to monitor or manage operating characteristics of the server to include an amount of power provided to the server or an ability of the server to support one or more virtual servers. Other examples are described and claimed.
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Patent Agency Ranking
公开(公告)号：US20180372551A1
公开(公告)日：2018-12-27
申请号：US15629625
申请日：2017-06-21
Applicant: Intel Corporation
Inventor： Janusz P. Jurski , Tozer J. Bandorawalla , Ramkumar Nagappan , Mariusz Oriol , Piotr Sawicki , Robin A. Steinbrecher , Shankar Krishnan
Abstract: An apparatus is provided which comprises: a first circuitry to receive a measurement of a first temperature of a section of a computing device during a first loading condition of the computing device, and to receive a measurement of a second temperature of the section of the computing device during a second loading condition of the computing device; and a second circuitry to detect a potential fault in a cooling system to cool the computing device, based at least in part on the first temperature and the second temperature.
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公开(公告)号：US09864423B2
公开(公告)日：2018-01-09
申请号：US14998082
申请日：2015-12-24
Applicant: Intel Corporation
Inventor： Alan G. Gara , Steve S. Sylvester , Jonathan M. Eastep , Ramkumar Nagappan , Christopher M. Cantalupo
CPC classification number: G06F1/3203 , G06F1/206 , G06F1/26 , G06F1/329 , G06F1/3296 , G06F9/5094 , Y02B70/14 , Y02D10/24
Abstract: Apparatus and methods may provide for characterizing a plurality of similar components of a distributed computing system based on a maximum safe operation level associated with each component and storing characterization data in a database and allocating non-uniform power to each similar component based at least in part on the characterization data in the database to substantially equalize performance of the components.
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公开(公告)号：US09503347B2
公开(公告)日：2016-11-22
申请号：US13976964
申请日：2012-12-18
Applicant: INTEL CORPORATION
Inventor： Manasi Deval , Jim Daubert , Eric Mann , Cong Li , Muralidhar Murali Rajappa , Anjaneya Reddy Chagam Reddy , David Wescott , Ramkumar Nagappan , Raed Kanjo
IPC: G06F11/00 , H04J1/16 , H04L1/00 , H04L12/26 , H04L29/08 , H04L1/16 , H04L12/24 , H04L12/851 , H04L12/931 , H04L29/06
CPC classification number: H04L43/0888 , H04L1/1678 , H04L41/12 , H04L41/5032 , H04L43/0882 , H04L43/0894 , H04L43/106 , H04L47/2425 , H04L49/354 , H04L67/1029 , H04L67/148 , H04L69/161 , H04L69/22 , H04L69/28
Abstract: Examples are disclosed for determining or using server transaction latency information. In some examples, a network input/output device coupled to a server may be capable of time stamping information related to ingress request and egress response packets for a transaction. For these examples, elements of the server may be capable of determining transaction latency values based on the time stamped information. The determined transaction latency values may be used to monitor or manage operating characteristics of the server to include an amount of power provided to the server or an ability of the server to support one or more virtual servers. Other examples are described and claimed.
Abstract translation: 公开了用于确定或使用服务器事务延迟信息的示例。 在一些示例中，耦合到服务器的网络输入/输出设备可能能够时间标记与用于事务的入口请求和出口响应分组有关的信息。 对于这些示例，服务器的元件可以能够基于时间戳信息来确定事务等待时间值。 确定的事务延迟值可以用于监视或管理服务器的操作特性，以包括提供给服务器的功率量或服务器支持一个或多个虚拟服务器的能力。 其他的例子被描述和要求保护。
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公开(公告)号：US11650652B2
公开(公告)日：2023-05-16
申请号：US17357479
申请日：2021-06-24
Applicant: INTEL CORPORATION
Inventor： Federico Ardanaz , Jonathan M. Eastep , Richard J. Greco , Ramkumar Nagappan , Alan B. Kyker
IPC: G06F1/32 , G06F1/3234 , G06F1/3287 , G06F1/3293
CPC classification number: G06F1/325 , G06F1/3287 , G06F1/3293 , Y02D10/00
Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
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公开(公告)号：US09753526B2
公开(公告)日：2017-09-05
申请号：US14581854
申请日：2014-12-23
Applicant: Intel Corporation
Inventor： Federico Ardanaz , Jonathan M. Eastep , Richard J. Greco , Ramkumar Nagappan , Alan B. Kyker
IPC: G06F1/32
CPC classification number: G06F1/325 , G06F1/3287 , G06F1/3293 , Y02D10/122 , Y02D10/171
Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
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