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公开(公告)号：US09569109B2
公开(公告)日：2017-02-14
申请号：US14747976
申请日：2015-06-23
发明人： John K. Debrosse , Blake G. Fitch , Michele M. Franceschini , Todd E. Takken , Daniel C. Worledge
CPC分类号： G06F3/0613 , G06F3/0602 , G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0673 , G06F3/0679 , G06F3/0688 , G06F13/1668 , G11C7/10 , G11C7/1003 , G11C7/1015 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069
摘要： A memory includes non-volatile memory devices, each of which has multiple nonvolatile memory cells. A write controller streams bits to the memory devices in groups of N bits using a write data channel having write bus drivers, receivers and write bus topology that take advantage of high-speed signaling to optimize a speed of writing to the memory devices. Consecutive groups of bits are written to consecutive memory cells within respective memory devices. A self-referenced read controller reads bits from the memory devices using a read channel having read drivers, receivers, and read bus topology that include no design requirements for high-speed or low-latency data transmission.
摘要翻译： 存储器包括非易失性存储器件，每个存储器件具有多个非易失性存储器单元。 写控制器使用具有写总线驱动器，接收器和写总线拓扑的写数据通道以N组的方式将比特流分组到存储器件，其利用高速信令优化对存储器件的写入速度。 连续的比特组被写入相应的存储器件中的连续的存储器单元。 自参考读取控制器使用具有读驱动器，接收器和读总线拓扑的读通道从存储器件读取位，其中不包括高速或低延迟数据传输的设计要求。
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公开(公告)号：US20140317219A1
公开(公告)日：2014-10-23
申请号：US14030655
申请日：2013-09-18
IPC分类号： H04L29/08
CPC分类号： G06F12/0246 , G06F12/109 , G06F15/17331 , H04L67/1097
摘要： A queued, byte addressed system and method for accessing flash memory and other non-volatile storage class memory, and potentially other types of non-volatile memory (NVM) storage systems. In a host device, e.g., a standalone or networked computer, having attached NVM device storage integrated into a switching fabric wherein the NVM device appears as an industry standard OFED™ RDMA verbs provider. The verbs provider enables communicating with a ‘local storage peer’ using the existing OpenFabrics RDMA host functionality. User applications issue RDMA Read/Write directives to the ‘local peer (seen as a persistent storage) in NVM enabling NVM memory access at byte granularity. The queued, byte addressed system and method provides for Zero copy NVM access. The methods enables operations that establish application private Queue Pairs to provide asynchronous NVM memory access operations at byte level granularity.
摘要翻译： 用于访问闪存和其他非易失性存储类存储器的排队字节寻址系统和方法，以及潜在的其他类型的非易失性存储器（NVM）存储系统。 在主机设备（例如独立或联网的计算机）中，具有集成到交换结构中的NVM设备存储，其中NVM设备出现为工业标准OFED TM RDMA动词提供者。 动词提供者可以使用现有的OpenFabrics RDMA主机功能与“本地存储对等体”进行通信。 用户应用程序向NVM中的本地对等体（作为持久存储器）发出RDMA读/写指令，以字节粒度实现NVM内存访问。 排队的字节寻址系统和方法提供零拷贝NVM访问。 这些方法允许建立应用程序专用队列对的操作以字节级粒度提供异步NVM内存访问操作。
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公开(公告)号：US20140136770A1
公开(公告)日：2014-05-15
申请号：US14160590
申请日：2014-01-22
IPC分类号： G06F3/06
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0688 , G06F11/1658 , G06F11/1666 , G06F12/02
摘要： Persistent data storage with low latency is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
摘要翻译： 具有低延迟的持久数据存储由计算机程序产品提供，计算机程序产品包括被配置用于接收包括写入数据的低延迟存储命令的计算机程序代码。 写入数据被写入由以第一访问速度为特征的非易失性固态存储器技术实现的第一存储器件。 确认写入数据已成功写入第一个存储器件。 写入数据被写入由易失性存储器技术实现的第二存储器件。 当在第一存储装置中累积了预定量的数据时，第一存储装置中的数据的至少一部分被写入第三存储装置。 第三存储器件通过非易失性固态存储器技术来实现，其特征在于比第一存取速度慢的第二存取速度。
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公开(公告)号：US09823858B2
公开(公告)日：2017-11-21
申请号：US15343861
申请日：2016-11-04
发明人： John K. DeBrosse , Blake G. Fitch , Michele M. Franceschini , Todd E. Takken , Daniel C. Worledge
CPC分类号： G06F3/0613 , G06F3/0602 , G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0673 , G06F3/0679 , G06F3/0688 , G06F13/1668 , G11C7/10 , G11C7/1003 , G11C7/1015 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069
摘要： A method for memory management includes streaming bits to a memory buffer on a memory device using a write data channel that optimizes a speed of writing to the memory devices. The bits are written to non-volatile memory cells in the memory device at a first speed, using a bi-directional bus. Bits are read from the memory device over a read channel to provide reads at a second speed that is slower than the first speed, using the bi-directional bus.
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公开(公告)号：US09496018B2
公开(公告)日：2016-11-15
申请号：US14676292
申请日：2015-04-01
发明人： John K. Debrosse , Blake G. Fitch , Michele M. Franceschini , Todd E. Takken , Daniel C. Worledge
IPC分类号： G11C11/16
CPC分类号： G06F3/0613 , G06F3/0602 , G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0673 , G06F3/0679 , G06F3/0688 , G06F13/1668 , G11C7/10 , G11C7/1003 , G11C7/1015 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069
摘要： A memory includes non-volatile memory devices, each of which has multiple nonvolatile memory cells. A write controller streams bits to the memory devices in groups of N bits using a write data channel having write bus drivers, receivers and write bus topology that take advantage of high-speed signaling to optimize a speed of writing to the memory devices. Consecutive groups of bits are written to consecutive memory cells within respective memory devices. A self-referenced read controller reads bits from the memory devices using a read channel having read drivers, receivers, and read bus topology that include no design requirements for high-speed or low-latency data transmission.
摘要翻译： 存储器包括非易失性存储器件，每个存储器件具有多个非易失性存储器单元。 写控制器使用具有写总线驱动器，接收器和写总线拓扑的写数据通道以N组的方式将比特流分组到存储器件，其利用高速信令优化对存储器件的写入速度。 连续的比特组被写入相应的存储器件中的连续的存储器单元。 自参考读取控制器使用具有读驱动器，接收器和读总线拓扑的读通道从存储器件读取位，其中不包括高速或低延迟数据传输的设计要求。
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公开(公告)号：US08880834B2
公开(公告)日：2014-11-04
申请号：US14160590
申请日：2014-01-22
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0688 , G06F11/1658 , G06F11/1666 , G06F12/02
摘要： Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
摘要翻译： 持续数据存储由计算机程序产品提供，该计算机程序产品包括被配置用于接收包括写入数据的低延迟存储命令的计算机程序代码。 写入数据被写入由以第一访问速度为特征的非易失性固态存储器技术实现的第一存储器件。 确认写入数据已成功写入第一个存储器件。 写入数据被写入由易失性存储器技术实现的第二存储器件。 当在第一存储装置中累积了预定量的数据时，第一存储装置中的数据的至少一部分被写入第三存储装置。 第三存储器件通过非易失性固态存储器技术来实现，其特征在于比第一存取速度慢的第二存取速度。
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公开(公告)号：US09792052B2
公开(公告)日：2017-10-17
申请号：US15272933
申请日：2016-09-22
发明人： John K. Debrosse , Blake G. Fitch , Michele M. Franceschini , Todd E. Takken , Daniel C. Worledge
CPC分类号： G06F3/0613 , G06F3/0602 , G06F3/061 , G06F3/0656 , G06F3/0659 , G06F3/0673 , G06F3/0679 , G06F3/0688 , G06F13/1668 , G11C7/10 , G11C7/1003 , G11C7/1015 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C13/0069
摘要： A memory includes multiple non-volatile memory devices, each having multiple nonvolatile memory cells. A write controller is configured to stream bits to the memory devices using a write data channel that optimizes a speed of writing to the memory devices to provide writes at a first speed. A read controller is configured to read bits from the memory devices, at a second speed slower than the first speed, using a read channel. A bi-directional bus that both the write controller and the self-referenced read controller share to access the plurality of non-volatile memory devices.
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公开(公告)号：US20140317336A1
公开(公告)日：2014-10-23
申请号：US13975643
申请日：2013-08-26
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/109 , G06F15/17331 , H04L67/1097
摘要： A queued, byte addressed system and method for accessing flash memory and other non-volatile storage class memory, and potentially other types of non-volatile memory (NVM) storage systems. In a host device, e.g., a standalone or networked computer, having attached NVM device storage integrated into a switching fabric wherein the NVM device appears as an industry standard OFED™ RDMA verbs provider. The verbs provider enables communicating with a ‘local storage peer’ using the existing OpenFabrics RDMA host functionality. User applications issue RDMA Read/Write directives to the ‘local peer (seen as a persistent storage) in NVM enabling NVM memory access at byte granularity. The queued, byte addressed system and method provides for Zero copy NVM access. The methods enables operations that establish application private Queue Pairs to provide asynchronous NVM memory access operations at byte level granularity.
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公开(公告)号：US20140052755A1
公开(公告)日：2014-02-20
申请号：US14056517
申请日：2013-10-17
发明人： Michael C. Pitman , Blake G. Fitch , Hans W. Horn , Wolfgang Huber , Julia E. Rice , William C. Swope
IPC分类号： G06F17/30
CPC分类号： G06F16/245 , B60G3/20 , B60G2200/144 , B60G2200/44
摘要： A field-based similarity search system includes an input device which inputs a query molecule, and a processor which partitions a conformational space of the query molecule into a fragment graph including an acyclic graph including plural fragment nodes connected by rotatable bond edges, computes a property field on fragment pairs of fragments of the query molecule from the fragment graph, the property field including a local approximation of a property field of the query molecule, constructs a set of features of the fragment pairs based on the property field, the features including a set of local, rotationally invariant, and moment-based descriptors generated from all conformations of the fragment graph of the query molecule, and weights the descriptors according to importance as perceived from a training set of descriptors to generate a context-adapted descriptor-to-key mapping which maps the set of descriptors to a set of feature keys.
摘要翻译： 基于场的相似性搜索系统包括输入查询分子的输入装置和将查询分子的构象空间分割成片段图的处理器，该片段图包括包括通过可旋转键合边缘连接的多个片段节点的非循环图，计算属性 包括查询分子的属性字段的局部近似的属性字段基于属性字段构建片段对的一组特征，其特征包括： 由查询分子的片段图的所有构象产生的局部，旋转不变和基于时刻的描述符集合，并且根据从描述符的训练集所感知的重要性对描述符进行加权，以生成上下文适应的描述符 - 键映射，其将描述符集合映射到一组特征密钥。
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