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公开(公告)号：US10581761B2
公开(公告)日：2020-03-03
申请号：US15639048
申请日：2017-06-30
发明人： Keshav G. Kamble , Dar-Ren Leu , Vijoy Pandey
IPC分类号： H04L12/879 , H04L12/947
摘要： Reassembly of member cells into a packet comprises receiving an incoming member cell of a packet from a switching fabric wherein each member cell comprises a segment of the packet and a header, generating a reassembly key using selected information from the incoming member cell header wherein the selected information is the same for all member cells of the packet, checking a reassembly table in a content addressable memory to find an entry that includes a logic key matching the reassembly key, and using a content index in the found entry and a sequence number of the incoming member cell within the packet, to determine a location offset in a reassembly buffer area for storing the incoming member cell at said location offset in the reassembly buffer area for the packet for reassembly.
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公开(公告)号：US10263883B2
公开(公告)日：2019-04-16
申请号：US15378792
申请日：2016-12-14
发明人： Keshav G. Kamble
IPC分类号： H04L12/729 , H04L12/707 , H04L12/751 , H04L12/715 , H04L12/931 , H04L12/721
摘要： Certain embodiments of the present disclosure provide a method for communicating data flows. The method generally includes receiving control flow information corresponding to a data flow for communication from a first device to a second device, and determining one or more characteristics of the data flow based on the control flow information. For example, the one or more characteristics may include whether the data flow is a mice flow or an elephant flow. In certain aspects, the method further includes communicating the data flow based on the determined characteristics.
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公开(公告)号：US09904654B2
公开(公告)日：2018-02-27
申请号：US15003751
申请日：2016-01-21
IPC分类号： H04L12/931 , G06F13/42 , G06F13/38 , G06F21/85 , H04L29/06 , H04L12/46 , G06F13/24 , H04L12/721 , G06F13/40
CPC分类号： G06F13/4282 , G06F13/24 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F21/85 , G06F2213/2424 , H04L12/4633 , H04L12/4641 , H04L45/44 , H04L49/351 , H04L63/08 , H04L63/162
摘要： In one embodiment, a method includes receiving a request from a remote distributed fabric protocol (DFP) system master, using a dedicated processor of a DFP system member, to register local I2C devices on the DFP system member, and sending an acknowledgement including a list of local I2C bus devices back to the DFP system master using the dedicated processor of the DFP system member. The acknowledgement present on the DFP system member. In another embodiment, a system includes a local processor, one or more local I2C bus devices, and a dedicated processor electrically coupled to the local I2C bus devices. The dedicated processor is configured to route interrupts from the local I2C bus devices to the local processor, and expose the local I2C devices to a remote DFP system master by sending details of the local I2C bus devices to the remote DFP system master.
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公开(公告)号：US09893987B2
公开(公告)日：2018-02-13
申请号：US15406495
申请日：2017-01-13
发明人： Keshav G. Kamble , Selvaraj Rajan , Atul A. Tambe
IPC分类号： H04L12/775 , H04L12/713 , H04L12/24 , H04L12/931
CPC分类号： H04L45/583 , H04L41/0806 , H04L41/12 , H04L45/586 , H04L49/70
摘要： In one embodiment, a method includes sending a switch discovery signal to one or more of a plurality of switches, receiving a reply to the switch discovery signal from the one or more of the plurality of switches, each reply comprising a switch identifier (ID) and a quantity of ports, receiving configuration information identifying at least one virtual stack to create, determining a virtual topology for the at least one virtual stack based on the configuration information, creating a first virtual stack of the at least one virtual stack by assigning at least one switch port of a source switch to the first virtual stack of the at least one virtual stack in accordance with the configuration information, and storing the virtual topology in a mapping table local to a computer comprising the first computer processor.
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公开(公告)号：US09893874B2
公开(公告)日：2018-02-13
申请号：US15141612
申请日：2016-04-28
CPC分类号： H04L7/02 , G06F1/12 , H04J3/0667 , H04L7/0054 , H04L41/0853 , H04L43/0852 , H04L45/121 , H04L45/20 , H04L45/245
摘要： In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a processor to cause the processor to determine a lowest latency LAG port for each LAG in any path of a plurality of paths connecting a first device with a second device, and discover a configuration of a network fabric connecting the first device to the second device after determining the lowest latency LAG port for each LAG therein. The network fabric includes a plurality of devices interconnected with LAGs. Moreover, the embodied program instructions are executable by the processor to perform clock synchronization for each path of the plurality of paths and determine a latency for each path of the plurality of paths based on the clock synchronization and the lowest latency LAG port for each LAG included in the plurality of paths.
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公开(公告)号：US09843529B2
公开(公告)日：2017-12-12
申请号：US14876528
申请日：2015-10-06
发明人： Claude Basso , Nikolaos Chrysos , Casimer M. DeCusatis , Mircea Gusat , Keshav G. Kamble , Cyriel J. Minkenberg , Fredy D. Neeser , Kenneth M. Valk
IPC分类号： H04L12/873 , H04L12/863
CPC分类号： H04L47/527 , H04L47/521 , H04L47/6295
摘要： In one embodiment, a method includes selecting a flow from a head of a first control queue or a second control queue. The method also includes providing service to the selected flow. Moreover, the method includes decreasing a service credit of the selected flow by an amount corresponding to an amount of service provided to the selected flow. In another embodiment, a computer program product includes a computer readable storage medium having program code embodied therewith. The embodied program code is readable/executable by a device to select, by the device, a flow from a head of a first control queue or a second control queue. The embodied program code is also readable/executable to provide, by the device, service to the selected flow, and decrease, by the device, a service credit of the selected flow by an amount corresponding to an amount of service provided to the selected flow.
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公开(公告)号：US09762493B2
公开(公告)日：2017-09-12
申请号：US14644137
申请日：2015-03-10
发明人： Sisir Chowdhury , David Iles , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： H04L12/891 , H04L12/803 , H04L12/709 , H04L29/06 , H04L29/08 , H04L12/911
CPC分类号： H04L47/125 , H04L45/245 , H04L47/41 , H04L47/827 , H04L67/1044 , H04L69/24 , Y02D50/30
摘要： In one embodiment, a switch includes a processor and logic integrated with and/or executable by the processor to receive details about which link aggregation (LAG) information about a first peer switch will be exchanged with the switch, send to the first peer switch, prior to receiving the LAG information about the first peer switch, details about which LAG information about the switch will be exchanged with the first peer switch, receive the LAG information about the first peer switch, store the LAG information about the first peer switch, and use the LAG information about the first peer switch and the LAG information about the switch to determine load balancing across one or more connections between the switch and the first peer switch.
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公开(公告)号：US09692706B2
公开(公告)日：2017-06-27
申请号：US13863275
申请日：2013-04-15
发明人： Claude Basso , Robert Birke , Daniel Crisan , Casimer M. DeCusatis , Mircea Gusat , Keshav G. Kamble , Cyriel J. Minkenberg
IPC分类号： H04L12/851 , H04L12/931
CPC分类号： H04L47/2441 , H04L49/351 , H04L49/70
摘要： In one embodiment, a system includes a hardware processor and logic integrated with and/or executable by the processor, the logic being adapted to receive a traffic flow having a plurality of packets, classify the traffic flow into a traffic class based on a characteristic of the traffic flow, the traffic class being selected from a plurality of traffic classes, store an identifier of the selected traffic class to one or more of the packets, and transmit the traffic flow according to its destination based on a priority of its selected traffic class. In more embodiments, additional systems, methods, and computer program products for prioritizing traffic flow handling are described.
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公开(公告)号：US09647953B2
公开(公告)日：2017-05-09
申请号：US15144614
申请日：2016-05-02
发明人： Bhalachandra G. Banavalikar , Casimer M. DeCusatis , Mircea Gusat , Keshav G. Kamble , Renato J. Recio
IPC分类号： H04L12/801 , H04L12/933 , H04L12/46 , H04L12/26
CPC分类号： H04L47/39 , H04L12/4641 , H04L43/08 , H04L49/10
摘要： In one embodiment, a system includes a hardware processor and logic integrated with and/or executable by the processor or media access control (MAC) functionality of a network port. The logic is configured to negotiate a credit aging duration during initialization of a link between a receiving endpoint and a sending endpoint, the receiving and sending endpoints being connected in a network fabric. The link includes at least one virtual link. The logic is also configured to receive an amount of available flow credits from the receiving endpoint and transmit one or more packets to the receiving endpoint. The amount of available flow credits are used to determine a capacity to process packets at the receiving endpoint. The exchange of flow credits is performed on a per virtual link basis. Other systems, methods, and computer program products are presented according to more embodiments.
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公开(公告)号：US20170126555A1
公开(公告)日：2017-05-04
申请号：US15406495
申请日：2017-01-13
发明人： Keshav G. Kamble , Selvaraj Rajan , Atul A. Tambe
IPC分类号： H04L12/775 , H04L12/24 , H04L12/931 , H04L12/713
CPC分类号： H04L45/583 , H04L41/0806 , H04L41/12 , H04L45/586 , H04L49/70
摘要： In one embodiment, a method includes sending a switch discovery signal to one or more of a plurality of switches, receiving a reply to the switch discovery signal from the one or more of the plurality of switches, each reply comprising a switch identifier (ID) and a quantity of ports, receiving configuration information identifying at least one virtual stack to create, determining a virtual topology for the at least one virtual stack based on the configuration information, creating a first virtual stack of the at least one virtual stack by assigning at least one switch port of a source switch to the first virtual stack of the at least one virtual stack in accordance with the configuration information, and storing the virtual topology in a mapping table local to a computer comprising the first computer processor.
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