Adaptive pain management and reduction based on monitoring user conditions

    公开(公告)号:US11929177B2

    公开(公告)日:2024-03-12

    申请号:US17224746

    申请日:2021-04-07

    IPC分类号: G16H50/20 G16H50/50

    CPC分类号: G16H50/20 G16H50/50

    摘要: Techniques regarding pain treatment are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can include: a data collection component that can determine at least one parameter associated with a pain perception of a subject, a computing component that can determine a relationship between the pain perception and the at least one parameter using artificial intelligence, and can determine a treatment for the subject based on the relationship; and a treatment component that can cause a device associated with the subject to apply at least a portion of the treatment.

    ADAPTIVE PAIN MANAGEMENT AND REDUCTION BASED ON MONITORING USER CONDITIONS

    公开(公告)号:US20210225514A1

    公开(公告)日:2021-07-22

    申请号:US17224746

    申请日:2021-04-07

    IPC分类号: G16H50/20 G16H50/50

    摘要: Techniques regarding pain treatment are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can include: a data collection component that can determine at least one parameter associated with a pain perception of a subject, a computing component that can determine a relationship between the pain perception and the at least one parameter using artificial intelligence, and can determine a treatment for the subject based on the relationship; and a treatment component that can cause a device associated with the subject to apply at least a portion of the treatment.

    INTERCONNECT STRUCTURES CONTAINING PATTERNABLE LOW-K DIELECTRICS AND ANTI-REFLECTIVE COATINGS AND METHOD OF FABRICATING THE SAME

    公开(公告)号:US20200219765A1

    公开(公告)日:2020-07-09

    申请号:US16238925

    申请日:2019-01-03

    IPC分类号: H01L21/768 H01L23/532

    摘要: A process for manufacturing interconnect BEOL structures from a patternable low-k dielectric on a microcircuit substrate having an optional anti-reflective coating comprises applying to the microcircuit substrate a via coating for forming a via comprising a low-k patternable dielectric coating, exposing the via coating to a via pattern, developing the exposed via coating, curing the exposed and developed via coating to form a via film, applying a trench coating for forming a trench comprising a patternable low-k dielectric coating, exposing the trench coating to a trench pattern, developing the exposed and developed trench coating, followed by curing the trench coating to form a trench film; Curing one of the uncured coatings to form a film prevents it from inter-mixing with the other applied uncured coating. Articles of manufacture comprise products made by this process as well as dual-damascene integrated spun-on patterned low-k dielectrics, and single-damascene integrated spun-on patterned low-k dielectrics.

    Magnetic random access memory with permanent photo-patternable low-K dielectric

    公开(公告)号:US10573687B2

    公开(公告)日:2020-02-25

    申请号:US15798816

    申请日:2017-10-31

    发明人: Qinghuang Lin

    摘要: A method of forming a device that includes encapsulating a magnetic resistive access memory (MRAM) stack with a first patternable low-k dielectric material that is patterned by a exposure to produce a via pattern that extends to circuitry to logic devices. The via pattern is developed forming a via opening. The method further includes forming a second patternable low-k dielectric material over first patternable low-k dielectric material and filling the via opening. The second patternable low-k dielectric material is patterned by a light exposure to produce a first line pattern to the MRAM stack and a second line pattern to the via opening. The first line pattern and the second line pattern are developed to form trench openings. Thereafter, electrically conductive material is formed in the trench openings and the via opening.