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公开(公告)号：US20140124736A1
公开(公告)日：2014-05-08
申请号：US14150954
申请日：2014-01-09
IPC分类号： H01L29/775 , H01L29/06
CPC分类号： H01L29/775 , B82Y10/00 , H01L29/0669 , H01L29/0673 , H01L51/0003 , H01L51/0048 , H01L51/0545
摘要： Carbon nanotubes can be aligned with compatibility with semiconductor manufacturing processes, with scalability for forming smaller devices, and without performance degradation related to structural damages. A planar structure including a buried gate electrode and two embedded electrodes are formed. After forming a gate dielectric, carbon nanotubes are assembled in a solution on a surface of the gate dielectric along the direction of an alternating current (AC) electrical field generated by applying a voltage between the two embedded electrodes. A source contact electrode and a drain contact electrode are formed by depositing a conductive material on both ends of the carbon nanotubes. Each of the source and drain contact electrodes can be electrically shorted to an underlying embedded electrode to reduce parasitic capacitance.
摘要翻译： 碳纳米管可以与半导体制造工艺的兼容性相一致，具有用于形成较小器件的可扩展性，并且与结构损坏相关的性能下降不受影响。 形成包括掩埋栅电极和两个嵌入电极的平面结构。 在形成栅极电介质之后，沿着通过在两个嵌入电极之间施加电压而产生的交流（AC）电场的方向将碳纳米管组装在栅极电介质的表面上的溶液中。 源极接触电极和漏极接触电极通过在碳纳米管的两端上沉积导电材料而形成。 源极和漏极接触电极中的每一个可以与下面的嵌入式电极电短路以减小寄生电容。
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公开(公告)号：US08987705B2
公开(公告)日：2015-03-24
申请号：US14150954
申请日：2014-01-09
CPC分类号： H01L29/775 , B82Y10/00 , H01L29/0669 , H01L29/0673 , H01L51/0003 , H01L51/0048 , H01L51/0545
摘要： Carbon nanotubes can be aligned with compatibility with semiconductor manufacturing processes, with scalability for forming smaller devices, and without performance degradation related to structural damages. A planar structure including a buried gate electrode and two embedded electrodes are formed. After forming a gate dielectric, carbon nanotubes are assembled in a solution on a surface of the gate dielectric along the direction of an alternating current (AC) electrical field generated by applying a voltage between the two embedded electrodes. A source contact electrode and a drain contact electrode are formed by depositing a conductive material on both ends of the carbon nanotubes. Each of the source and drain contact electrodes can be electrically shorted to an underlying embedded electrode to reduce parasitic capacitance.
摘要翻译： 碳纳米管可以与半导体制造工艺的兼容性相一致，具有用于形成较小器件的可扩展性，并且与结构损坏相关的性能下降不受影响。 形成包括掩埋栅电极和两个嵌入电极的平面结构。 在形成栅极电介质之后，沿着通过在两个嵌入电极之间施加电压而产生的交流（AC）电场的方向将碳纳米管组装在栅极电介质的表面上的溶液中。 源极接触电极和漏极接触电极通过在碳纳米管的两端上沉积导电材料而形成。 源极和漏极接触电极中的每一个可以与下面的嵌入式电极电短路以减小寄生电容。
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公开(公告)号：US09412815B2
公开(公告)日：2016-08-09
申请号：US14496048
申请日：2014-09-25
申请人： International Business Machines Corporation , Taiwan Bluestone Technology Ltd. , Karlsruhe Institute of Technology
发明人： Phaedon Avouris , Christos Dimitrakopoulos , Damon B. Farmer , Mathias B. Steiner , Michael Engel , Ralph Krupke , Yu-Ming Lin
IPC分类号： H01L29/06 , B82Y40/00 , H01L21/02 , B82Y10/00 , H01L29/16 , H01L29/41 , H01L51/00 , H01L51/10 , H01L29/45 , H01L51/05
CPC分类号： H01L29/0669 , B82Y10/00 , B82Y40/00 , H01L21/02376 , H01L29/0673 , H01L29/1606 , H01L29/413 , H01L29/45 , H01L51/0048 , H01L51/0512 , H01L51/102 , Y10S977/742
摘要： A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
摘要翻译： 半导体器件包括具有至少一个电绝缘部分的衬底。 第一石墨烯电极形成在基板的表面上，使得电绝缘部分插入在基板的主体部分和第一石墨烯电极之间。 形成在基板表面上的第二个石墨烯电极。 基板的电绝缘部分插入在基板的主体部分和第二石墨烯电极之间。 第二石墨烯电极与第一石墨烯电极相对设置，以限定其间的暴露的基板区域。
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公开(公告)号：US09335471B2
公开(公告)日：2016-05-10
申请号：US14821179
申请日：2015-08-07
CPC分类号： G02B6/1226 , B82Y20/00 , G02B6/262 , G02B2006/12142 , G02B2006/12147 , G02F2203/10 , G02F2203/13 , G02F2203/50 , H04B10/802 , H04B10/90
摘要： A signal transfer link includes a first plasmonic coupler, and a second plasmonic coupler spaced apart from the first plasmonic coupler to form a gap. An insulator layer is formed over end portions of the first and second plasmonic couplers and in and over the gap. A plasmonic conductive layer is formed over the gap on the insulator layer to excite plasmons to provide signal transmission between the first and second plasmonic couplers.
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公开(公告)号：US08901689B1
公开(公告)日：2014-12-02
申请号：US13891940
申请日：2013-05-10
发明人： Phaedon Avouris , Tony A. Low , Fengnian Xia
IPC分类号： H01L27/14 , H01L31/028 , H01L31/0224 , H01L31/18
CPC分类号： H01L31/022408 , H01L31/0224 , H01L31/028 , H01L31/09 , H01L31/108 , Y02E10/547
摘要： A set of buried electrodes are embedded in a dielectric material layer, and a graphene layer having a doping of a first conductivity type are formed thereupon. A first upper electrode is formed over a center portion of each buried electrode. Second upper electrodes are formed in regions that do not overlie the buried electrodes. A bias voltage is applied to the set of buried electrodes to form a charged region including minority charge carriers over each of the buried electrodes, and to form a p-n junction around each portion of the graphene layer overlying a buried electrode. Charge carriers generated at the p-n junctions are collected by the first upper electrodes and the second upper electrodes, and are subsequently measured by a current measurement device or a voltage measurement device.
摘要翻译： 一组掩埋电极嵌入电介质材料层中，并在其上形成具有第一导电类型掺杂的石墨烯层。 在每个掩埋电极的中心部分上形成第一上电极。 第二上电极形成在不覆盖埋电极的区域中。 偏置电压施加到该掩埋电极组，以在每个掩埋电极上形成包括少数电荷载流子的带电区域，并且在覆盖埋置电极的石墨烯层的每个部分周围形成p-n结。 在p-n结处产生的电荷载体由第一上电极和第二上电极收集，随后由电流测量装置或电压测量装置测量。
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公开(公告)号：US20140291606A1
公开(公告)日：2014-10-02
申请号：US13852798
申请日：2013-03-28
申请人： International Business Machines Corporation , Taiwan Bluestone Technology LTD. , Karlsruhe Institute of Technology
发明人： Phaedon Avouris , Christos Dimitrakopoulos , Damon B. Farmer , Mathias B. Steiner , Michael Engel , Ralph Krupke , Yu-Ming Lin
CPC分类号： H01L29/0669 , B82Y10/00 , B82Y40/00 , H01L21/02376 , H01L29/0673 , H01L29/1606 , H01L29/413 , H01L29/45 , H01L51/0048 , H01L51/0512 , H01L51/102 , Y10S977/742
摘要： A semiconductor device includes a substrate having at least one electrically insulating portion. A first graphene electrode is formed on a surface of the substrate such that the electrically insulating portion is interposed between a bulk portion of the substrate and the first graphene electrode. A second graphene electrode formed on the surface of the substrate. The electrically insulating portion of the substrate is interposed between the bulk portion of the substrate and the second graphene electrode. The second graphene electrode is disposed opposite the first graphene electrode to define an exposed substrate area therebetween.
摘要翻译： 半导体器件包括具有至少一个电绝缘部分的衬底。 第一石墨烯电极形成在基板的表面上，使得电绝缘部分插入在基板的主体部分和第一石墨烯电极之间。 形成在基板表面上的第二个石墨烯电极。 基板的电绝缘部分插入在基板的主体部分和第二石墨烯电极之间。 第二石墨烯电极与第一石墨烯电极相对设置，以限定其间的暴露的基板区域。
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公开(公告)号：US20140255044A1
公开(公告)日：2014-09-11
申请号：US13969129
申请日：2013-08-16
IPC分类号： H04B10/80
CPC分类号： G02B6/1226 , B82Y20/00 , G02B6/262 , G02B2006/12142 , G02B2006/12147 , G02F2203/10 , G02F2203/13 , G02F2203/50 , H04B10/802 , H04B10/90
摘要： A signal transfer link includes a first plasmonic coupler, and a second plasmonic coupler spaced apart from the first plasmonic coupler to form a gap. An insulator layer is formed over end portions of the first and second plasmonic couplers and in and over the gap. A plasmonic conductive layer is formed over the gap on the insulator layer to excite plasmons to provide signal transmission between the first and second plasmonic couplers.
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公开(公告)号：US09772448B2
公开(公告)日：2017-09-26
申请号：US15087094
申请日：2016-03-31
CPC分类号： G02B6/1226 , B82Y20/00 , G02B6/262 , G02B2006/12142 , G02B2006/12147 , G02F2203/10 , G02F2203/13 , G02F2203/50 , H04B10/802 , H04B10/90
摘要： A signal transfer link includes a first plasmonic coupler, and a second plasmonic coupler spaced apart from the first plasmonic coupler to form a gap. A plasmonic conductive layer is formed over the gap to excite plasmons to provide signal transmission between the first and second plasmonic couplers.
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公开(公告)号：US20160341663A1
公开(公告)日：2016-11-24
申请号：US15225378
申请日：2016-08-01
发明人： Phaedon Avouris , Damon B. Farmer , Yelei Li , Hugen Yan
IPC分类号： G01N21/552 , H01L21/04 , H01L21/56 , H01L21/02
CPC分类号： G01N21/554 , H01L21/02422 , H01L21/02527 , H01L21/0277 , H01L21/041 , H01L21/042 , H01L21/31 , H01L21/31144 , H01L21/56 , H01L29/1606
摘要： Techniques for forming nanoribbon or bulk graphene-based SPR sensors are provided. In one aspect, a method of forming a graphene-based SPR sensor is provided which includes the steps of: depositing graphene onto a substrate, wherein the substrate comprises a dielectric layer on a conductive layer, and wherein the graphene is deposited onto the dielectric layer; and patterning the graphene into multiple, evenly spaced graphene strips, wherein each of the graphene strips has a width of from about 50 nanometers to about 5 micrometers, and ranges therebetween, and wherein the graphene strips are separated from one another by a distance of from about 5 nanometers to about 50 micrometers, and ranges therebetween. Alternatively, bulk graphene may be employed and the dielectric layer is used to form periodic regions of differing permittivity. A testing apparatus and method of analyzing a sample using the present SPR sensors are also provided.
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公开(公告)号：US20160341662A1
公开(公告)日：2016-11-24
申请号：US15225339
申请日：2016-08-01
发明人： Phaedon Avouris , Damon B. Farmer , Yilei Li , Hugen Yan
IPC分类号： G01N21/552 , H01L21/04 , H01L21/56 , H01L21/02
CPC分类号： G01N21/554 , H01L21/02422 , H01L21/02527 , H01L21/0277 , H01L21/041 , H01L21/042 , H01L21/31 , H01L21/31144 , H01L21/56 , H01L29/1606
摘要： Techniques for forming nanoribbon or bulk graphene-based SPR sensors are provided. In one aspect, a method of forming a graphene-based SPR sensor is provided which includes the steps of: depositing graphene onto a substrate, wherein the substrate comprises a dielectric layer on a conductive layer, and wherein the graphene is deposited onto the dielectric layer; and patterning the graphene into multiple, evenly spaced graphene strips, wherein each of the graphene strips has a width of from about 50 nanometers to about 5 micrometers, and ranges therebetween, and wherein the graphene strips are separated from one another by a distance of from about 5 nanometers to about 50 micrometers, and ranges therebetween. Alternatively, bulk graphene may be employed and the dielectric layer is used to form periodic regions of differing permittivity. A testing apparatus and method of analyzing a sample using the present SPR sensors are also provided.
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