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207 条记录 (耗时 0.038 秒)

    Clamp ring for shielding a substrate during film layer deposition
    6.
    发明授权
    Clamp ring for shielding a substrate during film layer deposition 失效
    用于在膜层沉积期间屏蔽衬底的夹环

    公开(公告)号：US5868847A

    公开(公告)日：1999-02-09

    申请号：US358161

    申请日：1994-12-16

    申请人： Aihua Chen ,  Zheng Xu ,  Howard Grunes ,  Avi Tepman ,  Igor Kogan

    发明人： Aihua Chen ,  Zheng Xu ,  Howard Grunes ,  Avi Tepman ,  Igor Kogan

    IPC分类号： C23C14/50 ,  C23C16/458 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205 ,  H01L21/687 ,  C23C16/00

    CPC分类号： H01L21/68721 ,  C23C14/50 ,  C23C16/4585

    摘要： A chamber for depositing a film layer on a substrate includes a support member on which the substrate is positioned for processing in the chamber, and a clamp ring suspended in the chamber on a chamber shield. The support member is positionable in the chamber to receive a substrate thereon, and further positionable to pass the substrate through the shield and thereby lift the clamp ring off the shield. After deposition is complete, the support member retracts through the shield, to reposition the clamp on the shield. In the event that a deposition material layer has formed between the substrate and the clamp ring, the clamp ring includes a plurality of actuators thereon which force the substrate out of the clamp ring as the clamp ring is repositioned on the shield.

    摘要翻译： 用于在衬底上沉积膜层的腔室包括支撑构件，衬底被定位在其上用于在腔室中进行处理，以及在室屏蔽罩上悬挂在腔室中的夹紧环。 支撑构件可定位在腔室中以在其上接收衬底，并且还可定位成使衬底穿过屏蔽件，从而将夹紧环提离屏蔽。 沉积完成后，支撑构件通过屏蔽件缩回，以将夹具重新定位在屏蔽上。 在衬底和夹紧环之间形成沉积材料层的情况下，夹紧环包括多个致动器，当钳位环重新定位在屏蔽上时，该致动器迫使衬底离开夹紧环。

    Filling narrow apertures and forming interconnects with a metal utilizing a crystallographically oriented liner layer
    7.
    发明授权
    Filling narrow apertures and forming interconnects with a metal utilizing a crystallographically oriented liner layer 失效
    填充狭窄的孔径并与金属形成互连，利用晶体取向的衬层

    公开(公告)号：US06217721B1

    公开(公告)日：2001-04-17

    申请号：US08628835

    申请日：1996-04-05

    申请人： Zheng Xu ,  John Forster ,  Tse-Yong Yao ,  Jaim Nulman ,  Fusen Chen

    发明人： Zheng Xu ,  John Forster ,  Tse-Yong Yao ,  Jaim Nulman ,  Fusen Chen

    IPC分类号： C23C1434

    CPC分类号： H01L21/2855 ,  C23C14/0036 ,  C23C14/046 ,  C23C14/0641 ,  C23C14/32 ,  C23C14/358 ,  H01J37/34 ,  H01J2237/32 ,  H01L21/28518 ,  H01L21/76846 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An aluminum sputtering process, particularly useful for filling vias and contacts of high aspect ratios formed through a dielectric layer and also usefull for forming interconnects that are highly resistant to electromigration. A liner or barrier layer is first deposited by a high-density plasma (HDP) physical vapor deposition (PVD, also called sputtering) process, such as is done with an inductively coupled plasma. If a contact is connected at its bottom to a silicon element, the first sublayer of the liner layer is a Ti layer, which is silicided to the silicon substrate. The second sublayer comprises TiN, which not only acts as a barrier against the migration of undesirable components into the underlying silicon but also when deposited with an HDP process and biased wafer forms a dense, smooth crystal structure. The third sublayer comprises Ti and preferably is graded from TiN to Ti. Over the liner layer, an aluminum layer is deposited in a standard, non-HDP process. The liner layer allows the hottest part of the aluminum deposition to be performed at a relatively low temperature between 320 and 500° C., preferably between 350 and 420° C., while still filling narrow plug holes, and the TiN does not need to be annealed to form an effective barrier against diffusion into the silicon. A horizontal interconnect formed by the inventive process is resistant to electromigration.

    摘要翻译： 铝溅射工艺，特别适用于填充通过电介质层形成的高纵横比的通孔和触点，并且也可用于形成高度抵抗电迁移的互连。 衬垫或阻挡层首先通过高密度等离子体（HDP）物理气相沉积（PVD，也称为溅射）工艺沉积，例如用电感耦合等离子体进行。 如果接触件的底部连接到硅元件，衬垫层的第一子层是Ti层，硅层被硅化到硅衬底。 第二子层包括TiN，其不仅用作防止不期望的组分迁移到下面的硅中的阻挡层，而且当用HDP工艺沉积并且偏置的晶片形成致密的，平滑的晶体结构时。 第三子层包含Ti，优选从TiN到Ti分级。 在衬里层上，铝层以标准的非HDP工艺沉积。 衬垫层允许铝沉积的最热部分在320和500℃之间的较低温度下进行，优选在350和420℃之间，同时仍然填充窄的塞孔，并且TiN不需要 进行退火以形成抵抗硅中扩散的有效屏障。 由本发明方法形成的水平互连对于电迁移是耐受的。