公开(公告)号：US07035072B2

公开(公告)日：2006-04-25

申请号：US10192314

申请日：2002-07-10

Applicant: James A. Colby

Inventor： James A. Colby

IPC: H01C7/10 ,  H01C7/12 ,  H01C7/13 ,  H02H1/04

CPC classification number: H05K9/0066 ,  H01R13/6485 ,  H01R13/6666 ,  H02H9/04 ,  H04M3/18 ,  H05K1/0259 ,  H05K1/0393 ,  H05K1/162 ,  H05K1/167 ,  H05K1/18 ,  H05K2201/0738 ,  H05K2201/10015 ,  H05K2201/10022

Abstract: The present invention provides an ESD apparatus that includes an electrical overstress suppression device in series with a capacitor. The ESD apparatus is ideally suited for use with network communication devices, but any electronic device requiring overvoltage protection and isolation may employ the ESD apparatus of the present invention. In one embodiment, the ESD apparatus includes a capacitor and an electrical overstress protection device that electrically communicates in series with the capacitor. In another embodiment, the ESD apparatus includes an electrical overstress protection device having a voltage variable material and a capacitor that electrically communicates in series with the overstress protection device. The capacitor is sized so that the overstress device can withstand an application of a predetermined steady state voltage.

公开(公告)号：US20090027821A1

公开(公告)日：2009-01-29

申请号：US11828844

申请日：2007-07-26

Applicant: James A. Colby ,  Stephen Whitney ,  Du Yaosheng

Inventor： James A. Colby ,  Stephen Whitney ,  Du Yaosheng

IPC: H02H5/04

CPC classification number: H02H5/048 ,  H01C7/02 ,  H01H85/0418 ,  H01H85/046 ,  H01H85/048 ,  H01H2085/0414 ,  H01H2085/0483 ,  H03K17/687 ,  H03K17/72 ,  H03K17/74

Abstract: A circuit protection device includes a fuse element placed in parallel with a PTC thermistor layer. The element and PTC thermistor layer are provided on one or more insulating substrate, such as an FR-4 or polyimide substrate. First and second conductors connect the fuse element and PTC thermistor layer electrically in parallel, such that current (i) initially under normal flows mainly through the fuse element and PTC thermistor layer at a lower drop in voltage and (ii) after an opening of the fuse element flows under normal operation through the PTC thermistor layer at a higher drop in voltage.

Abstract translation: 电路保护装置包括与PTC热敏电阻层并联放置的熔丝元件。 元件和PTC热敏电阻层设置在一个或多个绝缘基板上，例如FR-4或聚酰亚胺基板。 第一和第二导体并联电连接熔丝元件和PTC热敏电阻层，使得最初正常流动的电流（i）主要通过熔断元件和PTC热敏电阻层以较低的电压下降，以及（ii）在打开 熔断元件在正常工作下通过PTC热敏电阻层以较高的电压下降流动。

公开(公告)号：US07183891B2

公开(公告)日：2007-02-27

申请号：US10958442

申请日：2004-10-05

Applicant: Edwin James Harris ,  Tushar Vyas ,  Timothy Pachla ,  James A. Colby

Inventor： Edwin James Harris ,  Tushar Vyas ,  Timothy Pachla ,  James A. Colby

IPC: H01C7/10

CPC classification number: H01C7/12 ,  H01G2/14 ,  H02H9/044 ,  H05K1/0257 ,  H05K1/0259 ,  H05K1/0298 ,  H05K1/0393 ,  H05K1/167 ,  H05K3/28 ,  H05K2201/0738 ,  H05K2201/09763

Abstract: A voltage variable material (“VVM”) including an insulative binder that is formulated to intrinsically adhere to conductive and non-conductive surfaces is provided. The binder and thus the VVM is self-curable and applicable in a spreadable form that dries before use. The binder eliminates the need to place the VVM in a separate device or to provide separate printed circuit board pads on which to electrically connect the VVM. The binder and thus the VVM can be directly applied to many different types of substrates, such as a rigid FR-4 laminate, a polyimide, a polymer or a multilayer PCB via a process such as screen or stencil printing. In one embodiment, the VVM includes two types of conductive particles, one with a core and one without a core. The VVM can also have core-shell type semiconductive particles.

Abstract translation: 提供了包括被配制为固有地粘附到导电和非导电表面的绝缘粘合剂的电压可变材料（“VVM”）。 粘合剂，因此VVM是可自我修复的，并且可以在使用前干燥的可涂抹形式使用。 粘合剂消除了将VVM放置在单独的装置中的需要，或者提供用于电连接VVM的单独的印刷电路板焊盘。 粘合剂和因此的VVM可以通过诸如筛网或模版印刷的工艺直接应用于许多不同类型的基材，例如刚性FR-4层压板，聚酰亚胺，聚合物或多层PCB。 在一个实施例中，VVM包括两种类型的导电颗粒，一种具有芯和一个不具有芯。 VVM还可以具有核 - 壳型半导体颗粒。