公开(公告)号：US5959883A

公开(公告)日：1999-09-28

申请号：US4798

申请日：1998-01-09

申请人： James Brennan, Jr. ,  Anthony Dunne ,  Peter Holzmann ,  Geoff Jackson ,  Albert Kordesch ,  Chun-Mai Liu ,  Kung-Yen Su ,  Hieu Van Tran

发明人： James Brennan, Jr. ,  Anthony Dunne ,  Peter Holzmann ,  Geoff Jackson ,  Albert Kordesch ,  Chun-Mai Liu ,  Kung-Yen Su ,  Hieu Van Tran

IPC分类号： G11C16/02 ,  G11C11/56 ,  G11C16/10 ,  G11C27/00 ,  G11C11/34

CPC分类号： G11C16/10 ,  G11C11/5621 ,  G11C11/5628 ,  G11C27/005 ,  G11C16/30 ,  G11C2207/16 ,  G11C2211/5623

摘要： An analog recording and playback system using non-volatile flash memory. An array of flash memory cells is used to store an analog signal and retrieve the stored analog signal on a real-time basis. A plurality of column driver circuits are coupled to the columns of flash memory cells for simultaneous programming and reading. A programming algorithm is used to write the analog signal within an operating range of the flash memory cells since the operating range may shift due to process variations. The system includes trimbit circuits to provide a trimmable initial programming voltage, programming step, programming current, read current, and select gate voltage. The system further includes a Serial Peripheral Interface ("SPI") that interfaces with a host microcontroller. The host microcontroller can send a number of commands to the system through the SPI for efficient message management. These commands include the basic commands to record or playback and various addressing and message cueing options. The system utilizes row and column redundancy to increase production yield.

摘要翻译： 使用非易失性闪存的模拟录音和播放系统。 闪存单元阵列用于存储模拟信号，并实时检索存储的模拟信号。 多个列驱动器电路耦合到闪存单元的列，用于同时编程和读取。 使用编程算法将模拟信号写入闪存单元的工作范围内，因为工作范围可能由于工艺变化而偏移。 该系统包括三角电路，以提供可调整的初始编程电压，编程步骤，编程电流，读取电流和选择栅极电压。 该系统还包括与主机微控制器连接的串行外设接口（“SPI”）。 主机微控制器可以通过SPI向系统发送多个命令，以实现高效的消息管理。 这些命令包括记录或回放的基本命令以及各种寻址和消息提示选项。 该系统利用行和列冗余来提高产量。

公开(公告)号：US5995413A

公开(公告)日：1999-11-30

申请号：US245119

申请日：1999-02-04

申请人： Peter Holzmann ,  James Brennan, Jr. ,  Anthony Dunne ,  Hieu Van Tran

发明人： Peter Holzmann ,  James Brennan, Jr. ,  Anthony Dunne ,  Hieu Van Tran

IPC分类号： G11C16/06 ,  G11C29/00 ,  G11C29/04

CPC分类号： G11C29/789

摘要： A trimbit circuit for flash memory integrated circuits is described. The trimbit circuit is used to store the addresses of bad rows and/or columns in flash memory arrays. Furthermore the trimbit circuit is used to store the trimbits for trimable circuits in the integrated circuit, i.e. voltage references, precision oscillator, etc. The invention includes a row of flash memory trimcells and a trimcell differential amplifier circuit. The trimcell differential amplifier circuit can serially shift in trimbits into a latch and serially shift out trimbits without having to program the flash memory trimcells. The final settings of the trimbits can be programmed by means of a high voltage buffer. A non-overlapping clock generator and additional logic is also included to control the circuit.

公开(公告)号：US5933370A

公开(公告)日：1999-08-03

申请号：US5074

申请日：1998-01-09

申请人： Peter Holzmann ,  James Brennan, Jr. ,  Anthony Dunne ,  Hieu Van Tran

发明人： Peter Holzmann ,  James Brennan, Jr. ,  Anthony Dunne ,  Hieu Van Tran

IPC分类号： G11C16/06 ,  G11C29/00 ,  G11C29/04 ,  G11C16/04

CPC分类号： G11C29/789

摘要： A trimbit circuit for flash memory integrated circuits is described. The trimbit circuit is used to store the addresses of bad rows and/or columns in flash memory arrays. Furthermore the trimbit circuit is used to store the trimbits for trimable circuits in the integrated circuit, i.e. voltage references, precision oscillator, etc. The invention includes a row of flash memory trimcells and a trimcell differential amplifier circuit. The trimcell differential amplifier circuit can serially shift in trimbits into a latch and serially shift out trimbits without having to program the flash memory trimcells. The final settings of the trimbits can be programmed by means of a high voltage buffer. A non-overlapping clock generator and additional logic is also included to control the circuit.

摘要翻译： 描述了闪存集成电路的三段电路。 trimbit电路用于存储闪存阵列中不良行和/或列的地址。 此外，trimbit电路用于存储集成电路中的可修整电路的三角形，即电压基准，精密振荡器等。本发明包括一排闪存微调单元和微调单元差分放大器电路。 微调单元差分放大器电路可以将三位组串行移位到锁存器中，并且串行地移出三位符，而不必对闪存微调单元进行编程。 可以通过高电压缓冲区对三角形的最终设置进行编程。 还包括不重叠的时钟发生器和附加逻辑来控制电路。

公开(公告)号：US20060006989A1

公开(公告)日：2006-01-12

申请号：US10535356

申请日：2003-11-28

申请人： Peter Holzmann

发明人： Peter Holzmann

IPC分类号： B60Q1/00

CPC分类号： B60Q9/003 ,  E04H6/426

摘要： The device (A) is for warning at physical contact of a vehicle with an object in its surrounding and protection of the vehicle at such a contact. The device has a detecting unit (1) and a warning unit (2), where the detecting unit (1) is adapted to be attached to a surface (B) and detect a contact of a vehicle with the detecting unit (1), and where the warning unit (2) is adapted to warn a driver of the vehicle of the detection. The detecting unit (1) consists of a force absorbing plate (11), and an inside the plate (11) acting contact devise (12). A first side (11a) of the plate (11) is adapted to be attached to the surface (B). The plate (11) is given an elasticity adapted to absorb part of the forces that can occur at a contact of a vehicle. The contact device (12) is adapted to close an electric circuit (13) at the contact, and the warning unit (2) is adapted to emit a visual signal and/or an acoustic signal when the electric circuit (13) is closed.

摘要翻译： 装置（A）用于警告车辆与其周围的物体的物理接触，并且在这种接触下保护车辆。 该装置具有检测单元（1）和警告单元（2），其中检测单元（1）适于附接到表面（B）并检测车辆与检测单元（1）的接触， 并且其中所述警告单元（2）适于向所述车辆的驾驶员警告所述检测。 检测单元（1）由力吸收板（11）和板（11）作用接触设备（12）的内部组成。 板（11）的第一侧（11a）适于附接到表面（B）。 板（11）被赋予适于吸收可能在车辆接触处发生的一部分力的弹性。 接触装置（12）适于在触点处闭合电路（13），并且当电路（13）闭合时，警告单元（2）适于发出视觉信号和/或声音信号。

公开(公告)号：US08150026B2

公开(公告)日：2012-04-03

申请号：US11764188

申请日：2007-06-16

申请人： Peter Holzmann

发明人： Peter Holzmann

IPC分类号： H04M1/00

CPC分类号： H04M19/005

摘要： A subscriber line interface circuit apparatus includes a linefeed circuit and a subscriber line control circuit (SLCC). In an embodiment, the linefeed circuit includes a signal conversion circuit which provides a differential mode signal and a common mode signal in response to at least a tip signal and a ring signal from the subscriber loop. The linefeed circuit includes a tip control circuit and a ring control circuit. In an embodiment, the SLCC is provided in a single integrated circuit chip and is coupled to the linefeed circuit which isolates the SLCC from the tip or ring signals. The SLCC includes a first and a second differential mode inputs for receiving the differential mode signal, and a common-mode input for receiving the common-mode signal. In an embodiment, the SLCC also provides various tip control signals and ring control signals to the tip control circuit and the ring control circuit, respectively.

摘要翻译： 用户线路接口电路装置包括线路馈送电路和用户线路控制电路（SLCC）。 在一个实施例中，换行电路包括信号转换电路，其响应于来自用户回路的至少尖端信号和振铃信号提供差模信号和共模信号。 换行电路包括尖端控制电路和环形控制电路。 在一个实施例中，SLCC设置在单个集成电路芯片中，并且耦合到线路馈送电路，其将SLCC与尖端或环形信号隔离。 SLCC包括用于接收差分模式信号的第一和第二差分模式输入，以及用于接收共模信号的共模输入。 在一个实施例中，SLCC还分别向尖端控制电路和环控制电路提供各种尖端控制信号和振铃控制信号。

公开(公告)号：US07197299B2

公开(公告)日：2007-03-27

申请号：US10752630

申请日：2004-01-07

申请人： Geoffrey B. Jackson ,  Saleel V. Awsare ,  Lawrence D. Engh ,  Peter Holzmann ,  Oliver C. Kao ,  Carl R. Palmer ,  Aditya Raina

发明人： Geoffrey B. Jackson ,  Saleel V. Awsare ,  Lawrence D. Engh ,  Peter Holzmann ,  Oliver C. Kao ,  Carl R. Palmer ,  Aditya Raina

IPC分类号： H04Q7/22 ,  H04B1/28

CPC分类号： H04M1/725 ,  G11C27/005 ,  H04M1/6041 ,  H04M1/6505

摘要： A multilevel analog recording and playback system is described. The analog recording and playback system provides a variety of analog processing functions to enhance system level integration. The analog recording and playback system is an fully configurable integrated device that includes a plurality of signal paths, a microphone automatic gain control (“AGC”) circuit, volume control and filtering circuit, speaker driver circuit, gain selectable analog input, auxiliary input and output paths, configurable summation amplifiers having mixing features, multilevel analog memory storage array, and user selectable programming duration.

摘要翻译： 描述了多级模拟录音和播放系统。 模拟录音和回放系统提供了各种模拟处理功能，以增强系统级集成度。 模拟录音和回放系统是一个完全可配置的集成设备，包括多个信号路径，麦克风自动增益控制（“AGC”）电路，音量控制和滤波电路，扬声器驱动电路，增益可选模拟输入，辅助输入和 输出路径，具有混合特征的可配置求和放大器，多级模拟存储器存储阵列和用户可选择的编程持续时间。

公开(公告)号：US08335328B2

公开(公告)日：2012-12-18

申请号：US11923564

申请日：2007-10-24

申请人： Peter Holzmann

发明人： Peter Holzmann

IPC分类号： H04R3/00

CPC分类号： H04R3/02 ,  H04R19/016

摘要： An integrated circuit for providing programmable microphone interface includes an input terminal for receiving an input signal and an output terminal for providing an output audio signal. The integrated circuit includes a bias circuit, an amplifier circuit, and two feedback circuits. The bias circuit provides a microphone bias signal to the microphone and provides a sensed microphone signal. The amplifier circuit includes a first input, a second input, and an output. The first input is configured to receive the sensed microphone signal, a first feedback signal, and a second feedback signal. The second input is configured to receive a first reference signal. The feedback circuits are in communication with the output and the first input of the amplifier circuit. In a specific embodiment, the first feedback circuit includes an RC circuit and the second feedback circuit includes an integrator.

摘要翻译： 用于提供可编程麦克风接口的集成电路包括用于接收输入信号的输入端和用于提供输出音频信号的输出端。 集成电路包括偏置电路，放大器电路和两个反馈电路。 偏置电路向麦克风提供麦克风偏置信号，并提供感测到的麦克风信号。 放大器电路包括第一输入，第二输入和输出。 第一输入被配置为接收感测到的麦克风信号，第一反馈信号和第二反馈信号。 第二输入被配置为接收第一参考信号。 反馈电路与放大器电路的输出和第一输入端通信。 在具体实施例中，第一反馈电路包括RC电路，第二反馈电路包括积分器。

公开(公告)号：US07760007B2

公开(公告)日：2010-07-20

申请号：US12333236

申请日：2008-12-11

申请人： Peter Holzmann

发明人： Peter Holzmann

IPC分类号： H03K17/687

CPC分类号： H03K17/063 ,  H03K17/302 ,  H03K2217/0018

摘要： A CMOS analog switch circuit includes an NMOS switch transistor, a PMOS switch transistor, and a bias circuit. In an embodiment, the bias circuit includes a first and a second native bias transistors having their gate terminals coupled to a first and a second terminals of the CMOS switch circuit, respectively. The source terminals of the first and the second native bias transistors are coupled together and are also coupled to the body terminal of the PMOS switch transistor. In an configuration, the first and the second native bias transistors are characterized by substantially 0V threshold voltages, and the PMOS switch transistor is configured to exhibit a lower on-resistance in response to the greater of the voltages of the first terminal and the second terminal of the CMOS analog switch circuit.

摘要翻译： CMOS模拟开关电路包括NMOS开关晶体管，PMOS开关晶体管和偏置电路。 在一个实施例中，偏置电路包括分别与CMOS开关电路的第一和第二端子耦合的第一和第二天然偏置晶体管。 第一和第二天体偏置晶体管的源极端子耦合在一起，并且还耦合到PMOS开关晶体管的主体端子。 在一种配置中，第一和第二天体偏置晶体管的特征在于基本上为0V阈值电压，并且PMOS开关晶体管被配置为响应于第一端子和第二端子的较大电压而呈现较低的导通电阻 的CMOS模拟开关电路。

公开(公告)号：US06865186B1

公开(公告)日：2005-03-08

申请号：US09501699

申请日：2000-02-10

申请人： Geoffrey B. Jackson ,  Saleel V. Awsare ,  Ming-Bing Chang ,  Peter Holzmann ,  Oliver Chihkuang Kao ,  Hung-Chuan Pai ,  Carl R. Palmer ,  Aditya Raina

发明人： Geoffrey B. Jackson ,  Saleel V. Awsare ,  Ming-Bing Chang ,  Peter Holzmann ,  Oliver Chihkuang Kao ,  Hung-Chuan Pai ,  Carl R. Palmer ,  Aditya Raina

IPC分类号： G06F12/00 ,  G11C7/16 ,  G11C11/56 ,  G11C27/00 ,  H04L12/28

CPC分类号： G11C27/005 ,  G11C7/16 ,  G11C11/5621 ,  G11C2207/16

摘要： A multilevel analog recording and playback system is described. An analog processing circuit processes analog data. A storage circuit includes a non-volatile memory array, a switching circuit, and a communication interface. The non-volatile memory array stores analog and digital data. The switching circuit transfers the analog and digital data to and from the memory array. The communication interface allows a processor to exchange information with the device.

摘要翻译： 描述了多级模拟录音和播放系统。 模拟处理电路处理模拟数据。 存储电路包括非易失性存储器阵列，开关电路和通信接口。 非易失性存储器阵列存储模拟和数字数据。 开关电路将模拟和数字数据传送到存储器阵列和从存储器阵列传送。 通信接口允许处理器与设备交换信息。

公开(公告)号：US08254598B2

公开(公告)日：2012-08-28

申请号：US11761957

申请日：2007-06-12

申请人： Peter Holzmann

发明人： Peter Holzmann

IPC分类号： H04R3/00

CPC分类号： H04R3/00 ,  H04R19/016

摘要： An integrated circuit for providing programmable microphone interface includes an input terminal for receiving an input signal and an output terminal for providing an output audio signal. In an embodiment, the integrated circuit includes a bias circuit, an amplifier circuit and two feedback circuits. The amplifier circuit includes a first input, a second input, and an output. The first input receives either the input signal or a feedback signal, depending upon mode control signals. The second input receives either the feedback signal or the input signal depending upon the mode control signals. The first feedback circuit is in communication with the output and the first input of the amplifier and includes a first resistor and a first capacitor connected in parallel. The second feedback circuit includes an integrator circuit and provides the feedback signal. The mode control signals can be set in a programmable mode control register.

摘要翻译： 用于提供可编程麦克风接口的集成电路包括用于接收输入信号的输入端和用于提供输出音频信号的输出端。 在一个实施例中，集成电路包括偏置电路，放大器电路和两个反馈电路。 放大器电路包括第一输入，第二输入和输出。 根据模式控制信号，第一输入接收输入信号或反馈信号。 根据模式控制信号，第二输入接收反馈信号或输入信号。 第一反馈电路与放大器的输出和第一输入端通信，并且包括并联连接的第一电阻器和第一电容器。 第二反馈电路包括积分器电路并提供反馈信号。 模式控制信号可以在可编程模式控制寄存器中设置。