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    COMPONENT RELIABILITY BUDGETING SYSTEM
    4.
    发明申请
    COMPONENT RELIABILITY BUDGETING SYSTEM 有权
    组件可靠性预算系统

    公开(公告)号：US20100145895A1

    公开(公告)日：2010-06-10

    申请号：US12704789

    申请日：2010-02-12

    申请人： Siva G. Narendra ,  James W. Tschanz ,  Vivek K. De ,  Stephen H. Tang

    发明人： Siva G. Narendra ,  James W. Tschanz ,  Vivek K. De ,  Stephen H. Tang

    IPC分类号： G06F15/18 ,  G06F1/28 ,  G06F1/32 ,  G06N5/02

    CPC分类号： G06F1/206 ,  Y02D10/16

    摘要： A system may include acquisition of a supply voltage information representing past supply voltages supplied to an electrical component, acquisition of a temperature information representing past temperatures of the electrical component, and control of a performance characteristic of the electrical component based on the supply voltage information and the temperature information. Some embodiments may further include determination of a reliability margin based on the supply voltage information, the temperature information, and on a reliability specification of the electrical component, and change of the performance characteristic based on the reliability margin.

    摘要翻译： 系统可以包括获取表示提供给电气部件的过去电源电压的电源电压信息，基于电源电压信息获取表示电气部件的过去温度的温度信息和电气部件的性能特性的控制，以及 温度信息。 一些实施例还可以包括基于电源电压信息，温度信息以及电气部件的可靠性规格以及基于可靠性裕度的性能特性的改变来确定可靠性裕度。

    System using body-biased sleep transistors to reduce leakage power while minimizing performance penalties and noise
    7.
    发明授权
    System using body-biased sleep transistors to reduce leakage power while minimizing performance penalties and noise 有权
    系统使用身体偏置的睡眠晶体管来减少泄漏功率，同时最大限度地降低性能损失和噪音

    公开(公告)号：US06744301B1

    公开(公告)日：2004-06-01

    申请号：US09707528

    申请日：2000-11-07

    申请人： James W. Tschanz ,  Yibin Ye ,  Siva G. Narendra ,  Vivek K. De

    发明人： James W. Tschanz ,  Yibin Ye ,  Siva G. Narendra ,  Vivek K. De

    IPC分类号： G05F302

    CPC分类号： G05F3/205

    摘要： A system and method to reduce leakage power while minimizing performance penalties and noise is disclosed. In accordance with one embodiment of the invention, the system includes at least one sleep transistor operatively coupleable between a system power supply and at least one circuit powered by the system power supply to control the application of power to the circuit. The sleep transistor is also operatively coupleable to receive a sleep control signal to turn the sleep transistor on and off. A body bias voltage generator is operatively coupleable to a body of the at least one sleep transistor to substantially reduce leakage current when the sleep transistor is non-operational or idle and to improve the operational characteristics of the sleep transistor when the transistor is operational by reducing the performance penalty of the sleep transistor and by reducing impact of noise on the circuit and other devices.

    摘要翻译： 公开了一种降低泄漏功率同时最小化性能损失和噪声的系统和方法。 根据本发明的一个实施例，该系统包括至少一个休眠晶体管，其可操作地耦合在系统电源和由系统电源供电的至少一个电路之间，以控制对电路的功率的施加。 休眠晶体管也可操作地耦合以接收睡眠控制信号以打开和关闭睡眠晶体管。 身体偏置电压发生器可操作地耦合到至少一个睡眠晶体管的主体，以在休眠晶体管不可操作或空闲时基本上减少泄漏电流，并且当晶体管通过降低工作时改善睡眠晶体管的操作特性 休眠晶体管的性能损失，并减少噪声对电路和其他器件的影响。

    Bias generator for body bias
    8.
    发明授权
    Bias generator for body bias 有权
    偏置发生器用于身体偏倚

    公开(公告)号：US07164307B2

    公开(公告)日：2007-01-16

    申请号：US11038134

    申请日：2005-01-21

    申请人： James W. Tschanz ,  Stephen H. Tang ,  Victor Zia ,  Badarinath Kommandur ,  Siva G. Narendra ,  Vivek K. De

    发明人： James W. Tschanz ,  Stephen H. Tang ,  Victor Zia ,  Badarinath Kommandur ,  Siva G. Narendra ,  Vivek K. De

    IPC分类号： G05F1/10

    CPC分类号： G05F3/205

    摘要： A bias generator unit is provided that includes a central bias generator to provide a bias voltage, a local bias generator to receive the bias voltage and a reference voltage and to provide a forward body bias signal or a reverse body bias signal. The bias generator may include a charge pump to output (or provide) a reference voltage to a reference generator, which in turn provides reference signals to the central bias generator. As a result, the local bias generator may control the body bias signal provided by the local bias generator.

    摘要翻译： 提供偏置发生器单元，其包括中心偏置发生器以提供偏置电压，局部偏置发生器以接收偏置电压和参考电压，并提供正向偏置信号或反向偏置信号。 偏置发生器可以包括电荷泵以将参考电压输出（或提供）到参考发生器，基准电压器又向中心偏置发生器提供参考信号。 结果，本地偏置发生器可以控制由局部偏置发生器提供的体偏置信号。

    Flip-flop circuit having dual-edge triggered pulse generator
    10.
    发明授权
    Flip-flop circuit having dual-edge triggered pulse generator 有权
    具有双边缘触发脉冲发生器的触发电路

    公开(公告)号：US06608513B2

    公开(公告)日：2003-08-19

    申请号：US09820579

    申请日：2001-03-28

    申请人： James W. Tschanz ,  Siva G. Narendra ,  Vivek K. De

    发明人： James W. Tschanz ,  Siva G. Narendra ,  Vivek K. De

    IPC分类号： H03K312

    CPC分类号： H03K3/356156 ,  H03K3/012 ,  H03K3/037

    摘要： A pulse generator system includes a plurality of buffers at least two transmission gates. The inverters successively and input insert delays into an signal having a series of pulses, each pulse having first and second edges. The transmission gates are operatively coupled to the inverters. The first transmission gate selectively passes the input signal. The second transmission gape selectively passes inverted signal of the input signal.

    摘要翻译： 脉冲发生器系统包括多个缓冲器，至少两个传输门。 反相器依次输入插入延迟到具有一系列脉冲的信号，每个脉冲具有第一和第二边缘。 传输门可操作地耦合到逆变器。 第一传输门选择性地传递输入信号。 第二传输gape选择性地通过输入信号的反相信号。