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公开(公告)号：US20060063369A1
公开(公告)日：2006-03-23
申请号：US10943624
申请日：2004-09-17
申请人： JengPing Lu , Jackson Ho , Chinwen Shih , Michael Chabinyc , William Wong
发明人： JengPing Lu , Jackson Ho , Chinwen Shih , Michael Chabinyc , William Wong
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L21/76838 , B82Y30/00 , H01L21/28506 , H01L27/124
摘要： Controlled overetching is utilized to produce metal patterns having gaps that are smaller than the resolution limits of the feature patterning (e.g., photolithography) process utilized to produce the metal patterns. A first metal layer is formed and masked, and exposed regions are etched away. The etching process is allowed to continue in a controlled manner to produced a desired amount of over-etching (i.e., undercutting the mask) such that an edge of the first metal layer is offset from an edge of the mask by a predetermined gap distance. A second metal layer is then deposited such that an edge of the second metal layer is spaced from the first metal layer by the predetermined gap distance. The metal gap is used to define, for example, transistor channel lengths, thereby facilitating the production of transistors having channel lengths defined by etching process control that are smaller than the process resolution limits.
摘要翻译： 控制过蚀刻用于产生具有小于用于产生金属图案的特征图案化（例如，光刻）工艺的分辨率限制的间隙的金属图案。 第一金属层被形成并被掩蔽，并且暴露的区域被蚀刻掉。 允许蚀刻处理以受控的方式继续，以产生期望量的过蚀刻（即，底切掩模），使得第一金属层的边缘以预定的间隙距离偏离掩模的边缘。 然后沉积第二金属层，使得第二金属层的边缘与第一金属层隔开预定的间隙距离。 金属间隙用于限定例如晶体管沟道长度，由此有助于生产具有小于工艺分辨率极限的蚀刻工艺控制定义的沟道长度的晶体管。
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公开(公告)号：US06658728B2
公开(公告)日：2003-12-09
申请号：US09917572
申请日：2001-07-27
IPC分类号： H05K330
CPC分类号： G01R1/06716 , B81B2203/0118 , B81C1/00484 , B81C2201/0136 , B81C2203/058 , G01R1/06727 , G01R1/07342 , G01R3/00 , H01L23/49811 , H01L2924/0002 , H01R4/48 , H01R12/57 , H05K3/4092 , Y10T29/4913 , Y10T29/49135 , Y10T29/4914 , H01L2924/00
摘要： Efficient methods for lithographically fabricating spring structures onto a substrate containing contact pads or metal vias by forming both the spring metal and release material layers using a single mask. Specifically, a pad of release material is self-aligned to the spring metal finger using a photoresist mask or a plated metal pattern, or using lift-off processing techniques. A release mask is then used to release the spring metal finger while retaining a portion of the release material that secures the anchor portion of the spring metal finger to the substrate. When the release material is electrically conductive (e.g., titanium), this release material portion is positioned directly over the contact pad or metal via, and acts as a conduit to the spring metal finger in the completed spring structure. When the release material is non-conductive, a metal strap is formed to connect the spring metal finger to the contact pad/via.
摘要翻译： 通过使用单个掩模通过形成弹簧金属和释放材料层来将含有接触垫或金属通孔的弹性结构光刻制造到衬底上的有效方法。 具体地说，使用光致抗蚀剂掩模或电镀金属图案或使用剥离处理技术，释放材料垫与弹簧金属手指自对准。 然后使用释放掩模释放弹簧金属指，同时保持将弹簧金属指的锚固部分固定到基底的释放材料的一部分。 当释放材料是导电的（例如钛）时，该释放材料部分直接位于接触垫或金属通孔上方，并且用作在完成的弹簧结构中的弹簧金属指的导管。 当释放材料不导电时，形成金属带以将弹簧金属手指连接到接触垫/通孔。
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公开(公告)号：US06361331B1
公开(公告)日：2002-03-26
申请号：US09923600
申请日：2001-08-06
IPC分类号： H01R909
摘要： Efficient methods for lithographically fabricating spring structures onto a substrate containing contact pads or metal vias by forming both the spring metal and release material layers using a single mask. Specifically, a pad of release material is self-aligned to the spring metal finger using a photoresist mask or a plated metal pattern, or using lift-off processing techniques. A release mask is then used to release the spring metal finger while retaining a portion of the release material that secures the anchor portion of the spring metal finger to the substrate. When the release material is electrically conductive (e.g., titanium), this release material portion is positioned directly over the contact pad or metal via, and acts as a conduit to the spring metal finger in the completed spring structure. When the release material is non-conductive, a metal strap is formed to connect the spring metal finger to the contact pad or metal via, and also to further anchor the spring metal finger to the substrate.
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公开(公告)号：US06290510B1
公开(公告)日：2001-09-18
申请号：US09626936
申请日：2000-07-27
IPC分类号： H01R909
CPC分类号： G01R1/06716 , B81B2203/0118 , B81C1/00484 , B81C2201/0136 , B81C2203/058 , G01R1/06727 , G01R1/07342 , G01R3/00 , H01L23/49811 , H01L2924/0002 , H01R4/48 , H01R12/57 , H05K3/4092 , Y10T29/4913 , Y10T29/49135 , Y10T29/4914 , H01L2924/00
摘要： Efficient methods for lithographically fabricating spring structures onto a substrate containing contact pads or metal vias by forming both the spring metal and release material layers using a single mask. Specifically, a pad of release material is self-aligned to the spring metal finger using a photoresist mask or a plated metal pattern, or using lift-off processing techniques. A release mask is then used to release the spring metal finger while retaining a portion of the release material that secures the anchor portion of the spring metal finger to the substrate. When the release material is electrically conductive (e.g., titanium), this release material portion is positioned directly over the contact pad or metal via, and acts as a conduit to the spring metal finger in the completed spring structure. When the release material is non-conductive, a metal strap is formed to connect the spring metal finger to the contact pad or metal via, and also to further anchor the spring metal finger to the substrate.
摘要翻译： 通过使用单个掩模通过形成弹簧金属和释放材料层来将含有接触垫或金属通孔的弹性结构光刻制造到衬底上的有效方法。 具体地说，使用光致抗蚀剂掩模或电镀金属图案或使用剥离处理技术，释放材料垫与弹簧金属手指自对准。 然后使用释放掩模释放弹簧金属指，同时保持将弹簧金属指的锚固部分固定到基底的释放材料的一部分。 当释放材料是导电的（例如钛）时，该释放材料部分直接位于接触垫或金属通孔上方，并且用作在完成的弹簧结构中的弹簧金属指的导管。 当释放材料不导电时，形成金属带以将弹簧金属指连接到接触垫或金属通孔，并且还将弹簧金属指状物进一步锚定到基底。
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公开(公告)号：US09961771B2
公开(公告)日：2018-05-01
申请号：US13571252
申请日：2012-08-09
申请人： JengPing Lu , Eugene M. Chow
发明人： JengPing Lu , Eugene M. Chow
CPC分类号： H05K1/142 , H05K1/0286 , H05K1/14 , H05K3/368 , H05K2201/09963 , Y10T29/49124 , Y10T29/49126 , Y10T29/49155
摘要： A method of forming an interconnect substrate includes providing at least two unit cells, arranging the unit cells to form a desired circuit pattern, and joining the unit cells to form the interconnect substrate having the desired circuit pattern.
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6.发明授权Systems and methods for biasing high fill-factor sensor arrays and the like 有权用于偏置高填充因子传感器阵列等的系统和方法公开(公告)号：US07863703B2
公开(公告)日：2011-01-04
申请号：US12379581
申请日：2009-02-25
发明人： JengPing Lu , James B. Boyce
IPC分类号： H01L29/868 , H01L31/105
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译： 形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极 以及与N层相邻并且与电压偏置源电连接的附加半导体结构。 施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。 电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。 本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。
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7.发明申请Systems and methods for biasing high fill-factor sensor arrays and the like 有权用于偏置高填充因子传感器阵列等的系统和方法公开(公告)号：US20090160006A1
公开(公告)日：2009-06-25
申请号：US12379581
申请日：2009-02-25
申请人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
发明人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
IPC分类号： H01L31/105 , H03K3/01
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译： 形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极 以及与N层相邻并且与电压偏置源电连接的附加半导体结构。 施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。 电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。 本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。
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8.发明申请公开(公告)号：US20080141877A1
公开(公告)日：2008-06-19
申请号：US11613159
申请日：2006-12-19
IPC分类号： B41M1/10
CPC分类号： B41M1/10 , B41M1/04 , B41M1/06 , H05K3/207 , H05K2201/091 , H05K2203/105
摘要： A printing surface includes a substrate having latching electrodes on a first surface, a spacer layer on the first surface of the substrate, the spacer layer patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane, the membrane having conductive regions, on the spacer layer to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.
摘要翻译： 打印表面包括在第一表面上具有锁定电极的基板，在基板的第一表面上的间隔层，图案化的间隔层以形成孔，使得锁定电极驻留在孔中，可变形的膜，该膜具有导电 区域，在间隔层上包围孔，每个封闭的井及其膜的相关区域形成像素膜，以及致动电路，用于致动电极，以使像素膜中选定的像素膜保持在偏转状态，当像素 膜受到冲击以返回到未偏转的状态。
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公开(公告)号：US08384180B2
公开(公告)日：2013-02-26
申请号：US12358171
申请日：2009-01-22
申请人： JengPing Lu , Raj B. Apte
发明人： JengPing Lu , Raj B. Apte
IPC分类号： H01L31/075 , H01L31/105 , H01L31/117
CPC分类号： H01L29/66477 , H01L29/04 , H01L29/1604 , H01L29/20 , H01L29/66356 , H01L29/7391
摘要： A diode has a first contact of a material having a first conductivity type, a second contact of a material having a second conductivity type arranged co-planarly with the first contact, a channel arranged co-planarly between the first and second contacts, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate. A diode has a layer of material arranged on a substrate, a first region of material doped to have a first conductivity type, a second region of material doped to have a second conductivity type, a channel between the first and second regions formed of an undoped region, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate. A method includes forming a layer of material on a substrate, forming a first region of a first conductivity in the material, forming a second region of a second conductivity in the material, arranged so as to provide a channel region between the first and second regions, the channel region remaining undoped, depositing a layer of gate dielectric on the layer of material, arranging a gate adjacent the channel region on the gate dielectric, and electrically connecting a voltage source to the gate.
摘要翻译： 二极管具有第一导电类型的材料的第一接触，与第一接触面共面布置的具有第二导电类型的材料的第二接触，在第一和第二接触之间共面布置的沟道，栅极 布置在所述通道附近，以及电连接到所述栅极的电压源。 二极管具有布置在衬底上的材料层，第一掺杂材料区域具有第一导电类型，掺杂第二导电类型的第二材料区域，由未掺杂的第一和第二区域形成的沟道 区域，邻近沟道布置的栅极和电连接到栅极的电压源。 一种方法包括在衬底上形成材料层，在材料中形成第一导电性的第一区域，在材料中形成第二导电性的第二区域，其布置成在第一和第二区域之间提供沟道区域 ，沟道区域保留未掺杂，在该材料层上沉积一层栅极电介质，在栅极电介质上布置与该沟道区相邻的栅极，以及将电压源电连接至该栅极。
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公开(公告)号：US07863704B2
公开(公告)日：2011-01-04
申请号：US12392943
申请日：2009-02-25
发明人： JengPing Lu , James B. Boyce
IPC分类号： H01L29/868 , H01L31/105
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
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