公开(公告)号：US6104615A

公开(公告)日：2000-08-15

申请号：US154484

申请日：1998-09-16

申请人： Jens Pohl ,  Simon Muff ,  Michael Schneider

发明人： Jens Pohl ,  Simon Muff ,  Michael Schneider

IPC分类号： H01L25/10 ,  H05K3/30 ,  H05K7/20

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/0002

摘要： A VSMP semiconductor component is mounted by inserting an auxiliary element into a slot in a receptacle. The auxiliary element projects laterally from a narrow side of the semiconductor component and, as the auxiliary element is inserted into the slot, the semiconductor component is properly positioning on the printed circuit board.

摘要翻译： 通过将辅助元件插入插座中的槽中来安装VSMP半导体部件。 辅助元件从半导体部件的窄边侧向突出，并且当辅助元件插入槽中时，半导体部件正确地定位在印刷电路板上。

公开(公告)号：US07208827B2

公开(公告)日：2007-04-24

申请号：US10149892

申请日：2000-12-13

申请人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

发明人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

IPC分类号： H01L23/22 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/32 ,  H01L23/3107 ,  H01L23/3677 ,  H01L2224/27013 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

摘要： A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

摘要翻译： 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层，并以导热方式连接到金属层。 这提供了封装配置，其具有改进的能够从所安装的半导体芯片散发的损失功率的能力，并且保持了封装布置的期望的机械特性。

公开(公告)号：US20050040517A1

公开(公告)日：2005-02-24

申请号：US10149892

申请日：2000-12-13

申请人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

发明人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

IPC分类号： H01L23/31 ,  H01L23/367 ,  H01L23/02

CPC分类号： H01L24/32 ,  H01L23/3107 ,  H01L23/3677 ,  H01L2224/27013 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

摘要： A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

摘要翻译： 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层，并以导热方式连接到金属层。 这提供了封装配置，其具有改进的能够从所安装的半导体芯片散发的损失功率的能力，并且保持了封装布置的期望的机械特性。

公开(公告)号：US06434035B1

公开(公告)日：2002-08-13

申请号：US09793344

申请日：2001-02-26

申请人： Ekkehard Miersch ,  Simon Muff ,  Jens Pohl

发明人： Ekkehard Miersch ,  Simon Muff ,  Jens Pohl

IPC分类号： G11C506

摘要： The memory system has data lines for transmitting data between memory components and at least one control unit. The memory system is a distributed system with at least one central control unit and at least one group control unit, the group control unit having at least one first data line for connecting the group control unit to the central control unit, and second data lines for connecting a group of memory components to the group control unit.

公开(公告)号：US06798045B2

公开(公告)日：2004-09-28

申请号：US09771912

申请日：2001-01-29

申请人： Jens Pohl ,  Simon Muff ,  Eckehard Miersch

发明人： Jens Pohl ,  Simon Muff ,  Eckehard Miersch

IPC分类号： H01L23495

CPC分类号： H01L23/5383 ,  H01L23/3677 ,  H01L23/49861 ,  H01L23/50 ,  H01L25/0657 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： A lead frame is described which has at least one integrated electronic circuit. The integrated electronic circuit is situated in a region of a main area of the lead frame. The lead frame has at least one signal line, at least one electrically insulating plate, and an electrically conductive, grounded plate are situated. The electrically insulating plate, and the electrically conductive, grounded plate are situated, at least in sections, between the integrated electronic circuit and the signal line. A method for producing the lead frame is also described.

摘要翻译： 描述了具有至少一个集成电子电路的引线框架。 集成电子电路位于引线框架的主区域的区域中。 引线框架具有至少一个信号线，至少一个电绝缘板和导电接地板。 电绝缘板和导电接地板至少部分地位于集成电子电路和信号线之间。 还描述了用于制造引线框架的方法。

公开(公告)号：US06534345B1

公开(公告)日：2003-03-18

申请号：US09514265

申请日：2000-02-28

申请人： Simon Muff ,  Jens Pohl ,  Johann Winderl

发明人： Simon Muff ,  Jens Pohl ,  Johann Winderl

IPC分类号： H01L2144

CPC分类号： H01L24/75 ,  H01L21/563 ,  H01L24/743 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082

摘要： In order to mount a semiconductor chip on a carrier layer, consolidated filler material is applied between the semiconductor chip and the carrier layer. The filler material is sucked, under the application of a partial vacuum, from at least one edge section of the semiconductor chip to at least one other edge section of the semiconductor chip. As a result, a package is provided in which the filler material is essentially free of air inclusions.

摘要翻译： 为了将半导体芯片安装在载体层上，固化的填充材料被施加在半导体芯片和载体层之间。 填充材料在部分真空下被从半导体芯片的至少一个边缘部分吸收到半导体芯片的至少另一个边缘部分。 结果，提供了其中填充材料基本上不含空气夹杂物的包装。

公开(公告)号：US20080032446A1

公开(公告)日：2008-02-07

申请号：US11462662

申请日：2006-08-04

申请人： Steve Wood ,  Simon Muff ,  Anton Legen

发明人： Steve Wood ,  Simon Muff ,  Anton Legen

IPC分类号： H01L21/00

CPC分类号： H01L23/50 ,  H01L23/367 ,  H01L23/647 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit assembly including an integrated circuit device electrically connected to a signal line, and method of making the same. The invention also includes a heat dissipation device thermally coupled to the integrated circuit device and a termination resistor electrically connected to the signal line and the heat dissipation device.

摘要翻译： 包括电连接到信号线的集成电路装置的集成电路组件及其制造方法。 本发明还包括热耦合到集成电路装置的散热装置和电连接到信号线和散热装置的终端电阻器。

公开(公告)号：US20070015381A1

公开(公告)日：2007-01-18

申请号：US11481676

申请日：2006-07-06

申请人： Simon Muff ,  Siva Raghuram

发明人： Simon Muff ,  Siva Raghuram

IPC分类号： H01R12/00

CPC分类号： G11C5/04 ,  H05K1/144 ,  H05K3/366 ,  H05K2201/045 ,  H05K2201/10189 ,  H05K2203/1572

摘要： A memory extension memory module, a memory module system, and a memory module is disclosed. The memory module including at least one memory device and a connector for connecting the memory module to a computer system, wherein the memory module additionally includes a surface-mounted connector for connecting a memory extension memory module to the memory module. Furthermore, a method for manufacturing a memory module is disclosed. The memory module including at least one memory device and at least one connector for connecting a memory extension memory module to the memory module, wherein the at least one memory device and the at least one connector are connected to the memory module in a single manufacturing process.

摘要翻译： 公开了一种存储器扩展存储器模块，存储器模块系统和存储器模块。 所述存储器模块包括至少一个存储器件和用于将所述存储器模块连接到计算机系统的连接器，其中所述存储器模块还包括用于将存储器扩展存储器模块连接到所述存储器模块的表面安装连接器。 此外，公开了一种用于制造存储器模块的方法。 所述存储器模块包括至少一个存储器设备和用于将存储器扩展存储器模块连接到所述存储器模块的至少一个连接器，其中所述至少一个存储器设备和所述至少一个连接器在单个制造过程中连接到所述存储器模块 。

公开(公告)号：US06968481B2

公开(公告)日：2005-11-22

申请号：US09776951

申请日：2001-02-05

申请人： Simon Muff

发明人： Simon Muff

IPC分类号： G01R31/30 ,  G01R31/317 ,  G06F13/42 ,  H01L21/48 ,  H05K1/02 ,  H05K1/16 ,  G06F11/00

CPC分类号： H05K1/0248 ,  G01R31/3016 ,  G01R31/31725 ,  H01L21/485 ,  H05K1/0268 ,  H05K1/162 ,  H05K2201/10689 ,  H05K2203/107 ,  H05K2203/171 ,  H05K2203/175

摘要： A method and a device adapt/tune signal transit times on line systems or networks between integrated circuits which are mounted on printed circuit boards. Fine tuning of differences in transit times can be easily carried out by capacitive load structures disposed on conductor tracks in the vicinity of chip housings of the integrated circuits on the printed circuit boards by disconnecting connecting lines using a cutting laser.

摘要翻译： 一种方法和设备在安装在印刷电路板上的集成电路之间的线路系统或网络上适应/调谐信号传输时间。 通过使用切割激光器断开连接线，可以容易地通过设置在印刷电路板上的集成电路的芯片壳体附近的导体轨道上的电容性负载结构来微调传输时间差。

公开(公告)号：US06783372B2

公开(公告)日：2004-08-31

申请号：US10345057

申请日：2003-01-15

申请人： Oliver Kiehl ,  Simon Muff

发明人： Oliver Kiehl ,  Simon Muff

IPC分类号： H01R1200

CPC分类号： H05K1/0246 ,  H05K1/0295 ,  H05K1/141 ,  H05K2201/09954 ,  H05K2201/10022 ,  H05K2201/10159

摘要： The present invention provides an apparatus for connecting semiconductor modules, in particular memory banks, having: at least two devices (A, B) for receiving a respective semiconductor module (1, 2); a contact device (13a, 13b, 13c, 13d, 13e, 13f) having a first group of contacts (13a, 13b, 13c, 13d) and a second group of contacts (13e, 13f), the two groups being able to be connected to one another by means of a variable connection module (3, 4); a group of lines (10, 11, 20, 21) for connecting the receiving devices (A, B) to the first group of contacts (13a, 13b, 13c, 13d), a subgroup (13b, 13c) of the first group of contacts being assigned to the lines (10, 11) of the first receiving device (A); the connection module (3, 4) connecting either a subgroup of the contacts (13b, 13c) to the second group of contacts (13e, 13f), or the first group of contacts (13a, 13b, 13c, 13d) to the second group of contacts (13e, 13f). The present invention likewise provides a method for connecting semiconductor modules, in particular memory banks.

摘要翻译： 本发明提供了一种用于连接半导体模块，特别是存储体的装置，其具有：至少两个用于接收相应的半导体模块（1,2）的装置（A，B）; 具有第一组触点（13a，13b，13c，13d）和第二组触点（13e，13f）的接触装置（13a，13b，13c，13d，13e，13f），所述两组能够 通过可变连接模块（3,4）彼此连接; 用于将接收装置（A，B）连接到第一组触点（13a，13b，13c，13d）的一组线路（10,11,20,21），第一组的子组（13b，13c） 的触点分配给第一接收装置（A）的线（10,11）; 连接模块（3,4）将触点（13b，13c）的子组与第二组触点（13e，13f）或第一组触点（13a，13b，13c，13d）连接到第二组 触点组（13e，13f）。 本发明同样提供了用于连接半导体模块，特别是存储体的方法。