Encasing arrangement for a semiconductor component
    2.
    发明授权
    Encasing arrangement for a semiconductor component 有权
    半导体元件的封装结构

    公开(公告)号:US07208827B2

    公开(公告)日:2007-04-24

    申请号:US10149892

    申请日:2000-12-13

    摘要: A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

    摘要翻译: 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层,并以导热方式连接到金属层。 这提供了封装配置,其具有改进的能够从所安装的半导体芯片散发的损失功率的能力,并且保持了封装布置的期望的机械特性。

    Encasing arrangement for a semicoductor component
    3.
    发明申请
    Encasing arrangement for a semicoductor component 有权
    半导体组件的封装

    公开(公告)号:US20050040517A1

    公开(公告)日:2005-02-24

    申请号:US10149892

    申请日:2000-12-13

    摘要: A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

    摘要翻译: 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层,并以导热方式连接到金属层。 这提供了封装配置,其具有改进的能够从所安装的半导体芯片散发的损失功率的能力,并且保持了封装布置的期望的机械特性。

    Memory system
    4.
    发明授权

    公开(公告)号:US06434035B1

    公开(公告)日:2002-08-13

    申请号:US09793344

    申请日:2001-02-26

    IPC分类号: G11C506

    摘要: The memory system has data lines for transmitting data between memory components and at least one control unit. The memory system is a distributed system with at least one central control unit and at least one group control unit, the group control unit having at least one first data line for connecting the group control unit to the central control unit, and second data lines for connecting a group of memory components to the group control unit.

    Lead frame, circuit board with lead frame, and method for producing the lead frame
    5.
    发明授权
    Lead frame, circuit board with lead frame, and method for producing the lead frame 有权
    引线框架,带引线框架的电路板,以及引线框架的制造方法

    公开(公告)号:US06798045B2

    公开(公告)日:2004-09-28

    申请号:US09771912

    申请日:2001-01-29

    IPC分类号: H01L23495

    摘要: A lead frame is described which has at least one integrated electronic circuit. The integrated electronic circuit is situated in a region of a main area of the lead frame. The lead frame has at least one signal line, at least one electrically insulating plate, and an electrically conductive, grounded plate are situated. The electrically insulating plate, and the electrically conductive, grounded plate are situated, at least in sections, between the integrated electronic circuit and the signal line. A method for producing the lead frame is also described.

    摘要翻译: 描述了具有至少一个集成电子电路的引线框架。 集成电子电路位于引线框架的主区域的区域中。 引线框架具有至少一个信号线,至少一个电绝缘板和导电接地板。 电绝缘板和导电接地板至少部分地位于集成电子电路和信号线之间。 还描述了用于制造引线框架的方法。

    Memory module, memory extension memory module, memory module system, and method for manufacturing a memory module
    8.
    发明申请
    Memory module, memory extension memory module, memory module system, and method for manufacturing a memory module 有权
    存储器模块,存储器扩展存储器模块,存储器模块系统以及用于制造存储器模块的方法

    公开(公告)号:US20070015381A1

    公开(公告)日:2007-01-18

    申请号:US11481676

    申请日:2006-07-06

    IPC分类号: H01R12/00

    摘要: A memory extension memory module, a memory module system, and a memory module is disclosed. The memory module including at least one memory device and a connector for connecting the memory module to a computer system, wherein the memory module additionally includes a surface-mounted connector for connecting a memory extension memory module to the memory module. Furthermore, a method for manufacturing a memory module is disclosed. The memory module including at least one memory device and at least one connector for connecting a memory extension memory module to the memory module, wherein the at least one memory device and the at least one connector are connected to the memory module in a single manufacturing process.

    摘要翻译: 公开了一种存储器扩展存储器模块,存储器模块系统和存储器模块。 所述存储器模块包括至少一个存储器件和用于将所述存储器模块连接到计算机系统的连接器,其中所述存储器模块还包括用于将存储器扩展存储器模块连接到所述存储器模块的表面安装连接器。 此外,公开了一种用于制造存储器模块的方法。 所述存储器模块包括至少一个存储器设备和用于将存储器扩展存储器模块连接到所述存储器模块的至少一个连接器,其中所述至少一个存储器设备和所述至少一个连接器在单个制造过程中连接到所述存储器模块 。

    Apparatus for connecting semiconductor modules
    10.
    发明授权
    Apparatus for connecting semiconductor modules 失效
    用于连接半导体模块的装置

    公开(公告)号:US06783372B2

    公开(公告)日:2004-08-31

    申请号:US10345057

    申请日:2003-01-15

    IPC分类号: H01R1200

    摘要: The present invention provides an apparatus for connecting semiconductor modules, in particular memory banks, having: at least two devices (A, B) for receiving a respective semiconductor module (1, 2); a contact device (13a, 13b, 13c, 13d, 13e, 13f) having a first group of contacts (13a, 13b, 13c, 13d) and a second group of contacts (13e, 13f), the two groups being able to be connected to one another by means of a variable connection module (3, 4); a group of lines (10, 11, 20, 21) for connecting the receiving devices (A, B) to the first group of contacts (13a, 13b, 13c, 13d), a subgroup (13b, 13c) of the first group of contacts being assigned to the lines (10, 11) of the first receiving device (A); the connection module (3, 4) connecting either a subgroup of the contacts (13b, 13c) to the second group of contacts (13e, 13f), or the first group of contacts (13a, 13b, 13c, 13d) to the second group of contacts (13e, 13f). The present invention likewise provides a method for connecting semiconductor modules, in particular memory banks.

    摘要翻译: 本发明提供了一种用于连接半导体模块,特别是存储体的装置,其具有:至少两个用于接收相应的半导体模块(1,2)的装置(A,B); 具有第一组触点(13a,13b,13c,13d)和第二组触点(13e,13f)的接触装置(13a,13b,13c,13d,13e,13f),所述两组能够 通过可变连接模块(3,4)彼此连接; 用于将接收装置(A,B)连接到第一组触点(13a,13b,13c,13d)的一组线路(10,11,20,21),第一组的子组(13b,13c) 的触点分配给第一接收装置(A)的线(10,11); 连接模块(3,4)将触点(13b,13c)的子组与第二组触点(13e,13f)或第一组触点(13a,13b,13c,13d)连接到第二组 触点组(13e,13f)。 本发明同样提供了用于连接半导体模块,特别是存储体的方法。