公开(公告)号：US06434035B1

公开(公告)日：2002-08-13

申请号：US09793344

申请日：2001-02-26

申请人： Ekkehard Miersch ,  Simon Muff ,  Jens Pohl

发明人： Ekkehard Miersch ,  Simon Muff ,  Jens Pohl

IPC分类号： G11C506

摘要： The memory system has data lines for transmitting data between memory components and at least one control unit. The memory system is a distributed system with at least one central control unit and at least one group control unit, the group control unit having at least one first data line for connecting the group control unit to the central control unit, and second data lines for connecting a group of memory components to the group control unit.

公开(公告)号：US07208827B2

公开(公告)日：2007-04-24

申请号：US10149892

申请日：2000-12-13

申请人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

发明人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

IPC分类号： H01L23/22 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/32 ,  H01L23/3107 ,  H01L23/3677 ,  H01L2224/27013 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

摘要： A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

摘要翻译： 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层，并以导热方式连接到金属层。 这提供了封装配置，其具有改进的能够从所安装的半导体芯片散发的损失功率的能力，并且保持了封装布置的期望的机械特性。

公开(公告)号：US20050040517A1

公开(公告)日：2005-02-24

申请号：US10149892

申请日：2000-12-13

申请人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

发明人： Christian Hauser ,  Simon Muff ,  Jens Pohl ,  Friedrich Wanninger

IPC分类号： H01L23/31 ,  H01L23/367 ,  H01L23/02

CPC分类号： H01L24/32 ,  H01L23/3107 ,  H01L23/3677 ,  H01L2224/27013 ,  H01L2224/83051 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3025

摘要： A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

摘要翻译： 半导体部件封装构造包括安装到印刷电路板的半导体芯片和布置在半导体芯片和印刷电路板之间的基板。 基板用于将半导体芯片的布线端子布线到印刷电路板。 基板通过焊点连接到印刷电路板。 半导体芯片和基板之间的填充物机械地隔离半导体芯片和焊点。 将连接到焊接点的金属层施加到基板。 将至少一个散热材料的模制元件施加到金属层，并以导热方式连接到金属层。 这提供了封装配置，其具有改进的能够从所安装的半导体芯片散发的损失功率的能力，并且保持了封装布置的期望的机械特性。

公开(公告)号：US06534345B1

公开(公告)日：2003-03-18

申请号：US09514265

申请日：2000-02-28

申请人： Simon Muff ,  Jens Pohl ,  Johann Winderl

发明人： Simon Muff ,  Jens Pohl ,  Johann Winderl

IPC分类号： H01L2144

CPC分类号： H01L24/75 ,  H01L21/563 ,  H01L24/743 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082

摘要： In order to mount a semiconductor chip on a carrier layer, consolidated filler material is applied between the semiconductor chip and the carrier layer. The filler material is sucked, under the application of a partial vacuum, from at least one edge section of the semiconductor chip to at least one other edge section of the semiconductor chip. As a result, a package is provided in which the filler material is essentially free of air inclusions.

摘要翻译： 为了将半导体芯片安装在载体层上，固化的填充材料被施加在半导体芯片和载体层之间。 填充材料在部分真空下被从半导体芯片的至少一个边缘部分吸收到半导体芯片的至少另一个边缘部分。 结果，提供了其中填充材料基本上不含空气夹杂物的包装。

公开(公告)号：US6104615A

公开(公告)日：2000-08-15

申请号：US154484

申请日：1998-09-16

申请人： Jens Pohl ,  Simon Muff ,  Michael Schneider

发明人： Jens Pohl ,  Simon Muff ,  Michael Schneider

IPC分类号： H01L25/10 ,  H05K3/30 ,  H05K7/20

CPC分类号： H05K3/301 ,  H01L25/105 ,  H01L2225/1029 ,  H01L2225/1064 ,  H01L2225/107 ,  H01L2924/0002

摘要： A VSMP semiconductor component is mounted by inserting an auxiliary element into a slot in a receptacle. The auxiliary element projects laterally from a narrow side of the semiconductor component and, as the auxiliary element is inserted into the slot, the semiconductor component is properly positioning on the printed circuit board.

摘要翻译： 通过将辅助元件插入插座中的槽中来安装VSMP半导体部件。 辅助元件从半导体部件的窄边侧向突出，并且当辅助元件插入槽中时，半导体部件正确地定位在印刷电路板上。

公开(公告)号：US06798045B2

公开(公告)日：2004-09-28

申请号：US09771912

申请日：2001-01-29

申请人： Jens Pohl ,  Simon Muff ,  Eckehard Miersch

发明人： Jens Pohl ,  Simon Muff ,  Eckehard Miersch

IPC分类号： H01L23495

CPC分类号： H01L23/5383 ,  H01L23/3677 ,  H01L23/49861 ,  H01L23/50 ,  H01L25/0657 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： A lead frame is described which has at least one integrated electronic circuit. The integrated electronic circuit is situated in a region of a main area of the lead frame. The lead frame has at least one signal line, at least one electrically insulating plate, and an electrically conductive, grounded plate are situated. The electrically insulating plate, and the electrically conductive, grounded plate are situated, at least in sections, between the integrated electronic circuit and the signal line. A method for producing the lead frame is also described.

摘要翻译： 描述了具有至少一个集成电子电路的引线框架。 集成电子电路位于引线框架的主区域的区域中。 引线框架具有至少一个信号线，至少一个电绝缘板和导电接地板。 电绝缘板和导电接地板至少部分地位于集成电子电路和信号线之间。 还描述了用于制造引线框架的方法。

公开(公告)号：US09012401B2

公开(公告)日：2015-04-21

申请号：US11817735

申请日：2006-03-03

申请人： Stefan Mundlos ,  Petra Knaus ,  Jens Pohl ,  Michael Kruse ,  Frank Plöger

发明人： Stefan Mundlos ,  Petra Knaus ,  Jens Pohl ,  Michael Kruse ,  Frank Plöger

IPC分类号： A61K38/18 ,  A61K38/16 ,  C12N5/00 ,  C07K14/475 ,  A61K38/00

CPC分类号： C07K14/475 ,  A61K38/00

摘要： The invention relates to novel biosynthetic growth factor mutants which exhibit improved biological activity.

摘要翻译： 本发明涉及表现出改善的生物活性的新型生物合成生长因子突变体。

公开(公告)号：US08889548B2

公开(公告)日：2014-11-18

申请号：US13084105

申请日：2011-04-11

申请人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Heinrich Koerner

发明人： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Heinrich Koerner

IPC分类号： H01L29/72 ,  H01L23/552 ,  H01L21/768 ,  H01L23/48 ,  H01L23/66

CPC分类号： H01L21/76898 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/76879 ,  H01L23/481 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6688 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05569 ,  H01L2924/00014 ,  H01L2224/05552

摘要： Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

摘要翻译： 公开了一种片上系统的结构以及片上系统的形成方法。 在一个实施例中，一种制造片上系统的方法包括从衬底的背面形成穿透衬底开口，穿过衬底开口设置在第一和第二区域之间，第一区域包括用于RF电路的装置，第二区域包括第二 区域包括用于其他电路的装置。 该方法还包括在光致抗蚀剂层上形成用于再分配线的图案，设置在背面下方的光致抗蚀剂层，以及用导电材料填充贯通基板开口和再分布线图案。

公开(公告)号：US08829663B2

公开(公告)日：2014-09-09

申请号：US11772539

申请日：2007-07-02

申请人： Jens Pohl ,  Markus Brunnbauer ,  Irmgard Escher-Poeppel ,  Thorsten Meyer

发明人： Jens Pohl ,  Markus Brunnbauer ,  Irmgard Escher-Poeppel ,  Thorsten Meyer

IPC分类号： H01L23/02 ,  H01L23/12 ,  H01L23/053 ,  H01L23/04 ,  H01L23/28

CPC分类号： H01L24/97 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/82039 ,  H01L2224/82047 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1058 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19042 ,  H01L2924/30107 ,  H01L2224/82 ,  H01L2924/00

摘要： A description is given of a device comprising a first semiconductor chip, a molding compound layer embedding the first semiconductor chip, a first electrically conductive layer applied to the molding compound layer, a through hole arranged in the molding compound layer, and a solder material filling the through hole.

摘要翻译： 对包括第一半导体芯片，嵌入第一半导体芯片的成型化合物层，施加到模塑料层的第一导电层，配置在模塑料层中的通孔和焊料填充材料的装置进行说明 通孔。

公开(公告)号：US08659135B2

公开(公告)日：2014-02-25

申请号：US11572873

申请日：2005-07-21

申请人： Michael Bauer ,  Ulrich Bachmaier ,  Robert-Christian Hagen ,  Jens Pohl ,  Rainer Steiner ,  Hermann Vllsmeler ,  Holger Woerner ,  Bernhard Zuhr

发明人： Michael Bauer ,  Ulrich Bachmaier ,  Robert-Christian Hagen ,  Jens Pohl ,  Rainer Steiner ,  Hermann Vllsmeler ,  Holger Woerner ,  Bernhard Zuhr

IPC分类号： H01L23/488

CPC分类号： H01L25/0657 ,  H01L25/105 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48471 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/19041 ,  H01L2924/3011 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/1053 ,  H05K2201/10734 ,  H05K2201/10924 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate, which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.

摘要翻译： 公开了一种具有布线基板和半导体器件堆叠的中间布线板的半导体堆叠和半导体基底器件。 在一个实施例中，半导体芯片布置在中间布线板和布线基板之间，其一方面通过布线基板与布线基板的下侧上的外部触点电连接，另一方面与布线基板 接线基板的边缘区域的端子区域。 中间布线板具有成角度的外部扁平导体，其电连接在布线板的接触端子区域中。 此外，在中间布线板的上侧，布置在内部扁平导体的自由端上的是外部接触端子区域，其尺寸和布置对应于要堆叠的半导体器件的外部触点。