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公开(公告)号:US20090117722A1
公开(公告)日:2009-05-07
申请号:US11493231
申请日:2006-07-26
申请人: Jesse Berkley Tucker , Kevin Sean Matocha , Peter Wilson Waldrab , James Howard Schermerhorn , Matthew Morgan Edmonds
发明人: Jesse Berkley Tucker , Kevin Sean Matocha , Peter Wilson Waldrab , James Howard Schermerhorn , Matthew Morgan Edmonds
IPC分类号: H01L21/265
CPC分类号: H01L29/7802 , H01L21/0332 , H01L21/0337 , H01L21/0465 , H01L29/1095 , H01L29/41766 , H01L29/66068
摘要: A method for fabricating a semiconductor structure includes forming a carbon masking layer on a semiconductor layer, forming a protective layer on the carbon masking layer. The method further includes forming an opening in the protective layer and the carbon masking layer and processing the semiconductor layer through the opening to form a first processed region in the semiconductor layer. The method further includes enlarging the opening in the carbon masking layer and performing an additional processing step on the semiconductor layer through the enlarged opening to form a second processed region in the semiconductor layer.
摘要翻译: 一种制造半导体结构的方法包括在半导体层上形成碳掩蔽层,在碳屏蔽层上形成保护层。 该方法还包括在保护层和碳屏蔽层中形成开口,并通过开口处理半导体层,以在半导体层中形成第一处理区域。 该方法还包括扩大碳掩模层中的开口,并通过扩大开口在半导体层上执行附加处理步骤,以在半导体层中形成第二处理区域。
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公开(公告)号:US07517807B1
公开(公告)日:2009-04-14
申请号:US11493231
申请日:2006-07-26
申请人: Jesse Berkley Tucker , Kevin Sean Matocha , Peter Wilson Waldrab , James Howard Schermerhorn , Matthew Morgan Edmonds
发明人: Jesse Berkley Tucker , Kevin Sean Matocha , Peter Wilson Waldrab , James Howard Schermerhorn , Matthew Morgan Edmonds
IPC分类号: H01L21/302
CPC分类号: H01L29/7802 , H01L21/0332 , H01L21/0337 , H01L21/0465 , H01L29/1095 , H01L29/41766 , H01L29/66068
摘要: A method for fabricating a semiconductor structure includes forming a carbon masking layer on a semiconductor layer, forming a protective layer on the carbon masking layer. The method further includes forming an opening in the protective layer and the carbon masking layer and processing the semiconductor layer through the opening to form a first processed region in the semiconductor layer. The method further includes enlarging the opening in the carbon masking layer and performing an additional processing step on the semiconductor layer through the enlarged opening to form a second processed region in the semiconductor layer.
摘要翻译: 一种制造半导体结构的方法包括在半导体层上形成碳掩蔽层,在碳屏蔽层上形成保护层。 该方法还包括在保护层和碳屏蔽层中形成开口,并通过开口处理半导体层,以在半导体层中形成第一处理区域。 该方法还包括扩大碳掩模层中的开口,并通过扩大开口在半导体层上执行附加处理步骤,以在半导体层中形成第二处理区域。
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公开(公告)号:US07595241B2
公开(公告)日:2009-09-29
申请号:US11466488
申请日:2006-08-23
申请人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
IPC分类号: H01L21/336
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要: A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译: 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽,漂移层包括第一极性类型,沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内,欧姆接触层包括第二极性类型的材料。 在漂移层,沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长,以便重新填充沟槽,并且将第一和第二极性类型的外延生长层平坦化,以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号:US20090159896A1
公开(公告)日:2009-06-25
申请号:US11960785
申请日:2007-12-20
IPC分类号: H01L21/265 , H01L21/336 , H01L29/24
CPC分类号: H01L29/7802 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要: A method of making a silicon carbide MOSFET is disclosed. The method includes providing a semiconductor device structure, wherein the device structure comprises a silicon carbide semiconductor device layer, an ion implanted well region of a first conductivity type formed in the semiconductor device layer, an ion implanted source region of a second conductivity type formed into the ion implanted well region; providing a mask layer over the semiconductor device layer, the mask layer exposing a portion of the ion implanted source region, then etching through the portion of the ion implanted source region to form a dimple; then implanting ions through the dimple to form a high dopant concentration first conductivity type ion implanted contact region, wherein the ion implanted contact region is deeper than the ion implanted well region; then removing the contact region mask layer and annealing implanted ions.
摘要翻译: 公开了一种制造碳化硅MOSFET的方法。 该方法包括提供半导体器件结构,其中器件结构包括碳化硅半导体器件层,形成在半导体器件层中的第一导电类型的离子注入阱区,形成第二导电类型的离子注入源区 离子注入井区; 在所述半导体器件层上提供掩模层,所述掩模层暴露所述离子注入源区的一部分,然后蚀刻穿过所述离子注入源区的所述部分以形成凹坑; 然后通过所述凹坑注入离子以形成高掺杂浓度的第一导电型离子注入接触区,其中所述离子注入的接触区比所述离子注入的阱区深; 然后去除接触区掩模层并退火注入的离子。
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公开(公告)号:US20090267141A1
公开(公告)日:2009-10-29
申请号:US12498630
申请日:2009-07-07
申请人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要: A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译: 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽,漂移层包括第一极性类型,沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内,欧姆接触层包括第二极性类型的材料。 在漂移层,沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长,以便重新填充沟槽,并且将第一和第二极性类型的外延生长层平坦化,以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号:US20080050876A1
公开(公告)日:2008-02-28
申请号:US11466488
申请日:2006-08-23
申请人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
发明人: Kevin Sean Matocha , Jody Alan Fronheiser , Larry Burton Rowland , Jesse Berkley Tucker , Stephen Daley Arthur , Zachary Matthew Stum
IPC分类号: H01L21/336
CPC分类号: H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/1608 , H01L29/41766 , H01L29/66068
摘要: A method of forming a vertical MOSFET device includes forming a trench within a drift layer substrate, the drift layer comprising a first polarity type, the trench generally defining a well region of a second polarity type opposite the first polarity type. An ohmic contact layer is formed within a bottom surface of the trench, the ohmic contact layer comprising a material of the second polarity type. A layer of the second polarity type is epitaxially grown over the drift layer, sidewall surfaces of the trench, and the ohmic contact layer. A layer of the first polarity type is epitaxially grown over the epitaxially grown layer of the second polarity type so as to refill the trench, and the epitaxially grown layers of the first and second polarity type are planarized so as to expose an upper surface of the drift layer substrate.
摘要翻译: 形成垂直MOSFET器件的方法包括在漂移层衬底内形成沟槽,漂移层包括第一极性类型,沟槽通常限定与第一极性类型相反的第二极性类型的阱区。 欧姆接触层形成在沟槽的底表面内,欧姆接触层包括第二极性类型的材料。 在漂移层,沟槽的侧壁表面和欧姆接触层上外延生长第二极性类型的层。 第一极性类型的层在第二极性类型的外延生长层上外延生长,以便重新填充沟槽,并且将第一和第二极性类型的外延生长层平坦化,以暴露出第二极性类型的上表面 漂移层基板。
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公开(公告)号:US20080146004A1
公开(公告)日:2008-06-19
申请号:US11610199
申请日:2006-12-13
CPC分类号: H01L21/0465 , H01L29/66068
摘要: A method for fabricating a SiC MOSFET is disclosed. The method includes growing a SiC epilayer over a substrate, planarizing the SiC epilayer to provide a planarized SiC epilayer, and forming a gate dielectric layer in contact with the planarized epilayer.
摘要翻译: 公开了一种制造SiC MOSFET的方法。 该方法包括在衬底上生长SiC外延层,平面化SiC外延层以提供平坦化的SiC外延层,以及形成与平坦化的外延层接触的栅极电介质层。
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公开(公告)号:US20080108190A1
公开(公告)日:2008-05-08
申请号:US11593317
申请日:2006-11-06
申请人: Kevin Sean Matocha
发明人: Kevin Sean Matocha
IPC分类号: H01L21/8234
CPC分类号: H01L29/66068 , H01L21/0465 , H01L29/1608 , H01L29/7827
摘要: The present invention provides a method of fabricating a metal oxide semiconductor field effect transistor. The method includes the steps of forming a source region on a silicon carbide layer and annealing the source region. A gate oxide layer is formed on the source region and the silicon carbide layer. The method further includes providing a gate electrode on the gate oxide layer and disposing a dielectric layer on the gate electrode and the gate oxide layer. The method further includes etching a portion of the dielectric layer and a portion of the gate oxide layer to form sidewalls on the gate electrode. A metal layer is disposed on the gate electrode, the sidewalls and the source region. The method further includes forming a gate contact and a source contact by subjecting the metal layer to a temperature of at least about 800 degrees Celsius. The gate contact and the source contact comprise a metal silicide. The distance between the gate contact and the source contact is less than about 0.6 micrometers. A vertical SiC MOSFET is also provided.
摘要翻译: 本发明提供一种制造金属氧化物半导体场效应晶体管的方法。 该方法包括以下步骤:在碳化硅层上形成源极区域并退火源极区域。 在源区和碳化硅层上形成栅氧化层。 该方法还包括在栅极氧化物层上设置栅电极,并在栅电极和栅极氧化物层上设置电介质层。 该方法还包括蚀刻介电层的一部分和栅极氧化物层的一部分以在栅电极上形成侧壁。 金属层设置在栅电极,侧壁和源极区上。 该方法还包括通过使金属层经受至少约800摄氏度的温度来形成栅极接触和源极接触。 栅极接触和源极接触包括金属硅化物。 栅极接触点和源极接触点之间的距离小于约0.6微米。 还提供了一个垂直的SiC MOSFET。
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公开(公告)号:US10367089B2
公开(公告)日:2019-07-30
申请号:US13431596
申请日:2012-03-27
申请人: Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
发明人: Stephen Daley Arthur , Joseph Darryl Michael , Tammy Lynn Johnson , David Alan Lilienfeld , Kevin Sean Matocha , Jody Alan Fronheiser , William Gregg Hawkins
IPC分类号: H01L21/04 , H01L29/16 , H01L29/45 , H01L29/49 , H01L29/78 , H01L29/739 , H01L29/745
摘要: According to one embodiment, a semiconductor device, having a semiconductor substrate comprising silicon carbide with a gate electrode disposed on a portion of the substrate on a first surface with, a drain electrode disposed on a second surface of the substrate. There is a dielectric layer disposed on the gate electrode and a remedial layer disposed about the dielectric layer, wherein the remedial layer is configured to mitigate negative bias temperature instability maintaining a change in threshold voltage of less than about 1 volt. A source electrode is disposed on the remedial layer, wherein the source electrode is electrically coupled to a contact region of the semiconductor substrate.
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公开(公告)号:US08815721B2
公开(公告)日:2014-08-26
申请号:US12971188
申请日:2010-12-17
IPC分类号: H01L21/425 , H01L21/04 , H01L29/66 , H01L29/78
CPC分类号: H01L29/36 , H01L21/046 , H01L29/1608 , H01L29/66068 , H01L29/7816 , H01L29/7827
摘要: A method comprising, introducing a dopant type into a semiconductor layer to define a well region of the semiconductor layer, the well region comprising a channel region, and introducing a dopant type into the well region to define a multiple implant region substantially coinciding with the well region but excluding the channel region.
摘要翻译: 一种方法,包括:将掺杂剂类型引入到半导体层中以限定所述半导体层的阱区,所述阱区包括沟道区,并且将掺杂剂类型引入所述阱区以限定与所述阱大致重合的多个注入区 但不包括渠道区域。
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