P-TYPE SEMICONDUCTOR DEVICE COMPRISING TYPE-2 QUANTUM WELL AND FABRICATION METHOD THEREOF
    2.
    发明申请
    P-TYPE SEMICONDUCTOR DEVICE COMPRISING TYPE-2 QUANTUM WELL AND FABRICATION METHOD THEREOF 有权
    包含2型量子阱的P型半导体器件及其制造方法

    公开(公告)号:US20120007045A1

    公开(公告)日:2012-01-12

    申请号:US12911560

    申请日:2010-10-25

    IPC分类号: H01L29/15 H01L21/20

    摘要: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.

    摘要翻译: 本文公开了使用具有不同电子亲和性或带隙的半导体形成的2型量子阱和使用该2DHG的高速p型半导体器件来生成二维空穴气体(2DHG)的方法。 为此,该方法包括提供半导体衬底; 在所述半导体衬底上生长第一半导体层,在所述第一半导体层上生长具有与所述第一半导体层不同的电子亲和性或带隙的第二半导体层,以及生长具有与所述第一半导体层不同的电子亲和性或带隙的第三半导体层 第二半导体层,从而形成2型量子阱; 并在2型量子阱附近形成p型掺杂层,从而生成2DHG。

    REPAIR CIRCUIT AND REPAIR METHOD OF SEMICONDUCTOR APPARATUS
    3.
    发明申请
    REPAIR CIRCUIT AND REPAIR METHOD OF SEMICONDUCTOR APPARATUS 有权
    半导体装置的维修电路和维修方法

    公开(公告)号:US20110156034A1

    公开(公告)日:2011-06-30

    申请号:US12840231

    申请日:2010-07-20

    IPC分类号: H01L23/522 H01L21/66

    CPC分类号: G11C29/702

    摘要: A repair circuit of a semiconductor apparatus includes a plurality of through-silicon vias including repeated sets of one repair through-silicon via and an M number of normal through-silicon vias; a transmission unit configured to multiplex input data at a first multiplexing rate based on control signals, and transmit the multiplexed data to the plurality of through-silicon vias; a reception unit configured to multiplex signals transmitted through the plurality of through-silicon vias at a second multiplexing rate based on the control signals, and generate output data; and a control signal generation unit configured to generate sets of the control signals based on an input number of a test signal.

    摘要翻译: 半导体装置的修复电路包括多个穿硅通孔,包括重复的一组修复通硅通孔和M个通常的硅通孔; 传输单元,被配置为基于控制信号以第一多路复用速率复用输入数据,并将多路复用数据发送到多个通孔通孔; 接收单元,被配置为基于所述控制信号以第二多路复用速率复用通过所述多个穿硅通孔传输的信号,并生成输出数据; 以及控制信号生成单元,被配置为基于测试信号的输入号码生成控制信号的集合。

    Semiconductor memory device including write driver control circuit and write driver control method
    4.
    发明授权
    Semiconductor memory device including write driver control circuit and write driver control method 有权
    半导体存储器件包括写驱动器控制电路和写驱动器控制方法

    公开(公告)号:US07778089B2

    公开(公告)日:2010-08-17

    申请号:US11775313

    申请日:2007-07-10

    IPC分类号: G11C7/10

    摘要: A write driver control circuit controls operations of a write driver, which amplifies and transmits data of a pair of global input/output lines to a pair of local input/output lines in a write operation. A single type latch section compares states of first and second data of the pair of global input/output lines differentially inputted in a first status and then outputs a first output signal to a first output node; compares states of the first and second data differentially inputted in a second status and then outputs a second output signal to a second output node; and continuously latches states of the first and second output nodes before a precharge operation starts. A precharge controller equalizes and precharges the first and second output nodes in the precharge operation. An output section outputs first and second driver signals and first and second latch signals to control the write driver.

    摘要翻译: 写入驱动器控制电路控制写入驱动器的操作,该写入驱动器在写入操作中将一对全局输入/输出线的数据放大并发送到一对本地输入/输出线。 单个类型的锁存部分比较在第一状态中差分地输入的一对全局输入/输出线的第一和第二数据的状态,然后将第一输出信号输出到第一输出节点; 比较在第二状态下差分输入的第一和第二数据的状态,然后将第二输出信号输出到第二输出节点; 并且在预充电操作开始之前连续锁存第一和第二输出节点的状态。 预充电控制器在预充电操作中对第一和第二输出节点进行均衡和预充电。 输出部分输出第一和第二驱动器信号以及第一和第二锁存信号以控制写入驱动器。

    Memory system
    5.
    发明授权
    Memory system 有权
    内存系统

    公开(公告)号:US08817566B2

    公开(公告)日:2014-08-26

    申请号:US13340868

    申请日:2011-12-30

    IPC分类号: G11C7/00 G11C11/406

    摘要: A memory system includes: a controller configured to provide a hidden auto refresh command; and a memory configured to perform a refresh operation in response to the hidden auto refresh command. The controller and the memory communicate with each other so that each refresh address of the controller and the memory has the same value as each other.

    摘要翻译: 存储器系统包括:控制器,被配置为提供隐藏的自动刷新命令; 以及被配置为响应于所述隐藏的自动刷新命令执行刷新操作的存储器。 控制器和存储器彼此通信,使得控制器和存储器的每个刷新地址彼此具有相同的值。

    P-type semiconductor device comprising type-2 quantum well and fabrication method thereof
    6.
    发明授权
    P-type semiconductor device comprising type-2 quantum well and fabrication method thereof 有权
    包括2型量子阱的P型半导体器件及其制造方法

    公开(公告)号:US08586964B2

    公开(公告)日:2013-11-19

    申请号:US12911560

    申请日:2010-10-25

    IPC分类号: H01L29/15

    摘要: Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.

    摘要翻译: 本文公开了使用具有不同电子亲和性或带隙的半导体形成的2型量子阱和使用该2DHG的高速p型半导体器件来生成二维空穴气体(2DHG)的方法。 为此,该方法包括提供半导体衬底; 在所述半导体衬底上生长第一半导体层,在所述第一半导体层上生长具有与所述第一半导体层不同的电子亲和性或带隙的第二半导体层,以及生长具有与所述第一半导体层不同的电子亲和性或带隙的第三半导体层 第二半导体层,从而形成2型量子阱; 并在2型量子阱附近形成p型掺杂层,从而生成2DHG。

    Address counting circuit and semiconductor memory apparatus using the same
    7.
    发明授权
    Address counting circuit and semiconductor memory apparatus using the same 失效
    地址计数电路和使用其的半导体存储装置

    公开(公告)号:US07911875B2

    公开(公告)日:2011-03-22

    申请号:US12345199

    申请日:2008-12-29

    IPC分类号: G11C8/00

    CPC分类号: G11C29/20 G11C8/04

    摘要: An address counting circuit includes a counter configured to sequentially count from an initial address in response to a clock signal in order to output counted addresses. The address counting circuit also includes a code conversion unit that is configured to output converted addresses such that only one address bit of the converted addresses with respect to the previous converted addresses are toggled to output the converted addresses. The converted addresses output form the code conversion unit do not overlap with one another.

    摘要翻译: 地址计数电路包括被配置为响应于时钟信号从初始地址顺序计数以计数地址的计数器。 地址计数电路还包括代码转换单元,其被配置为输出转换的地址,使得相对于先前转换的地址仅转换地址的一个地址位被切换以输出转换的地址。 从代码转换单元输出的转换地址不会彼此重叠。

    System, medium, and method to conduce a user's breathing
    8.
    发明申请
    System, medium, and method to conduce a user's breathing 有权
    系统,媒介和方法来引导用户的呼吸

    公开(公告)号:US20070167855A1

    公开(公告)日:2007-07-19

    申请号:US11603015

    申请日:2006-11-22

    IPC分类号: A61B5/08

    摘要: A system, medium, and method conducing a user's breathing, in which a sound generated during a user's exhale and/or an ambient temperature change occurring during the exhale is sensed to measure a respiratory waveform of the user. Respiratory information of the user may then be produced from the respiratory waveform, and when the respiratory information of the user is different from normal respiratory information of the user, breathing information according to the normal respiratory information may be provided to the user so the user can use the same to modify their breathing.

    摘要翻译: 感测用户呼吸期间产生的声音和/或在呼出期间发生的环境温度变化的声音的系统,介质和方法,以测量用户的呼吸波形。 然后可以从呼吸波形产生用户的呼吸信息,并且当用户的呼吸信息不同于用户的正常呼吸信息时,可以向用户提供根据正常呼吸信息的呼吸信息,以便用户可以 使用相同的方式修改呼吸。

    System, medium, and method to conduce a user's breathing
    9.
    发明授权
    System, medium, and method to conduce a user's breathing 有权
    系统,媒介和方法来引导用户的呼吸

    公开(公告)号:US08491489B2

    公开(公告)日:2013-07-23

    申请号:US11603015

    申请日:2006-11-22

    IPC分类号: A61B5/08

    摘要: A system, medium, and method conducing a user's breathing, in which a sound generated during a user's exhale and/or an ambient temperature change occurring during the exhale is sensed to measure a respiratory waveform of the user. Respiratory information of the user may then be produced from the respiratory waveform, and when the respiratory information of the user is different from normal respiratory information of the user, breathing information according to the normal respiratory information may be provided to the user so the user can use the same to modify their breathing.

    摘要翻译: 感测用户呼吸期间产生的声音和/或在呼出期间发生的环境温度变化的声音的系统,介质和方法,以测量用户的呼吸波形。 然后可以从呼吸波形产生用户的呼吸信息,并且当用户的呼吸信息不同于用户的正常呼吸信息时,可以向用户提供根据正常呼吸信息的呼吸信息,以便用户可以 使用相同的方式修改呼吸。

    Semiconductor memory apparatus and test method thereof
    10.
    发明授权
    Semiconductor memory apparatus and test method thereof 有权
    半导体存储器及其测试方法

    公开(公告)号:US08300496B2

    公开(公告)日:2012-10-30

    申请号:US12948874

    申请日:2010-11-18

    IPC分类号: G11C8/18 G11C8/16 G11C7/00

    摘要: A semiconductor memory apparatus includes a clock control unit configured to receive a first clock when an enable signal is activated and generate a second clock which has a cycle closer in length to a target clock cycle than the first clock; a DLL input clock generation unit configured to output one of the first clock and the second clock as a DLL input clock according to a DLL select signal; and an address/command input clock generation unit configured to output one of the first clock and the second clock as an AC input clock according to the enable signal.

    摘要翻译: 一种半导体存储装置,包括:时钟控制单元,被配置为当使能信号被激活时接收第一时钟,并产生具有与第一时钟相对于目标时钟周期更长的周期的第二时钟; DLL输入时钟生成单元,被配置为根据DLL选择信号将第一时钟和第二时钟中的一个作为DLL输入时钟输出; 以及地址/命令输入时钟生成单元,被配置为根据使能信号将第一时钟和第二时钟中的一个作为AC输入时钟输出。