Semiconductor integrated circuit device having MIM capacitor and method of fabricating the same
    2.
    发明授权
    Semiconductor integrated circuit device having MIM capacitor and method of fabricating the same 有权
    具有MIM电容器的半导体集成电路器件及其制造方法

    公开(公告)号:US08389355B2

    公开(公告)日:2013-03-05

    申请号:US12984823

    申请日:2011-01-05

    IPC分类号: H01L21/8234

    CPC分类号: H01L27/0629 H01L28/60

    摘要: In a semiconductor integrated circuit device and a method of formation thereof, a semiconductor device comprises: a semiconductor substrate; an insulator at a top portion of the substrate, defining an insulator region; a conductive layer pattern on the substrate, the conductive layer pattern being patterned from a common conductive layer, the conductive layer pattern including a first pattern portion on the insulator in the insulator region and a second pattern portion on the substrate in an active region of the substrate, wherein the second pattern portion comprises a gate of a transistor in the active region; and a capacitor on the insulator in the insulator region, the capacitor including: a lower electrode on the first pattern portion of the conductive layer pattern, a dielectric layer pattern on the lower electrode, and an upper electrode on the dielectric layer pattern.

    摘要翻译: 在半导体集成电路器件及其形成方法中,半导体器件包括:半导体衬底; 绝缘体,位于衬底的顶部,限定绝缘体区域; 在基板上的导电层图案,所述导电层图案从公共导电层图案化,所述导电层图案包括位于绝缘体区域中的绝缘体上的第一图案部分和位于所述绝缘体区域的有源区域中的第二图案部分 衬底,其中所述第二图案部分包括所述有源区中的晶体管的栅极; 以及在所述绝缘体区域中的绝缘体上的电容器,所述电容器包括:在所述导电层图案的所述第一图案部分上的下电极,所述下电极上的电介质层图案,以及所述电介质层图案上的上电极。

    Method of Forming Metal Oxide and Apparatus for Performing the Same
    3.
    发明申请
    Method of Forming Metal Oxide and Apparatus for Performing the Same 审中-公开
    形成金属氧化物的方法及其执行装置

    公开(公告)号:US20100170441A1

    公开(公告)日:2010-07-08

    申请号:US12729973

    申请日:2010-03-23

    IPC分类号: H01L21/46

    摘要: In a method and an apparatus for forming metal oxide on a substrate, a source gas including metal precursor flows along a surface of the substrate to form a metal precursor layer on the substrate. An oxidizing gas including ozone flows along a surface of the metal precursor layer to oxidize the metal precursor layer so that the metal oxide is formed on the substrate. A radio frequency power is applied to the oxidizing gas flowing along the surface of the metal precursor layer to accelerate a reaction between the metal precursor layer and the oxidizing gas. Acceleration of the oxidation reaction may improve electrical characteristics and uniformity of the metal oxide.

    摘要翻译: 在基板上形成金属氧化物的方法和装置中,包括金属前体的源气体沿着基板的表面流动,以在基板上形成金属前体层。 包括臭氧的氧化气体沿着金属前体层的表面流动,以氧化金属前体层,从而在基板上形成金属氧化物。 对沿着金属前体层的表面流动的氧化气体施加射频功率,以加速金属前体层与氧化气体的反应。 氧化反应的加速可以改善金属氧化物的电特性和均匀性。

    Semiconductor integrated circuit device having MIM capacitor and method of fabricating the same
    4.
    发明申请
    Semiconductor integrated circuit device having MIM capacitor and method of fabricating the same 有权
    具有MIM电容器的半导体集成电路器件及其制造方法

    公开(公告)号:US20070267705A1

    公开(公告)日:2007-11-22

    申请号:US11588575

    申请日:2006-10-27

    IPC分类号: H01L29/94 H01L21/8234

    CPC分类号: H01L27/0629 H01L28/60

    摘要: In a semiconductor integrated circuit device and a method of formation thereof, a semiconductor device comprises: a semiconductor substrate; an insulator at a top portion of the substrate, defining an insulator region; a conductive layer pattern on the substrate, the conductive layer pattern being patterned from a common conductive layer, the conductive layer pattern including a first pattern portion on the insulator in the insulator region and a second pattern portion on the substrate in an active region of the substrate, wherein the second pattern portion comprises a gate of a transistor in the active region; and a capacitor on the insulator in the insulator region, the capacitor including: a lower electrode on the first pattern portion of the conductive layer pattern, a dielectric layer pattern on the lower electrode, and an upper electrode on the dielectric layer pattern.

    摘要翻译: 在半导体集成电路器件及其形成方法中,半导体器件包括:半导体衬底; 绝缘体,位于衬底的顶部,限定绝缘体区域; 在基板上的导电层图案,所述导电层图案从公共导电层图案化,所述导电层图案包括位于绝缘体区域中的绝缘体上的第一图案部分和位于所述绝缘体区域的有源区域中的第二图案部分 衬底,其中所述第二图案部分包括所述有源区中的晶体管的栅极; 以及在所述绝缘体区域中的绝缘体上的电容器,所述电容器包括:在所述导电层图案的所述第一图案部分上的下电极,所述下电极上的电介质层图案,以及所述电介质层图案上的上电极。

    Semiconductor integrated circuit device and method of fabricating the same
    5.
    发明授权
    Semiconductor integrated circuit device and method of fabricating the same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号:US08809999B2

    公开(公告)日:2014-08-19

    申请号:US12704339

    申请日:2010-02-11

    IPC分类号: H01L29/72

    CPC分类号: H01L28/40 H01L28/56 H01L28/65

    摘要: A semiconductor integrated circuit device includes a lower electrode formed on a substrate, a first dielectric layer formed of a metal nitride layer, a metal oxynitride layer, or a combination thereof, on the lower electrode, a second dielectric layer formed on the first dielectric layer that includes a zirconium oxide layer, and an upper electrode formed on the second dielectric layer.

    摘要翻译: 一种半导体集成电路器件,包括在下电极上形成的下电极,由金属氮化物层形成的第一电介质层,金属氮氧化物层或其组合,形成在第一介电层上的第二电介质层 其包括氧化锆层和形成在第二介电层上的上电极。

    Methods of manufacturing semiconductor devices
    6.
    发明申请
    Methods of manufacturing semiconductor devices 有权
    制造半导体器件的方法

    公开(公告)号:US20090246949A1

    公开(公告)日:2009-10-01

    申请号:US12383810

    申请日:2009-03-27

    IPC分类号: H01L21/28 H01L21/283

    摘要: In a semiconductor device and a method of manufacturing a semiconductor device, a lower electrode is formed on a semiconductor substrate. A first zirconium oxide layer is formed on the lower electrode by performing a first deposition process using a first zirconium source and a first oxidizing gas. A zirconium carbo-oxynitride layer is formed on the first zirconium oxide layer by performing a second deposition process using a second zirconium source, a second oxidizing gas and a nitriding gas, and an upper electrode is formed on the zirconium carbo-oxynitride layer. A zirconium oxide-based composite layer having a high dielectric constant and a thin equivalent oxide thickness can be obtained.

    摘要翻译: 在半导体器件和半导体器件的制造方法中,在半导体衬底上形成下电极。 通过使用第一锆源和第一氧化气体进行第一沉积工艺,在下电极上形成第一氧化锆层。 通过使用第二锆源,第二氧化气体和氮化气体进行第二沉积工艺,在第一氧化锆层上形成锆碳氮化钛层,并且在碳氮氧化锆层上形成上电极。 可以获得具有高介电常数和薄当量氧化物厚度的氧化锆基复合层。

    Method of forming a ZrO2 thin film using plasma enhanced atomic layer deposition and method of fabricating a capacitor of a semiconductor memory device having the thin film
    7.
    发明授权
    Method of forming a ZrO2 thin film using plasma enhanced atomic layer deposition and method of fabricating a capacitor of a semiconductor memory device having the thin film 失效
    使用等离子体增强原子层沉积法形成ZrO 2薄膜的方法以及制造具有薄膜的半导体存储器件的电容器的方法

    公开(公告)号:US07491654B2

    公开(公告)日:2009-02-17

    申请号:US11485523

    申请日:2006-07-13

    摘要: Example embodiments of the present invention relate to a method of forming a dielectric thin film and a method of fabricating a semiconductor memory device having the same. Other example embodiments of the present invention relate to a method of forming a ZrO2 thin film and a method of fabricating a capacitor of a semiconductor memory device using the ZrO2 thin film as a dielectric layer. A method of forming a ZrO2 thin film may include supplying a zirconium precursor on a substrate maintained at a desired temperature, thereby forming a chemisorption layer of the precursor on the substrate. The zirconium precursor may be a tris(N-ethyl-N-methylamino)(tert-butoxy) zirconium precursor. The substrate having the chemisorption layer of the precursor may be exposed to the plasma atmosphere of oxygen-containing gas for a desired time, thereby forming a Zr oxide layer on the substrate, and a method of fabricating a capacitor of a semiconductor memory device having the ZrO2 thin film.

    摘要翻译: 本发明的示例性实施例涉及一种形成电介质薄膜的方法及其制造具有该电介质薄膜的半导体存储器件的方法。 本发明的其他示例性实施例涉及形成ZrO 2薄膜的方法以及使用该ZrO 2薄膜作为电介质层制造半导体存储器件的电容器的方法。 形成ZrO 2薄膜的方法可以包括在保持在所需温度的基板上提供锆前体,由此在基板上形成前体的化学吸附层。 锆前体可以是三(N-乙基-N-甲基氨基)(叔丁氧基)锆前体。 具有前体的化学吸附层的基板可以暴露于含氧气体的等离子体气氛所需的时间,从而在基板上形成Zr氧化物层,以及制造半导体存储器件的电容器的方法,其具有 ZrO2薄膜。

    Integrated Circuit Devices Including Recessed Conductive Layers and Related Methods
    8.
    发明申请
    Integrated Circuit Devices Including Recessed Conductive Layers and Related Methods 审中-公开
    包含嵌入式导电层的集成电路器件及相关方法

    公开(公告)号:US20090001437A1

    公开(公告)日:2009-01-01

    申请号:US12142057

    申请日:2008-06-19

    IPC分类号: H01L27/108 H01L21/8242

    摘要: An integrated circuit device may include a first insulating layer on a substrate with an opening through the first insulating layer. A conductive layer may be on the first insulating layer with the first insulating layer between the conductive layer and the substrate and with the conductive layer set back from the opening. A second insulating layer may be on the conductive layer with the conductive layer between the first and second insulating layers. The second insulating layer may be set back from the opening, and a sidewall of the conductive layer adjacent the opening may be recessed relative to a sidewall of the second insulating layer adjacent the opening. An insulating spacer on portions of the first insulating layer may surround the opening, and the insulating spacer may be on the sidewall of the second insulating layer adjacent the opening so that the insulating spacer is between the sidewall of the second conductive layer and the opening. A conductive contact may be in the opening through the first insulating layer and on portions of the insulating spacer so that the insulating spacer is between the conductive contact and the conductive layer. Related methods are also discussed.

    摘要翻译: 集成电路器件可以包括在基板上的具有穿过第一绝缘层的开口的第一绝缘层。 导电层可以在第一绝缘层上,其中第一绝缘层在导电层和衬底之间,并且导电层从开口退回。 第二绝缘层可以在导电层上,导电层位于第一和第二绝缘层之间。 第二绝缘层可以从开口回放,并且邻近开口的导电层的侧壁可以相对于邻近开口的第二绝缘层的侧壁凹陷。 第一绝缘层的部分上的绝缘隔离物可以围绕开口,并且绝缘间隔物可以在与开口相邻的第二绝缘层的侧壁上,使得绝缘间隔物位于第二导电层的侧壁和开口之间。 导电接触可以在通过第一绝缘层的开口中和绝缘间隔物的部分上,使得绝缘间隔物在导电接触和导电层之间。 还讨论了相关方法。

    Methods of forming a semiconductor device
    9.
    发明申请
    Methods of forming a semiconductor device 审中-公开
    形成半导体器件的方法

    公开(公告)号:US20070264821A1

    公开(公告)日:2007-11-15

    申请号:US11785305

    申请日:2007-04-17

    IPC分类号: H01L21/44

    CPC分类号: H01L21/32051 H01L28/75

    摘要: A method of forming a semiconductor device may include forming a first conductive metal compound layer on a substrate using a metal organic chemical vapor deposition (MOCVD) process and/or forming a second conductive metal compound layer on the first conductive metal compound layer using a physical vapor deposition (PVD) process. The first and second conductive metal compound layers may be formed while reducing or preventing the exposure of the first conductive metal compound layer to oxygen atoms, thus reducing degradation of the first conductive metal compound layer.

    摘要翻译: 形成半导体器件的方法可以包括:使用金属有机化学气相沉积(MOCVD)工艺在衬底上形成第一导电金属化合物层和/或在第一导电金属化合物层上形成第二导电金属化合物层,使用物理 气相沉积(PVD)工艺。 可以在减少或防止第一导电金属化合物层暴露于氧原子的同时形成第一和第二导电金属化合物层,从而减少第一导电金属化合物层的劣化。

    Semiconductor Integrated Circuit Device and Method of Fabricating the Same
    10.
    发明申请
    Semiconductor Integrated Circuit Device and Method of Fabricating the Same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号:US20100207247A1

    公开(公告)日:2010-08-19

    申请号:US12704339

    申请日:2010-02-11

    IPC分类号: H01L29/92

    CPC分类号: H01L28/40 H01L28/56 H01L28/65

    摘要: A semiconductor integrated circuit device includes a lower electrode formed on a substrate, a first dielectric layer formed of a metal nitride layer, a metal oxynitride layer, or a combination thereof, on the lower electrode, a second dielectric layer formed on the first dielectric layer that includes a zirconium oxide layer, and an upper electrode formed on the second dielectric layer.

    摘要翻译: 一种半导体集成电路器件,包括在下电极上形成的下电极,由金属氮化物层形成的第一电介质层,金属氮氧化物层或其组合,形成在第一介电层上的第二电介质层 其包括氧化锆层和形成在第二介电层上的上电极。