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公开(公告)号:US20110068427A1
公开(公告)日:2011-03-24
申请号:US12562387
申请日:2009-09-18
申请人: Jong Sik PAEK , In Bae PARK , Chang Deok LEE
发明人: Jong Sik PAEK , In Bae PARK , Chang Deok LEE
IPC分类号: H01L31/0203 , H01L23/498 , H01L21/98
CPC分类号: H01L25/0657 , H01L21/56 , H01L23/3114 , H01L23/3121 , H01L23/481 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/73 , H01L24/82 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/0655 , H01L25/50 , H01L2224/0401 , H01L2224/04105 , H01L2224/11334 , H01L2224/11849 , H01L2224/12105 , H01L2224/131 , H01L2224/16146 , H01L2224/16225 , H01L2224/17181 , H01L2224/221 , H01L2224/24051 , H01L2224/24105 , H01L2224/24226 , H01L2224/32145 , H01L2224/73203 , H01L2224/73209 , H01L2224/73253 , H01L2224/73259 , H01L2224/73267 , H01L2224/81815 , H01L2224/82106 , H01L2224/94 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06582 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/10329 , H01L2924/00012 , H01L2224/81 , H01L2224/82 , H01L2224/83
摘要: A stackable wafer level package and a fabricating method thereof are disclosed. In the stackable wafer level package, bond pads (or redistribution layers) are arranged on a bottom semiconductor die, and metal pillars are formed on some of the bond pads positioned around the edges of the bottom semiconductor die. A top semiconductor die is electrically connected to the other bond pads, on which the metal pillars are not formed, positioned around the center of the bottom semiconductor die through conductive bumps. The metal pillars and the top semiconductor die are encapsulated by an encapsulant. A plurality of interconnection patterns electrically connected to the metal pillars are formed on the surface of the encapsulant. Solder balls are attached to the interconnection patterns. Due to this stack structure, the wafer level package is reduced in thickness and footprint. Therefore, the wafer level package is highly suitable for mobile applications.
摘要翻译: 公开了一种可堆叠的晶片级封装及其制造方法。 在可堆叠晶片级封装中,接合焊盘(或再分配层)被布置在底部半导体管芯上,并且金属柱形成在位于底部半导体管芯的边缘周围的一些接合焊盘上。 顶部半导体管芯电连接到其上未形成金属柱的其它接合焊盘,通过导电凸块定位在底部半导体管芯的中心附近。 金属柱和顶部半导体管芯由密封剂封装。 电连接到金属柱的多个互连图案形成在密封剂的表面上。 焊球附接到互连图案。 由于这种堆叠结构,晶片级封装的厚度和占地面积减小。 因此,晶片级封装非常适合于移动应用。