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    Method of forming a contact in a semiconductor device
    1.
    发明授权
    Method of forming a contact in a semiconductor device 失效
    在半导体器件中形成接触的方法

    公开(公告)号：US06905960B2

    公开(公告)日：2005-06-14

    申请号：US10657140

    申请日：2003-09-09

    申请人： Hong-Mi Park ,  Jong-Sik Chun ,  Hyeon-Deok Lee ,  In-Sun Park ,  Jong-Myeong Lee ,  Ju-Cheol Shin

    发明人： Hong-Mi Park ,  Jong-Sik Chun ,  Hyeon-Deok Lee ,  In-Sun Park ,  Jong-Myeong Lee ,  Ju-Cheol Shin

    IPC分类号： H01L21/28 ,  H01L21/768 ,  H01L21/44

    CPC分类号： H01L21/76877 ,  H01L21/76843 ,  H01L21/76871

    摘要： In a method of forming a contact in a semiconductor device, an insulating layer is formed on the semiconductor substrate. Then, a contact hole is formed by selectively etching the insulating layer. A barrier metal layer is deposited on side and bottom surfaces of the contact hole and on a top surface of the insulating layer to a uniform thickness. A wetting layer of an oxidation-resistive metal material is deposited on the barrier metal layer. A metal layer is formed on the wetting layer and fills the contact hole to thereby form a contact in the semiconductor device.

    摘要翻译： 在半导体器件中形成接触的方法中，在半导体衬底上形成绝缘层。 然后，通过选择性地蚀刻绝缘层形成接触孔。 阻挡金属层沉积在接触孔的侧表面和底表面上，并且在绝缘层的顶表面上沉积到均匀的厚度。 在阻挡金属层上沉积抗氧化金属材料的润湿层。 在润湿层上形成金属层，并填充接触孔，从而在半导体器件中形成接触。

    Methods for forming aluminum metal wirings
    2.
    发明授权
    Methods for forming aluminum metal wirings 有权
    铝金属布线形成方法

    公开(公告)号：US06673718B1

    公开(公告)日：2004-01-06

    申请号：US10305244

    申请日：2002-11-27

    申请人： Jong-Myeong Lee ,  In-Sun Park ,  Hyeon-Deok Lee ,  Jong-Sik Chun

    发明人： Jong-Myeong Lee ,  In-Sun Park ,  Hyeon-Deok Lee ,  Jong-Sik Chun

    IPC分类号： H01L2144

    CPC分类号： H01L21/76843 ,  H01L21/76856 ,  H01L21/76876 ,  H01L21/76879 ,  H01L21/76882 ,  H01L2221/1089

    摘要： An aluminum wiring is selectively formed within a contact hole or groove of a substrate. An intermediate layer which includes nitrogen is formed over the main surface of a substrate and over the interior surface of the contact hole or groove. A first surface portion of the intermediate layer which is located over the main surface of the substrate is treated with a plasma to form a passivity layer at the first surface portion of the intermediate layer. Then, without an intervening vacuum break, an aluminum film is CAD deposited only over a second surface portion of the intermediate layer which is located over the interior surface of the contact hole or recess. The plasma treatment of the first surface portion of the intermediate layer prevents the CAD deposition of the aluminum film over the first surface portion of the intermediate layer.

    摘要翻译： 在基板的接触孔或凹槽内选择性地形成铝布线。 包含氮的中间层形成在基板的主表面上并在接触孔或凹槽的内表面上方。 用等离子体处理位于基板的主表面上方的中间层的第一表面部分，以在中间层的第一表面部分处形成被动层。 然后，没有中间真空断裂，铝膜仅沉积在中间层的位于接触孔或凹槽的内表面上方的第二表面部分上。 中间层的第一表面部分的等离子体处理防止铝膜在中间层的第一表面部分上的CAD沉积。

    Methods of fabricating integrated circuit conductive contact structures including grooves
    5.
    发明授权
    Methods of fabricating integrated circuit conductive contact structures including grooves 有权
    制造集成电路导电接触结构包括沟槽的方法

    公开(公告)号：US07122468B2

    公开(公告)日：2006-10-17

    申请号：US11039562

    申请日：2005-01-20

    申请人： Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    发明人： Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    IPC分类号： H01L21/4763

    CPC分类号： H01L27/10894 ,  H01L21/76877 ,  H01L23/5226 ,  H01L27/10817 ,  H01L27/10885 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.

    摘要翻译： 集成电路包括衬底和衬底上的第一绝缘层，其包括包括地板和侧壁的第一孔。 第一导电接触件在侧壁和底板上保形地延伸以在第一孔中限定凹槽。 第二绝缘层设置在第一绝缘层上，并且包括露出槽的第二孔。 在第二孔和凹槽中设置第二导电接触。 这些集成电路通过在基板上形成第一绝缘层来制造，所述第一绝缘层包括包括地板和侧壁的第一孔。 第一导电接触共形地形成在侧壁和地板上以在第一孔中限定凹槽。 第二绝缘层形成在第一绝缘层上，并且包括暴露槽的第二孔。 在第二孔和槽中形成第二导电接触。

    Methods of forming storage capacitors for semiconductor devices
    6.
    发明授权
    Methods of forming storage capacitors for semiconductor devices 有权
    形成半导体器件的储存电容器的方法

    公开(公告)号：US07364967B2

    公开(公告)日：2008-04-29

    申请号：US11266520

    申请日：2005-11-03

    申请人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

    发明人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

    IPC分类号： H01L21/8242

    CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

    摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

    摘要翻译： 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分 在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

    STORAGE CAPACITORS FOR SEMICONDUCTOR DEVICES
    7.
    发明申请
    STORAGE CAPACITORS FOR SEMICONDUCTOR DEVICES 审中-公开
    半导体器件存储电容器

    公开(公告)号：US20080185624A1

    公开(公告)日：2008-08-07

    申请号：US12100042

    申请日：2008-04-09

    申请人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

    发明人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

    IPC分类号： H01L29/94

    CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

    摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening there through on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

    摘要翻译： 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模制氧化物层，选择性地去除部分 模制氧化物层以在接触塞上方形成凹陷，在凹陷的底表面和侧表面上形成钛层，在钛层上形成氮化钛层，并在氮化钛层上形成氮氧化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

    Methods of fabricating integrated circuit conductive contact structures including grooves
    9.
    发明申请
    Methods of fabricating integrated circuit conductive contact structures including grooves 有权
    制造集成电路导电接触结构包括沟槽的方法

    公开(公告)号：US20050121755A1

    公开(公告)日：2005-06-09

    申请号：US11039562

    申请日：2005-01-20

    申请人： Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    发明人： Ju-Cheol Shin ,  Hyeon-Deok Lee ,  Hong-Mi Park ,  In-Sun Park

    IPC分类号： H01L21/768 ,  H01L21/8242 ,  H01L23/522 ,  H01L27/108 ,  H01L23/495

    CPC分类号： H01L27/10894 ,  H01L21/76877 ,  H01L23/5226 ,  H01L27/10817 ,  H01L27/10885 ,  H01L27/10897 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An integrated circuit includes a substrate and a first insulating layer on the substrate that includes a first hole including a floor and a sidewall. A first conductive contact extends conformally on the sidewall and floor to define a groove in the first hole. A second insulating layer is provided on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is provided in the second hole and in the groove. These integrated circuits are fabricated by forming a first insulating layer on a substrate that includes a first hole including a floor and a sidewall. A first conductive contact is conformally formed on the sidewall and floor to define a groove in the first hole. A second insulating layer is formed on the first insulating layer and includes a second hole that exposes the groove. A second conductive contact is formed in the second hole and in the groove.

    摘要翻译： 集成电路包括衬底和衬底上的第一绝缘层，其包括包括地板和侧壁的第一孔。 第一导电接触件在侧壁和底板上保形地延伸以在第一孔中限定凹槽。 第二绝缘层设置在第一绝缘层上，并且包括露出槽的第二孔。 在第二孔和凹槽中设置第二导电接触。 这些集成电路通过在基板上形成第一绝缘层来制造，所述第一绝缘层包括包括地板和侧壁的第一孔。 第一导电接触共形地形成在侧壁和地板上以在第一孔中限定凹槽。 第二绝缘层形成在第一绝缘层上，并且包括暴露槽的第二孔。 在第二孔和槽中形成第二导电接触。