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    Self aligning non contact shadow ring process kit
    2.
    发明授权
    Self aligning non contact shadow ring process kit 有权
    自对准非接触阴影环工艺套件

    公开(公告)号：US06589352B1

    公开(公告)日：2003-07-08

    申请号：US09459313

    申请日：1999-12-10

    申请人： Joseph Yudovsky ,  Lawrence C. Lei ,  Salvador Umotoy ,  Tom Madar ,  Girish Dixit ,  Gwo-Chuan Tzu

    发明人： Joseph Yudovsky ,  Lawrence C. Lei ,  Salvador Umotoy ,  Tom Madar ,  Girish Dixit ,  Gwo-Chuan Tzu

    IPC分类号： C23C1600

    CPC分类号： C23C16/4585 ,  C30B25/12 ,  C30B31/14

    摘要： The invention provides a removable first edge ring configured for pin and recess/slot coupling with a second edge ring disposed on the substrate support. In one embodiment, a first edge ring includes a plurality of pins, and a second edge ring includes one or more alignment recesses and one or more alignment slots for mating engagement with the pins. Each of the alignment recesses and alignment slots are at least as wide as the corresponding pins, and each of the alignment slots extends in the radial direction a length that is sufficient to compensate for the difference in thermal expansion between the first edge ring and the second edge ring.

    摘要翻译： 本发明提供了可拆卸的第一边缘环，其被配置用于与设置在基板支撑件上的第二边缘环的销和凹槽/狭槽联接。 在一个实施例中，第一边缘环包括多个销，并且第二边缘环包括一个或多个对准凹槽和用于与销配合接合的一个或多个对准槽。 每个对准凹槽和对准槽至少与相应的销一样宽，并且每个对准槽在径向方向上延伸的长度足以补偿第一边缘环和第二边缘之间的热膨胀差 边缘环。

    SELF ALIGNING NON CONTACT SHADOW RING PROCESS KIT
    3.
    发明申请
    SELF ALIGNING NON CONTACT SHADOW RING PROCESS KIT 有权
    自动对准非接触阴影环工艺包

    公开(公告)号：US20080072823A1

    公开(公告)日：2008-03-27

    申请号：US11870285

    申请日：2007-10-10

    申请人： Joseph Yudovsky ,  Lawrence Lei ,  Salvador Umotoy ,  Tom Madar ,  Girish Dixit ,  Gwo-Chuan Tzu

    发明人： Joseph Yudovsky ,  Lawrence Lei ,  Salvador Umotoy ,  Tom Madar ,  Girish Dixit ,  Gwo-Chuan Tzu

    IPC分类号： C23C16/458

    CPC分类号： C23C16/4585 ,  C30B25/12 ,  C30B31/14

    摘要： The invention provides a removable first edge ring configured for pin and recess/slot coupling with a second edge ring disposed on the substrate support. In one embodiment, a first edge ring includes a plurality of pins, and a second edge ring includes one or more alignment recesses and one or more alignment slots for mating engagement with the pins. Each of the alignment recesses and alignment slots are at least as wide as the corresponding pins, and each of the alignment slots extends in the radial direction a length that is sufficient to compensate for the difference in thermal expansion between the first edge ring and the second edge ring.

    摘要翻译： 本发明提供了可拆卸的第一边缘环，其被配置用于与设置在基板支撑件上的第二边缘环的销和凹槽/狭槽联接。 在一个实施例中，第一边缘环包括多个销，并且第二边缘环包括一个或多个对准凹槽和用于与销配合接合的一个或多个对准槽。 每个对准凹槽和对准槽至少与相应的销一样宽，并且每个对准槽在径向方向上延伸的长度足以补偿第一边缘环和第二边缘之间的热膨胀差 边缘环。

    SOLID STATE FORMS OF PALIPERIDONE SALTS AND PROCESS FOR THE PREPARATION THEREOF
    4.
    发明申请
    SOLID STATE FORMS OF PALIPERIDONE SALTS AND PROCESS FOR THE PREPARATION THEREOF 审中-公开
    PALIPERIDONE SALTS的固体状态及其制备方法

    公开(公告)号：US20120100188A1

    公开(公告)日：2012-04-26

    申请号：US13318664

    申请日：2010-05-25

    申请人： Girish Dixit ,  Anil Shahaji Khile ,  Vignesh Nair ,  Nitin Sharadechandra Pradhan

    发明人： Girish Dixit ,  Anil Shahaji Khile ,  Vignesh Nair ,  Nitin Sharadechandra Pradhan

    IPC分类号： A61K31/519 ,  A61K9/14 ,  C07D471/04

    CPC分类号： C07D471/04

    摘要： Provided herein are solid state forms of paliperidone salts, processes for preparation, pharmaceutical compositions, and method of treating thereof. Paliperidone is represented by the following structural formula (I): More particularly, provided are solid state forms of paliperidone acid addition salts, wherein the acid counter ion is provided by an acid selected from the group consisting of L-(+)-tartaric acid, p-toluenesulfonic acid, maleic acid, oxalic acid, fumaric acid, acetic acid and malic acid. Provided also herein is a process for preparing substantially pure paliperidone free base using the solid state forms of paliperidone salts.

    摘要翻译： 本文提供的是利培酮盐的固态形式，制备方法，药物组合物及其处理方法。 哌啶酮由以下结构式（I）表示：更具体地说，提供了帕培酮酸加成盐的固态形式，其中酸抗衡离子由选自下列的酸提供：L-（+） - 酒石酸 ，对甲苯磺酸，马来酸，草酸，富马酸，乙酸和苹果酸。 本文还提供了使用固体形式的利培培酮盐制备基本上纯的利培酮游离碱的方法。

    QUETIAPINE SALTS AND THEIR POLYMORPHS
    6.
    发明申请
    QUETIAPINE SALTS AND THEIR POLYMORPHS 失效
    QUETIAPINE SALTS及其POLYMORPHS

    公开(公告)号：US20100278878A1

    公开(公告)日：2010-11-04

    申请号：US12599085

    申请日：2008-05-07

    申请人： Girish Dixit ,  Anil Shahaji Khile ,  Jayesh Laljibhai Patel ,  Nitin Sharadchandra Pradhan ,  Jon Valgeirsson

    发明人： Girish Dixit ,  Anil Shahaji Khile ,  Jayesh Laljibhai Patel ,  Nitin Sharadchandra Pradhan ,  Jon Valgeirsson

    IPC分类号： A61K31/554 ,  C07D417/04 ,  A61K9/14 ,  A61P25/00

    CPC分类号： C07D281/14

    摘要： The present invention relates to novel and stable salt forms of quetiapine, processes for preparation, pharmaceutical compositions, and method of treating thereof. More particularly, the present invention provides novel acid addition salts of quetiapine wherein the acid counter ion is provided by an acid selected from the group consisting of benzene sulfonic acid, dibenzoyl-L-(+)-tartaric acid and di-p-toluoyl-L-(+)-tartaric acid. The present invention also provides novel polymorphic forms of quetiapine salts selected from the group consisting of quetiapine hydrobromide, quetiapine sulfate, quetiapine nitrate and quetiapine citrate.

    摘要翻译： 本发明涉及喹硫平的新颖稳定的盐形式，制备方法，药物组合物及其处理方法。 更具体地说，本发明提供了喹硫平的新型酸加成盐，其中酸抗衡离子由选自苯磺酸，二苯甲酰基-L-（+） - 酒石酸和二对甲苯酰基 - L - （+） - 酒石酸。 本发明还提供了选自喹硫平氢溴酸盐，硫酸喹硫平，硝酸喹硫平和柠檬酸喹硫平的新型多晶型盐酸喹硫平盐。

    System, method, and medium for an endpoint detection scheme for copper low-dielectric damascene structures for improved dielectric and copper loss
    7.
    发明申请
    System, method, and medium for an endpoint detection scheme for copper low-dielectric damascene structures for improved dielectric and copper loss 有权
    用于铜低介电镶嵌结构的端点检测方案的系统，方法和介质，用于改善电介质和铜损耗

    公开(公告)号：US20080109104A1

    公开(公告)日：2008-05-08

    申请号：US12004730

    申请日：2007-12-21

    申请人： Ajoy Zutshi ,  Rahul Surana ,  Girish Dixit

    发明人： Ajoy Zutshi ,  Rahul Surana ,  Girish Dixit

    IPC分类号： G06F19/00 ,  G06F3/048 ,  G06F12/00 ,  G06F17/30

    CPC分类号： B24B37/013 ,  B24B49/12 ,  G01N21/55 ,  H01L22/26

    摘要： A system, method and medium of detecting a transition interface between a first dielectric material and an adjacent second dielectric material in a semiconductor wafer during a chemical-mechanical polishing process includes impinging an incident light of a predetermined wavelength on the semiconductor wafer at a first time, detecting at least one first intensity of at least one first reflected light, impinging the incident light of the predetermined wavelength on the semiconductor wafer at a second time, detecting at least one second intensity of at least one second reflected light, and determining a difference between the at least one first intensity and the at least one second intensity. If the difference between the at least one first intensity and the at least one second intensity is above a predetermined threshold, the chemical-mechanical polishing process is terminated.

    摘要翻译： 在化学机械抛光工艺期间检测半导体晶片中的第一介电材料和相邻的第二介电材料之间的过渡界面的系统，方法和介质包括在第一时间在半导体晶片上入射预定波长的入射光 检测至少一个第一强度的至少一个第一反射光，在第二时间将预定波长的入射光照射在半导体晶片上，检测至少一个第二强度的至少一个第二反射光，并确定差异 在所述至少一个第一强度和所述至少一个第二强度之间。 如果所述至少一个第一强度和所述至少一个第二强度之间的差异高于预定阈值，则终止所述化学机械抛光处理。

    Amorphous pregabalin and process for the preparation thereof
    8.
    发明申请
    Amorphous pregabalin and process for the preparation thereof 审中-公开
    无定形普瑞巴林及其制备方法

    公开(公告)号：US20080014280A1

    公开(公告)日：2008-01-17

    申请号：US11879405

    申请日：2007-07-17

    申请人： Bobba Kumar ,  Girish Dixit

    发明人： Bobba Kumar ,  Girish Dixit

    IPC分类号： A61K9/14 ,  A61K31/195 ,  C07C205/51

    CPC分类号： C07C229/08 ,  A61K9/14 ,  A61K9/19 ,  A61K31/195

    摘要： Pregabalin substantially in an amorphous form is disclosed. A composition comprising amorphous pregabalin in a solid form, wherein at least about 80% by weight of the solid is amorphous pregabalin in an amorphous form is also disclosed. The present invention also provides a process for preparing amorphous pregabalin substantially in an amorphous form by providing a solution of amorphous pregabalin in one or more solvents capable of dissolving the pregabalin and substantially removing the solvent from the solution.

    摘要翻译： 公布了基本上为无定形形式的普瑞巴林。 包含固体形式的无定形普瑞巴林的组合物，其中至少约80重量％的固体是无定形形式的无定形普瑞巴林。 本发明还提供了通过在一种或多种能够溶解普瑞巴林并基本上从溶液中除去溶剂的溶剂中提供无定形普瑞巴林溶液来制备基本上为无定形形式的无定形普瑞巴林的方法。

    Chemical mechanical polishing techniques for integrated circuit fabrication
    9.
    发明申请
    Chemical mechanical polishing techniques for integrated circuit fabrication 审中-公开
    用于集成电路制造的化学机械抛光技术

    公开(公告)号：US20070082479A1

    公开(公告)日：2007-04-12

    申请号：US11245677

    申请日：2005-10-06

    申请人： Deenesh Padhi ,  Girish Dixit

    发明人： Deenesh Padhi ,  Girish Dixit

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76843 ,  H01L21/76819 ,  H01L21/7684 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention provides methods for fabricating horizontal interconnect lines for use in semiconductor wafer fabrication. A dielectric layer is deposited on a dielectric stack having a planarized top surface. The dielectric layer is not planarized at this stage of the process. A pre-planarizing thickness profile of the non-planarized dielectric layer is determined and recorded. An interconnect line trench is then etched through the dielectric layer. A sandwich layer including a conductive Cu diffusion barrier layer and a Cu seed layer is deposited in the trench and on the dielectric layer. A Cu comprising metal is deposited in the sandwich lined trench. A Cu metal overburden is thereby deposited on the section of the sandwich layer that is positioned on the dielectric layer. A first CMP process is used to remove the Cu overburden and the Cu seed layer that is formed in the sandwich layer portion on the dielectric layer. A second CMP process is utilized wherein the pre-planarizing thickness profile is employed to remove the Cu barrier layer from the top surface of the dielectric layer, the second CMP process is then continued by planarizing the dielectric layer to form a substantially uniform flat surface having a substantially uniform thickness which is substantially equal to a predetermined design thickness. The second CMP process thereby results in fabricating a dielectric layer wherein substantially all interconnect lines have a substantially uniform thickness that is substantially equal to the design thickness for the dielectric layer.

    摘要翻译： 本发明提供用于制造用于半导体晶片制造的水平互连线的方法。 介电层沉积在具有平坦化顶表面的电介质叠层上。 在该过程的这个阶段，电介质层不被平坦化。 确定并记录非平面化电介质层的预平面化厚度分布。 然后通过介电层蚀刻互连线沟槽。 包含导电性Cu扩散阻挡层和Cu籽晶层的夹层被沉积在沟槽和电介质层上。 包含金属的Cu沉积在夹层衬里的沟槽中。 因此，在位于电介质层上的夹层的部分上沉积Cu金属覆盖层。 使用第一CMP工艺来去除在电介质层上的夹层结构部分中形成的Cu覆盖层和Cu籽晶层。 使用第二CMP工艺，其中使用预平面化厚度轮廓来从电介质层的顶表面去除Cu阻挡层，然后通过平坦化介电层来继续进行第二CMP工艺以形成基本上均匀的平坦表面，其具有 基本均匀的厚度，其基本上等于预定的设计厚度。 因此，第二CMP工艺导致制造介电层，其中基本上所有的互连线具有基本上等于介电层的设计厚度的基本均匀的厚度。

    Method and apparatus for reducing charge density on a dielectric coated substrate after exposure to a large area electron beam
    10.
    发明申请
    Method and apparatus for reducing charge density on a dielectric coated substrate after exposure to a large area electron beam 失效
    用于在暴露于大面积电子束之后降低电介质涂覆的基底上的电荷密度的方法和装置

    公开(公告)号：US20060192150A1

    公开(公告)日：2006-08-31

    申请号：US11414649

    申请日：2006-04-27

    申请人： Alexandros Demos ,  Khaled Elsheref ,  Yuri Trachuk ,  Tom Cho ,  Girish Dixit ,  Hichem M'Saad ,  Derek Witty

    发明人： Alexandros Demos ,  Khaled Elsheref ,  Yuri Trachuk ,  Tom Cho ,  Girish Dixit ,  Hichem M'Saad ,  Derek Witty

    IPC分类号： G21K5/10 ,  H01J37/08

    CPC分类号： H01J37/317 ,  H01J2237/0041

    摘要： Embodiments in accordance with the present invention relate to a number of techniques, which may be applied alone or in combination, to reduce charge damage of substrates exposed to electron beam radiation. In one embodiment, charge damage is reduced by establishing a robust electrical connection between the exposed substrate and ground. In another embodiment, charge damage is reduced by modifying the sequence of steps for activating and deactivating the electron beam source to reduce the accumulation of charge on the substrate. In still another embodiment, a plasma is struck in the chamber containing the e-beam treated substrate, thereby removing accumulated charge from the substrate. In a further embodiment of the present invention, the voltage of the anode of the e-beam source is reduced in magnitude to account for differences in electron conversion efficiency exhibited by different cathode materials.

    摘要翻译： 根据本发明的实施例涉及可以单独或组合应用的多种技术，以减少暴露于电子束辐射的衬底的电荷损伤。 在一个实施例中，通过在暴露的基板和地之间建立牢固的电连接来减小电荷损伤。 在另一个实施例中，通过修改用于激活和去激活电子束源的步骤顺序来减少电荷损伤，以减少电荷在衬底上的累积。 在另一个实施例中，在包含电子束处理的衬底的室中撞击等离子体，从而从衬底去除积聚的电荷。 在本发明的另一个实施例中，电子束源的阳极的电压的大小被减小以考虑到由不同的阴极材料表现的电子转换效率的差异。