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公开(公告)号:US07423316B2
公开(公告)日:2008-09-09
申请号:US11596063
申请日:2005-05-12
申请人: Sachiko Kawaji , Masayasu Ishiko , Takahide Sugiyama , Masanori Usui , Jun Saito , Koji Hotta
发明人: Sachiko Kawaji , Masayasu Ishiko , Takahide Sugiyama , Masanori Usui , Jun Saito , Koji Hotta
IPC分类号: H01L29/94
CPC分类号: H01L29/1095 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: The dense accumulation of hole carriers can be obtained over a wide range of a semiconductor region in a floating state formed within a body region of an IGBT. An n type semiconductor region (52) whose potential is floating is formed within a p− type body region (28). The n type semiconductor region (52) is isolated from an n+ type emitter region (32) and an n− type drift region (26) by the body region (28). Furthermore, a second electrode (62) is formed, so as to oppose to at least a part of the semiconductor region (52) via an insulator film (64). The second electrode (62) does not oppose to the emitter region (32).
摘要翻译: 可以在形成在IGBT的体区内的浮置状态的半导体区域的宽范围内获得空穴载流子的密集堆积。 在p型体区域(28)内形成有浮置电位的n型半导体区域(52)。 n型半导体区域(52)通过身体区域(28)与n + +型发射极区域(32)和n + SUP类型漂移区域(26)隔离 )。 此外,形成第二电极(62),以经由绝缘膜(64)与半导体区域(52)的至少一部分相对。 第二电极(62)不与发射极区域(32)相对。
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公开(公告)号:US20080012040A1
公开(公告)日:2008-01-17
申请号:US11596063
申请日:2005-05-12
申请人: Jun Saito , Koji Hotta , Sachiko Kawaji , Masayasu Ishiko , Takahide Sugiyama , Masanori Usui
发明人: Jun Saito , Koji Hotta , Sachiko Kawaji , Masayasu Ishiko , Takahide Sugiyama , Masanori Usui
IPC分类号: H01L29/739
CPC分类号: H01L29/1095 , H01L29/0696 , H01L29/407 , H01L29/7397
摘要: The dense accumulation of hole carriers can be obtained over a wide range of a semiconductor region in a floating state formed within a body region of an IGBT. An n type semiconductor region (52) whose potential is floating is formed within a p− type body region (28). The n type semiconductor region (52) is isolated from an n+ type emitter region (32) and an n− type drift region (26) by the body region (28). Furthermore, a second electrode (62) is formed, so as to oppose to at least a part of the semiconductor region (52) via an insulator film (64). The second electrode (62) does not oppose to the emitter region (32).
摘要翻译: 可以在形成在IGBT的体区内的浮置状态的半导体区域的宽范围内获得空穴载流子的密集堆积。 在p型体区域(28)内形成有浮置电位的n型半导体区域(52)。 n型半导体区域(52)通过身体区域(28)与n + +型发射极区域(32)和n + SUP类型漂移区域(26)隔离 )。 此外,形成第二电极(62),以经由绝缘膜(64)与半导体区域(52)的至少一部分相对。 第二电极(62)不与发射极区域(32)相对。
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公开(公告)号:US20070114598A1
公开(公告)日:2007-05-24
申请号:US10581664
申请日:2004-12-03
申请人: Koji Hotta , Sachiko Kawaji , Takahide Sugiyama , Masanori Usui
发明人: Koji Hotta , Sachiko Kawaji , Takahide Sugiyama , Masanori Usui
IPC分类号: H01L29/94 , H01L21/336
CPC分类号: H01L29/7397 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/7813
摘要: The present invention relates to a technique for reducing the on-voltage of the semiconductor device by increasing the concentration of minority carriers in the deep region (26) and the intermediate region (28). A semiconductor device according to the invention comprises an electrode, a top region (36) of a second conductivity type connected to the electrode, a deep region of the second conductivity type, and an intermediate region of a first conductivity type connected to the electrode. A portion of the intermediate region isolates the top region and the deep region. The semiconductor device further comprises a gate electrode (32) facing the portion of the intermediate region via an insulating layer. The portion facing the gate electrode isolates the top region and the deep region. The semiconductor device according to the invention further comprises a barrier region (40) that is formed within the intermediate region and/or the top region.
摘要翻译: 本发明涉及通过增加深区域(26)和中间区域(28)中的少数载流子的浓度来降低半导体器件的导通电压的技术。 根据本发明的半导体器件包括电极,连接到电极的第二导电类型的顶部区域(36),第二导电类型的深区域和连接到电极的第一导电类型的中间区域。 中间区域的一部分隔离顶部区域和深部区域。 半导体器件还包括经由绝缘层面对中间区域的部分的栅电极(32)。 面对栅电极的部分隔离顶部区域和深部区域。 根据本发明的半导体器件还包括形成在中间区域和/或顶部区域内的阻挡区域(40)。
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公开(公告)号:US07598566B2
公开(公告)日:2009-10-06
申请号:US10579228
申请日:2004-11-05
申请人: Koji Hotta , Sachiko Kawaji , Masanori Usui , Takahide Sugiyama
发明人: Koji Hotta , Sachiko Kawaji , Masanori Usui , Takahide Sugiyama
CPC分类号: H01L29/7813 , H01L29/0696 , H01L29/1095 , H01L29/4236 , H01L29/4238 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要: The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus increasing the concentration of minority carriers in the intermediate region. A semiconductor device has a top region (34) of a second conductivity type, a deep region (26) of the second conductivity type, and an intermediate region (28) of a first conductivity type for isolating the top region and the deep region. The semiconductor device further has a trench gate (32) facing a portion of the intermediate region via an insulating layer (33). The portion facing the trench gate isolates the top region and the deep region. The trench gate extends along a longitudinal direction. The width of the trench gate is not uniform along the longitudinal direction; instead the width of the trench gate varies along the longitudinal direction.
摘要翻译: 本发明提供一种用于在身体区域中累积少数载流子的技术,即介于顶部区域和深部区域之间的中间区域,从而增加中间区域中的少数载流子的浓度。 半导体器件具有第二导电类型的顶部区域(34),第二导电类型的深度区域(26)和用于隔离顶部区域和深度区域的第一导电类型的中间区域(28)。 半导体器件还具有通过绝缘层(33)与中间区域的一部分相对的沟槽栅极(32)。 面向沟槽栅的部分隔离了顶部区域和深部区域。 沟槽门沿纵向方向延伸。 沟槽栅的宽度沿纵向不均匀; 相反,沟槽栅的宽度沿着纵向方向变化。
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公开(公告)号:US07737491B2
公开(公告)日:2010-06-15
申请号:US10581664
申请日:2004-12-03
申请人: Koji Hotta , Sachiko Kawaji , Takahide Sugiyama , Masanori Usui
发明人: Koji Hotta , Sachiko Kawaji , Takahide Sugiyama , Masanori Usui
IPC分类号: H01L29/739
CPC分类号: H01L29/7397 , H01L29/0619 , H01L29/0634 , H01L29/1095 , H01L29/7813
摘要: The present invention relates to a technique for reducing the on-voltage of the semiconductor device by increasing the concentration of minority carriers in the deep region (26) and the intermediate region (28). A semiconductor device according to the invention comprises an electrode, a top region (36) of a second conductivity type connected to the electrode, a deep region of the second conductivity type, and an intermediate region of a first conductivity type connected to the electrode. A portion of the intermediate region isolates the top region and the deep region. The semiconductor device further comprises a gate electrode (32) facing the portion of the intermediate region via an insulating layer. The portion facing the gate electrode isolates the top region and the deep region. The semiconductor device according to the invention further comprises a barrier region (40) that is formed within the intermediate region and/or the top region.
摘要翻译: 本发明涉及通过增加深区域(26)和中间区域(28)中的少数载流子的浓度来降低半导体器件的导通电压的技术。 根据本发明的半导体器件包括电极,连接到电极的第二导电类型的顶部区域(36),第二导电类型的深区域和连接到电极的第一导电类型的中间区域。 中间区域的一部分隔离顶部区域和深部区域。 半导体器件还包括经由绝缘层面对中间区域的部分的栅电极(32)。 面对栅电极的部分隔离顶部区域和深部区域。 根据本发明的半导体器件还包括形成在中间区域和/或顶部区域内的阻挡区域(40)。
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公开(公告)号:US20070040213A1
公开(公告)日:2007-02-22
申请号:US10579228
申请日:2004-11-05
申请人: Koji Hotta , Sachiko Kawaji , Masanori Usui , Takahide Sugiyama
发明人: Koji Hotta , Sachiko Kawaji , Masanori Usui , Takahide Sugiyama
IPC分类号: H01L29/94
CPC分类号: H01L29/7813 , H01L29/0696 , H01L29/1095 , H01L29/4236 , H01L29/4238 , H01L29/7397 , H01L2924/0002 , H01L2924/00
摘要: The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus increasing the concentration of minority carriers in the intermediate region. A semiconductor device has a top region (34) of a second conductivity type, a deep region (26) of the second conductivity type, and an intermediate region (28) of a first conductivity type for isolating the top region and the deep region. The semiconductor device further has a trench gate (32) facing a portion of the intermediate region via an insulating layer (33). The portion facing the trench gate isolates the top region and the deep region. The trench gate extends along a longitudinal direction. The width of the trench gate is not uniform along the longitudinal direction; instead the width of the trench gate varies along the longitudinal direction.
摘要翻译: 本发明提供一种用于在身体区域中累积少数载流子的技术,即介于顶部区域和深部区域之间的中间区域,从而增加中间区域中的少数载流子的浓度。 半导体器件具有第二导电类型的顶部区域(34),第二导电类型的深度区域(26)和用于隔离顶部区域和深度区域的第一导电类型的中间区域(28)。 半导体器件还具有通过绝缘层(33)与中间区域的一部分相对的沟槽栅极(32)。 面向沟槽栅的部分隔离了顶部区域和深部区域。 沟槽门沿纵向方向延伸。 沟槽栅的宽度沿纵向不均匀; 相反,沟槽栅的宽度沿着纵向方向变化。
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公开(公告)号:US09520465B2
公开(公告)日:2016-12-13
申请号:US14113276
申请日:2012-07-27
申请人: Yusuke Yamashita , Satoru Machida , Takahide Sugiyama , Jun Saito
发明人: Yusuke Yamashita , Satoru Machida , Takahide Sugiyama , Jun Saito
IPC分类号: H01L29/06 , H01L29/872 , H01L29/739 , H01L29/78 , H01L27/06 , H01L29/40 , H01L29/08 , H01L29/861 , H01L29/36 , H01L29/417 , H01L29/10 , H01L29/16 , H01L29/20
CPC分类号: H01L29/7813 , H01L27/0629 , H01L29/0619 , H01L29/0623 , H01L29/0642 , H01L29/0692 , H01L29/0696 , H01L29/08 , H01L29/0834 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/36 , H01L29/407 , H01L29/41766 , H01L29/7393 , H01L29/7397 , H01L29/7806 , H01L29/7839 , H01L29/8611 , H01L29/872
摘要: Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.
摘要翻译: 公开了能够在二极管切换时减少损耗的技术。 本说明书中公开的二极管包括阴极电极,由第一导电类型半导体制成的阴极区域,由低浓度第一导电类型半导体制成的漂移区域,由第二导电类型半导体制成的阳极区域,阳极电极 由金属制成的阻挡区域,形成在漂移区域和阳极区域之间并且由具有高于漂移区域的浓度的第一导电型半导体形成的势垒区域和形成为将阻挡区域连接到阳极的柱状区域 电极,并且由具有比屏障区域的浓度高的浓度的第一导电型半导体制成。 柱区域和阳极通过肖特基结连接。
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公开(公告)号:US20140048847A1
公开(公告)日:2014-02-20
申请号:US14113276
申请日:2012-07-27
申请人: Yusuke Yamashita , Satoru Machida , Takahide Sugiyama , Jun Saito
发明人: Yusuke Yamashita , Satoru Machida , Takahide Sugiyama , Jun Saito
IPC分类号: H01L29/06 , H01L27/06 , H01L29/78 , H01L29/872 , H01L29/739
CPC分类号: H01L29/7813 , H01L27/0629 , H01L29/0619 , H01L29/0623 , H01L29/0642 , H01L29/0692 , H01L29/0696 , H01L29/08 , H01L29/0834 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/36 , H01L29/407 , H01L29/41766 , H01L29/7393 , H01L29/7397 , H01L29/7806 , H01L29/7839 , H01L29/8611 , H01L29/872
摘要: Disclosed is a technique capable of reducing loss at the time of switching in a diode. A diode disclosed in the present specification includes a cathode electrode, a cathode region made of a first conductivity type semiconductor, a drift region made of a low concentration first conductivity type semiconductor, an anode region made of a second conductivity type semiconductor, an anode electrode made of metal, a barrier region formed between the drift region and the anode region and made of a first conductivity type semiconductor having a concentration higher than that of the drift region, and a pillar region formed so as to connect the barrier region to the anode electrode and made of a first conductivity type semiconductor having a concentration higher than that of the barrier region. The pillar region and the anode are connected through a Schottky junction.
摘要翻译: 公开了能够在二极管切换时减少损耗的技术。 本说明书中公开的二极管包括阴极电极,由第一导电类型半导体制成的阴极区域,由低浓度第一导电类型半导体制成的漂移区域,由第二导电类型半导体制成的阳极区域,阳极电极 由金属制成的阻挡区域,形成在漂移区域和阳极区域之间并且由具有高于漂移区域的浓度的第一导电型半导体形成的势垒区域和形成为将阻挡区域连接到阳极的柱状区域 电极,并且由具有比屏障区域的浓度高的浓度的第一导电型半导体制成。 柱区域和阳极通过肖特基结连接。
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公开(公告)号:US08716747B2
公开(公告)日:2014-05-06
申请号:US13366896
申请日:2012-02-06
申请人: Jun Saito , Sachiko Aoi , Takahide Sugiyama
发明人: Jun Saito , Sachiko Aoi , Takahide Sugiyama
IPC分类号: H01L29/66
CPC分类号: H01L27/0664 , H01L29/0834 , H01L29/32 , H01L29/7397 , H01L29/861
摘要: A diode region and an IGBT region are formed in a semiconductor layer of a semiconductor device. A lifetime controlled region is formed in the semiconductor layer. In a plan view, the lifetime controlled region has a first lifetime controlled region located in the diode region and a second lifetime controlled region located in a part of the IGBT region. The second lifetime controlled region extends from a boundary of the diode region and the IGBT region toward the IGBT region. In the plan view, a tip of the second lifetime controlled region is located in a forming area of the body region in the IGBT region.
摘要翻译: 二极管区域和IGBT区域形成在半导体器件的半导体层中。 在半导体层中形成寿命受控区域。 在平面图中,寿命受控区域具有位于二极管区域中的第一寿命受控区域和位于IGBT区域的一部分中的第二寿命受控区域。 第二寿命受控区域从二极管区域和IGBT区域的边界向IGBT区域延伸。 在平面图中,第二寿命受控区域的尖端位于IGBT区域的体区的形成区域中。
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公开(公告)号:US07549403B2
公开(公告)日:2009-06-23
申请号:US11326865
申请日:2006-01-06
CPC分类号: F02B63/04 , F01P1/02 , F01P2005/025 , F02B63/048 , H02K7/1815 , H02K9/06
摘要: An engine generator can have an engine duct for releasing to the outside a cooling air which is used to cool an engine and a muffler, and a generator duct for releasing to the outside a cooling air which is used to cool a generator. The engine duct and the generator duct can be formed in one body as an exhaust duct. The muffler and the generator can be laterally aligned in parallel with each other, and the engine duct and the generator duct can be located in a manner such that the directions of release of the cooling winds from the engine duct and the generator duct are parallel to each other. The exhaust duct can be located with the generator duct secured to a crankcase. An opening of the engine duct, and an opening of the generator duct can be laterally aligned with each other, and the opening of the generator duct can be positioned above the generator.
摘要翻译: 发动机发电机可以具有用于向外部释放用于冷却发动机和消声器的冷却空气的发动机管道和用于向外部释放用于冷却发电机的冷却空气的发电机管道。 发动机管道和发电机管道可以在一个主体中形成为排气管道。 消声器和发电机可以彼此平行地侧向对准,并且发动机管道和发电机管道可以以这样的方式定位,使得来自发动机管道和发电机管道的冷却风的释放方向平行于 彼此。 排气管可以位于发电机管道固定在曲轴箱上。 发动机管道的开口和发电机管道的开口可以彼此横向对准,并且发电机管道的开口可以位于发电机上方。
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