公开(公告)号：US07598566B2

公开(公告)日：2009-10-06

申请号：US10579228

申请日：2004-11-05

申请人： Koji Hotta ,  Sachiko Kawaji ,  Masanori Usui ,  Takahide Sugiyama

发明人： Koji Hotta ,  Sachiko Kawaji ,  Masanori Usui ,  Takahide Sugiyama

IPC分类号： H01L29/76 ,  H01L29/94

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/7397 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus increasing the concentration of minority carriers in the intermediate region. A semiconductor device has a top region (34) of a second conductivity type, a deep region (26) of the second conductivity type, and an intermediate region (28) of a first conductivity type for isolating the top region and the deep region. The semiconductor device further has a trench gate (32) facing a portion of the intermediate region via an insulating layer (33). The portion facing the trench gate isolates the top region and the deep region. The trench gate extends along a longitudinal direction. The width of the trench gate is not uniform along the longitudinal direction; instead the width of the trench gate varies along the longitudinal direction.

摘要翻译： 本发明提供一种用于在身体区域中累积少数载流子的技术，即介于顶部区域和深部区域之间的中间区域，从而增加中间区域中的少数载流子的浓度。 半导体器件具有第二导电类型的顶部区域（34），第二导电类型的深度区域（26）和用于隔离顶部区域和深度区域的第一导电类型的中间区域（28）。 半导体器件还具有通过绝缘层（33）与中间区域的一部分相对的沟槽栅极（32）。 面向沟槽栅的部分隔离了顶部区域和深部区域。 沟槽门沿纵向方向延伸。 沟槽栅的宽度沿纵向不均匀; 相反，沟槽栅的宽度沿着纵向方向变化。

公开(公告)号：US20070114598A1

公开(公告)日：2007-05-24

申请号：US10581664

申请日：2004-12-03

申请人： Koji Hotta ,  Sachiko Kawaji ,  Takahide Sugiyama ,  Masanori Usui

发明人： Koji Hotta ,  Sachiko Kawaji ,  Takahide Sugiyama ,  Masanori Usui

IPC分类号： H01L29/94 ,  H01L21/336

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7813

摘要： The present invention relates to a technique for reducing the on-voltage of the semiconductor device by increasing the concentration of minority carriers in the deep region (26) and the intermediate region (28). A semiconductor device according to the invention comprises an electrode, a top region (36) of a second conductivity type connected to the electrode, a deep region of the second conductivity type, and an intermediate region of a first conductivity type connected to the electrode. A portion of the intermediate region isolates the top region and the deep region. The semiconductor device further comprises a gate electrode (32) facing the portion of the intermediate region via an insulating layer. The portion facing the gate electrode isolates the top region and the deep region. The semiconductor device according to the invention further comprises a barrier region (40) that is formed within the intermediate region and/or the top region.

摘要翻译： 本发明涉及通过增加深区域（26）和中间区域（28）中的少数载流子的浓度来降低半导体器件的导通电压的技术。 根据本发明的半导体器件包括电极，连接到电极的第二导电类型的顶部区域（36），第二导电类型的深区域和连接到电极的第一导电类型的中间区域。 中间区域的一部分隔离顶部区域和深部区域。 半导体器件还包括经由绝缘层面对中间区域的部分的栅电极（32）。 面对栅电极的部分隔离顶部区域和深部区域。 根据本发明的半导体器件还包括形成在中间区域和/或顶部区域内的阻挡区域（40）。

公开(公告)号：US07737491B2

公开(公告)日：2010-06-15

申请号：US10581664

申请日：2004-12-03

申请人： Koji Hotta ,  Sachiko Kawaji ,  Takahide Sugiyama ,  Masanori Usui

发明人： Koji Hotta ,  Sachiko Kawaji ,  Takahide Sugiyama ,  Masanori Usui

IPC分类号： H01L29/739

CPC分类号： H01L29/7397 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/7813

摘要： The present invention relates to a technique for reducing the on-voltage of the semiconductor device by increasing the concentration of minority carriers in the deep region (26) and the intermediate region (28). A semiconductor device according to the invention comprises an electrode, a top region (36) of a second conductivity type connected to the electrode, a deep region of the second conductivity type, and an intermediate region of a first conductivity type connected to the electrode. A portion of the intermediate region isolates the top region and the deep region. The semiconductor device further comprises a gate electrode (32) facing the portion of the intermediate region via an insulating layer. The portion facing the gate electrode isolates the top region and the deep region. The semiconductor device according to the invention further comprises a barrier region (40) that is formed within the intermediate region and/or the top region.

摘要翻译： 本发明涉及通过增加深区域（26）和中间区域（28）中的少数载流子的浓度来降低半导体器件的导通电压的技术。 根据本发明的半导体器件包括电极，连接到电极的第二导电类型的顶部区域（36），第二导电类型的深区域和连接到电极的第一导电类型的中间区域。 中间区域的一部分隔离顶部区域和深部区域。 半导体器件还包括经由绝缘层面对中间区域的部分的栅电极（32）。 面对栅电极的部分隔离顶部区域和深部区域。 根据本发明的半导体器件还包括形成在中间区域和/或顶部区域内的阻挡区域（40）。

公开(公告)号：US20070040213A1

公开(公告)日：2007-02-22

申请号：US10579228

申请日：2004-11-05

申请人： Koji Hotta ,  Sachiko Kawaji ,  Masanori Usui ,  Takahide Sugiyama

发明人： Koji Hotta ,  Sachiko Kawaji ,  Masanori Usui ,  Takahide Sugiyama

IPC分类号： H01L29/94

CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/4238 ,  H01L29/7397 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention provides a technique for accumulating minority carriers in the body region, that is, the intermediate region interposed between the top region and the deep region, and thus increasing the concentration of minority carriers in the intermediate region. A semiconductor device has a top region (34) of a second conductivity type, a deep region (26) of the second conductivity type, and an intermediate region (28) of a first conductivity type for isolating the top region and the deep region. The semiconductor device further has a trench gate (32) facing a portion of the intermediate region via an insulating layer (33). The portion facing the trench gate isolates the top region and the deep region. The trench gate extends along a longitudinal direction. The width of the trench gate is not uniform along the longitudinal direction; instead the width of the trench gate varies along the longitudinal direction.

摘要翻译： 本发明提供一种用于在身体区域中累积少数载流子的技术，即介于顶部区域和深部区域之间的中间区域，从而增加中间区域中的少数载流子的浓度。 半导体器件具有第二导电类型的顶部区域（34），第二导电类型的深度区域（26）和用于隔离顶部区域和深度区域的第一导电类型的中间区域（28）。 半导体器件还具有通过绝缘层（33）与中间区域的一部分相对的沟槽栅极（32）。 面向沟槽栅的部分隔离了顶部区域和深部区域。 沟槽门沿纵向方向延伸。 沟槽栅的宽度沿纵向不均匀; 相反，沟槽栅的宽度沿着纵向方向变化。

公开(公告)号：US07423316B2

公开(公告)日：2008-09-09

申请号：US11596063

申请日：2005-05-12

申请人： Sachiko Kawaji ,  Masayasu Ishiko ,  Takahide Sugiyama ,  Masanori Usui ,  Jun Saito ,  Koji Hotta

发明人： Sachiko Kawaji ,  Masayasu Ishiko ,  Takahide Sugiyama ,  Masanori Usui ,  Jun Saito ,  Koji Hotta

IPC分类号： H01L29/94

CPC分类号： H01L29/1095 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/7397

摘要： The dense accumulation of hole carriers can be obtained over a wide range of a semiconductor region in a floating state formed within a body region of an IGBT. An n type semiconductor region (52) whose potential is floating is formed within a p− type body region (28). The n type semiconductor region (52) is isolated from an n+ type emitter region (32) and an n− type drift region (26) by the body region (28). Furthermore, a second electrode (62) is formed, so as to oppose to at least a part of the semiconductor region (52) via an insulator film (64). The second electrode (62) does not oppose to the emitter region (32).

摘要翻译： 可以在形成在IGBT的体区内的浮置状态的半导体区域的宽范围内获得空穴载流子的密集堆积。 在p型体区域（28）内形成有浮置电位的n型半导体区域（52）。 n型半导体区域（52）通过身体区域（28）与n + +型发射极区域（32）和n + SUP类型漂移区域（26）隔离 ）。 此外，形成第二电极（62），以经由绝缘膜（64）与半导体区域（52）的至少一部分相对。 第二电极（62）不与发射极区域（32）相对。

公开(公告)号：US20080012040A1

公开(公告)日：2008-01-17

申请号：US11596063

申请日：2005-05-12

申请人： Jun Saito ,  Koji Hotta ,  Sachiko Kawaji ,  Masayasu Ishiko ,  Takahide Sugiyama ,  Masanori Usui

发明人： Jun Saito ,  Koji Hotta ,  Sachiko Kawaji ,  Masayasu Ishiko ,  Takahide Sugiyama ,  Masanori Usui

IPC分类号： H01L29/739

CPC分类号： H01L29/1095 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/7397

摘要： The dense accumulation of hole carriers can be obtained over a wide range of a semiconductor region in a floating state formed within a body region of an IGBT. An n type semiconductor region (52) whose potential is floating is formed within a p− type body region (28). The n type semiconductor region (52) is isolated from an n+ type emitter region (32) and an n− type drift region (26) by the body region (28). Furthermore, a second electrode (62) is formed, so as to oppose to at least a part of the semiconductor region (52) via an insulator film (64). The second electrode (62) does not oppose to the emitter region (32).

摘要翻译： 可以在形成在IGBT的体区内的浮置状态的半导体区域的宽范围内获得空穴载流子的密集堆积。 在p型体区域（28）内形成有浮置电位的n型半导体区域（52）。 n型半导体区域（52）通过身体区域（28）与n + +型发射极区域（32）和n + SUP类型漂移区域（26）隔离 ）。 此外，形成第二电极（62），以经由绝缘膜（64）与半导体区域（52）的至少一部分相对。 第二电极（62）不与发射极区域（32）相对。

公开(公告)号：US08648703B2

公开(公告)日：2014-02-11

申请号：US12339853

申请日：2008-12-19

申请人： Eiji Inoue ,  Masanori Usui

发明人： Eiji Inoue ,  Masanori Usui

IPC分类号： B60C23/00

CPC分类号： B60C23/0408

摘要： A vehicle having a sensor apparatus includes a first mounting portion and a second mounting portion disposed on a side surface of a vehicle frame, wherein the first and second mounting portions are spaced apart in a vehicle length direction, wherein the first and second mounting portions configured to receive a load platform of the vehicle, a wheel assembly comprising a sensor transmitter, and a receiver mounted to the side surface between the first and the second mounting portions, the receiver configured to receive a signal from the sensor transmitter.

摘要翻译： 具有传感器装置的车辆包括：第一安装部和设置在车架的侧面的第二安装部，其中，所述第一安装部和所述第二安装部沿车辆长度方向隔开，所述第一安装部和所述第二安装部构成为 接收车辆的负载平台，包括传感器发射器的车轮组件和安装到第一和第二安装部分之间的侧表面的接收器，接收器被配置为从传感器发射器接收信号。

公开(公告)号：US08933484B2

公开(公告)日：2015-01-13

申请号：US13906930

申请日：2013-05-31

申请人： Makoto Imai ,  Atsushi Tanida ,  Takashi Asada ,  Masanori Usui ,  Tomoyuki Shoji

发明人： Makoto Imai ,  Atsushi Tanida ,  Takashi Asada ,  Masanori Usui ,  Tomoyuki Shoji

IPC分类号： H01L23/34 ,  H01L23/495 ,  H01L23/36 ,  H01L23/373 ,  H01L23/473 ,  H01L23/492 ,  H01L23/00

CPC分类号： H01L23/49568 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/473 ,  H01L23/492 ,  H01L24/29 ,  H01L24/33 ,  H01L2224/29111 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1301 ,  H01L2924/13055 ,  H01L2924/13064 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/01047

摘要： A heat transfer member is disposed between a semiconductor element and an electrode plate. The heat transfer member comprises a metal portion extending between a first face at the semiconductor element side and a second face at the plate electrode side, and a ceramic portion surrounding the metal portion. An area of the first face is less than an area of the second face in the metal portion.

摘要翻译： 传热构件设置在半导体元件和电极板之间。 传热构件包括在半导体元件侧的第一面和板电极侧的第二面之间延伸的金属部分和围绕金属部的陶瓷部。 第一面的面积小于金属部分的第二面的面积。

公开(公告)号：US20090167517A1

公开(公告)日：2009-07-02

申请号：US12339853

申请日：2008-12-19

申请人： Eiji Inoue ,  Masanori Usui

发明人： Eiji Inoue ,  Masanori Usui

IPC分类号： B60C23/02

CPC分类号： B60C23/0408

摘要： A vehicle having a sensor apparatus includes a first mounting portion and a second mounting portion disposed on a side surface of a vehicle frame, wherein the first and second mounting portions are spaced apart in a vehicle length direction, wherein the first and second mounting portions configured to receive a load platform of the vehicle, a wheel assembly comprising a sensor transmitter, and a receiver mounted to the side surface between the first and the second mounting portions, the receiver configured to receive a signal from the sensor transmitter.

摘要翻译： 具有传感器装置的车辆包括：第一安装部和设置在车架的侧面的第二安装部，其中，所述第一安装部和所述第二安装部沿车辆长度方向隔开，所述第一安装部和所述第二安装部构成为 接收车辆的负载平台，包括传感器发射器的车轮组件和安装到第一和第二安装部分之间的侧表面的接收器，接收器被配置为从传感器发射器接收信号。

公开(公告)号：US5521403A

公开(公告)日：1996-05-28

申请号：US417894

申请日：1995-04-06

申请人： Masanori Usui ,  Takatoshi Kato ,  Hiroyuki Kano ,  Tadashi Shibata

发明人： Masanori Usui ,  Takatoshi Kato ,  Hiroyuki Kano ,  Tadashi Shibata

IPC分类号： H01L21/285 ,  H01L21/338 ,  H01L29/812 ,  H01L31/0328 ,  H01L31/0336

CPC分类号： H01L29/8122 ,  H01L21/28575

摘要： A field-effect transistor includes a semi-insulating substrate, a semiconductor layer consisting of successive layers of GaAs compound semiconductor formed on the substrate, a gate electrode forming a Schottky contact with the semiconductor layer, and source and drain electrodes each forming an ohmic contact to the semiconductor layer. A semiconductor layer includes a buffer layer, an active layer, and a contact layer, where the impurity concentration in the contact layer is substantially equal to that in the active layer at the interface therewith. The impurity concentration in the contact layer increases continuously from the interface toward the upper surface of the contact layer. The field-effect transistor achieves a reduction in the ON resistance and an increase in the gate breakdown voltage at the same time, and to reduce power loss and increase efficiency.

摘要翻译： 场效应晶体管包括半绝缘衬底，由衬底上形成的连续的GaAs化合物半导体层构成的半导体层，与半导体层形成肖特基接触的栅电极以及各自形成欧姆接触的源极和漏极 到半导体层。 半导体层包括缓冲层，有源层和接触层，其中接触层中的杂质浓度基本上等于与其界面处的有源层中的杂质浓度。 接触层中的杂质浓度从界面向接触层的上表面连续增加。 场效应晶体管同时实现导通电阻的降低和栅极击穿电压的提高，并且降低功率损耗并提高效率。