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公开(公告)号:US09412825B2
公开(公告)日:2016-08-09
申请号:US14472956
申请日:2014-08-29
发明人: Takaaki Yasumoto , Naoko Yanase , Kazuhide Abe , Takeshi Uchihara , Yasunobu Saito , Toshiyuki Naka , Akira Yoshioka , Tasuku Ono , Tetsuya Ohno , Hidetoshi Fujimoto , Shingo Masuko , Masaru Furukawa , Yasunari Yagi , Miki Yumoto , Atsuko Iida , Yukako Murakami , Takako Motai
IPC分类号: H01L29/66 , H01L29/40 , H01L29/423 , H01L29/778 , H01L29/20
CPC分类号: H01L29/408 , H01L29/2003 , H01L29/423 , H01L29/7786
摘要: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
摘要翻译: 半导体器件包括GaN基半导体层,GaN基半导体层上的源电极,GaN基半导体层上的漏电极和形成在源极电极和源极之间的GaN基半导体层上的栅电极 漏电极。 第一层与栅电极和漏电极之间的GaN基半导体层接触。
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公开(公告)号:US20150263103A1
公开(公告)日:2015-09-17
申请号:US14215257
申请日:2014-03-17
发明人: Yasunobu Saito , Hidetoshi Fujimoto , Akira Yoshioka , Takeshi Uchihara , Takaaki Yasumoto , Naoko Yanase , Tasuku Ono
IPC分类号: H01L29/205 , H01L29/51 , H01L27/06 , H01L29/778 , H01L29/20
CPC分类号: H01L27/0605 , H01L27/085 , H01L29/1066 , H01L29/2003 , H01L29/207 , H01L29/4236 , H01L29/518 , H01L29/7787 , H01L29/7832
摘要: A semiconductor device according to an embodiment includes a first semiconductor layer including a first nitride semiconductor, a second semiconductor layer on the first semiconductor layer including a second nitride semiconductor, a source electrode, a drain electrode, a first gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode having a schottky junction, a second gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the source electrode and the first gate electrode, electrically connected with the first gate electrode, and a third gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the drain electrode and the first gate electrode, electrically connected with the first gate electrode. A first transistor structure has a first threshold value, a second transistor structure has a second threshold value, and a third transistor structure has a third threshold value.
摘要翻译: 根据实施例的半导体器件包括:第一半导体层,包括第一氮化物半导体,第一半导体层上的第二半导体层,包括第二氮化物半导体,源极,漏极,设置在第二半导体上的第一栅电极 位于源电极和具有肖特基结的漏电极之间的第二栅电极,设置在介于绝缘膜的第二半导体层之上的第二栅电极,设置在与第一栅电极电连接的源电极和第一栅电极之间, 第三栅电极,设置在设置在漏电极和第一栅电极之间的绝缘膜的第二半导体层上方,与第一栅电极电连接。 第一晶体管结构具有第一阈值,第二晶体管结构具有第二阈值,第三晶体管结构具有第三阈值。
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公开(公告)号:US20150263101A1
公开(公告)日:2015-09-17
申请号:US14482258
申请日:2014-09-10
发明人: Shingo Masuko , Takaaki Yasumoto , Naoko Yanase , Miki Yumoto , Masahito Mimura , Yasunobu Saito , Akira Yoshioka , Hidetoshi Fujimoto , Takeshi Uchihara , Tetsuya Ohno , Toshiyuki Naka , Tasuku Ono
IPC分类号: H01L29/20 , H01L21/78 , H01L29/66 , H01L21/306 , H01L29/778 , H01L23/12
CPC分类号: H01L29/2003 , H01L21/30612 , H01L21/6836 , H01L21/78 , H01L23/3677 , H01L23/49827 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L29/4175 , H01L29/452 , H01L29/66462 , H01L29/7786 , H01L2221/68327 , H01L2221/6834 , H01L2224/0401 , H01L2224/04026 , H01L2224/05155 , H01L2224/05644 , H01L2224/1146 , H01L2224/13013 , H01L2224/13015 , H01L2224/13111 , H01L2224/14051 , H01L2224/14515 , H01L2224/16013 , H01L2224/16227 , H01L2224/16235 , H01L2224/29013 , H01L2224/29111 , H01L2224/32013 , H01L2224/32227 , H01L2224/32235 , H01L2224/73103 , H01L2224/81444 , H01L2224/83444 , H01L2924/01047 , H01L2924/01029 , H01L2924/00014 , H01L2924/00012
摘要: In one embodiment, a semiconductor device includes a semiconductor chip including a nitride semiconductor layer, and including a control electrode, a first electrode and a second electrode provided on the nitride semiconductor layer. The device further includes a support including a substrate, and including a control terminal, a first terminal and a second terminal provided on the substrate. The semiconductor chip is provided on the support such that the control electrode, the first electrode and the second electrode face the support. The control electrode, the first electrode and the second electrode of the semiconductor chip are electrically connected to the control terminal, the first terminal and the second terminal of the support, respectively.
摘要翻译: 在一个实施例中,半导体器件包括包括氮化物半导体层的半导体芯片,并且包括控制电极,设置在氮化物半导体层上的第一电极和第二电极。 该装置还包括一个支撑体,它包括一个基板,并且包括一个控制端子,一个设置在基板上的第一端子和第二端子。 半导体芯片设置在支撑体上,使得控制电极,第一电极和第二电极面对支撑体。 半导体芯片的控制电极,第一电极和第二电极分别电连接到控制端子,支架的第一端子和第二端子。
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公开(公告)号:US09054171B2
公开(公告)日:2015-06-09
申请号:US14201641
申请日:2014-03-07
发明人: Tetsuya Ohno , Yasunobu Saito , Hidetoshi Fujimoto , Akira Yoshioka , Takeshi Uchihara , Toshiyuki Naka , Takaaki Yasumoto , Naoko Yanase , Shingo Masuko , Tasuku Ono
IPC分类号: H01L29/66 , H01L29/778 , H01L29/20 , H01L29/06
CPC分类号: H01L29/7786 , H01L29/0646 , H01L29/0649 , H01L29/0657 , H01L29/2003 , H01L29/66462 , H01L29/7787
摘要: In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type. The device further includes a second semiconductor layer of the first conductivity type or the intrinsic type disposed above the first semiconductor layer. The device further includes a third semiconductor layer of a second conductivity type including a first upper portion in contact with the first semiconductor layer, a second upper portion located at a lower position than the first upper portion, a first side portion located between the first upper portion and the second upper portion, and a second side portion located at a lower position than the first side portion.
摘要翻译: 在一个实施例中,半导体器件包括第一导电类型或固有类型的第一半导体层。 该器件还包括设置在第一半导体层上方的第一导电类型或固有类型的第二半导体层。 该器件还包括第二导电类型的第三半导体层,包括与第一半导体层接触的第一上部,位于比第一上部更低的第二上部,位于第一上部之间的第一侧部 部分和第二上部,以及位于比第一侧部低的位置的第二侧部。
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公开(公告)号:US20150069468A1
公开(公告)日:2015-03-12
申请号:US14201641
申请日:2014-03-07
发明人: Tetsuya Ohno , Yasunobu Saito , Hidetoshi Fujimoto , Akira Yoshioka , Takeshi Uchihara , Toshiyuki Naka , Takaaki Yasumoto , Naoko Yanase , Shingo Masuko , Tasuku Ono
IPC分类号: H01L29/778
CPC分类号: H01L29/7786 , H01L29/0646 , H01L29/0649 , H01L29/0657 , H01L29/2003 , H01L29/66462 , H01L29/7787
摘要: In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type. The device further includes a second semiconductor layer of the first conductivity type or the intrinsic type disposed above the first semiconductor layer. The device further includes a third semiconductor layer of a second conductivity type including a first upper portion in contact with the first semiconductor layer, a second upper portion located at a lower position than the first upper portion, a first side portion located between the first upper portion and the second upper portion, and a second side portion located at a lower position than the first side portion.
摘要翻译: 在一个实施例中,半导体器件包括第一导电类型或固有类型的第一半导体层。 该器件还包括设置在第一半导体层上方的第一导电类型或固有类型的第二半导体层。 该器件还包括第二导电类型的第三半导体层,包括与第一半导体层接触的第一上部,位于比第一上部更低的第二上部,位于第一上部之间的第一侧部 部分和第二上部,以及位于比第一侧部低的位置的第二侧部。
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公开(公告)号:US09165922B2
公开(公告)日:2015-10-20
申请号:US14015986
申请日:2013-08-30
发明人: Akira Yoshioka , Yasunobu Saito , Hidetoshi Fujimoto , Takeshi Uchihara , Naoko Yanase , Toshiyuki Naka , Tetsuya Ohno , Tasuku Ono
IPC分类号: H01L27/06 , H01L27/095
CPC分类号: H01L27/0629 , H01L27/095 , H01L2224/48091 , H01L2224/48137 , H01L2224/73265 , H01L2924/12032 , H01L2924/00 , H01L2924/00014
摘要: According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
摘要翻译: 根据实施例,半导体器件包括导电衬底,肖特基势垒二极管和场效应晶体管。 肖特基势垒二极管安装在导电基板上,并包括阳极电极和阴极电极。 阳极电极与导电性基板电连接。 场效应晶体管安装在导电基板上,包括源电极,漏电极和栅电极。 场效应晶体管的源电极电连接到肖特基势垒二极管的阴极。 场效晶体管的栅电极与肖特基势垒二极管的阳极电连接。
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公开(公告)号:US20150263630A1
公开(公告)日:2015-09-17
申请号:US14482231
申请日:2014-09-10
发明人: Toshiyuki Naka , Yasunobu Saito , Hidetoshi Fujimoto , Akira Yoshioka , Tetsuya Ohno , Takeshi Uchihara , Takaaki Yasumoto , Naoko Yanase , Shingo Masuko , Tasuku Ono
IPC分类号: H02M3/335
CPC分类号: H02M3/33507 , H02M2001/0048 , H02M2001/007 , Y02B70/1491
摘要: In one embodiment, a power supply circuit includes a first circuit including one or more first switching devices, and a first controller configured to control the first switching devices, the first circuit being configured to output a first voltage. The power supply circuit further includes a second circuit including one or more second switching devices which include a normally-on device, and a second controller configured to control the second switching devices, the second circuit being configured to output a second voltage generated from the first voltage. The second controller transmits a first signal for allowing the first circuit to output the first voltage, based on a value of a voltage or a current at a first node in the second circuit. The first controller allows the first circuit to output the first voltage by controlling the first switching devices in accordance with the first signal.
摘要翻译: 在一个实施例中,电源电路包括包括一个或多个第一开关装置的第一电路和被配置为控制第一开关装置的第一控制器,第一电路被配置为输出第一电压。 电源电路还包括包括一个或多个第二开关装置的第二电路,其包括常开装置,以及被配置为控制第二开关装置的第二控制器,第二电路被配置为输出从第一 电压。 第二控制器基于第二电路中的第一节点处的电压或电流的值,发送用于允许第一电路输出第一电压的第一信号。 第一控制器允许第一电路通过根据第一信号控制第一开关装置来输出第一电压。
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公开(公告)号:US20150076506A1
公开(公告)日:2015-03-19
申请号:US14215321
申请日:2014-03-17
发明人: Takaaki Yasumoto , Naoko Yanase , Kazuhide Abe , Takeshi Uchihara , Yasunobu Saito , Toshiyuki Naka , Akira Yoshioka , Tasuku Ono , Tetsuya Ohno , Hidetoshi Fujimoto , Shingo Masuko , Masaru Furukawa , Yasunari Yagi , Miki Yumoto , Atsuko Iida
CPC分类号: H01L29/2003 , H01L29/045 , H01L29/205 , H01L29/417 , H01L29/41725 , H01L29/41758 , H01L29/42316 , H01L29/7786 , H01L29/872
摘要: This disclosure provides a semiconductor device which includes a GaN-based semiconductor layer having a surface with an angle of not less than 0 degree and not more than 5 degrees with respect to an m-plane or an a-plane, a first electrode provided above the surface and having a first end, and a second electrode provided above the surface to space apart from the first electrode, having a second end facing the first end, and a direction of a segment connecting an arbitrary point of the first end and an arbitrary point of the second end is different from a c-axis direction of the GaN-based semiconductor layer.
摘要翻译: 本公开内容提供了一种半导体器件,其包括相对于m面或a面具有不小于0度且不大于5度的角度的表面的GaN基半导体层,设置在上述第一电极上的第一电极 所述表面具有第一端,以及设置在所述表面之上并与所述第一电极隔开的第二电极,所述第二电极具有面向所述第一端的第二端和连接所述第一端的任意点和任意的任意点的段的方向 第二端的点与GaN类半导体层的c轴方向不同。
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