公开(公告)号：US20240321814A1

公开(公告)日：2024-09-26

申请号：US18677913

申请日：2024-05-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Hsien-Wei Chen ,  Ming-Fa Chen

IPC分类号： H01L23/00

CPC分类号： H01L24/73 ,  H01L24/04 ,  H01L24/05 ,  H01L24/24 ,  H01L24/11 ,  H01L24/16 ,  H01L24/32 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/05558 ,  H01L2224/1146 ,  H01L2224/11912 ,  H01L2224/16145 ,  H01L2224/24105 ,  H01L2224/24146 ,  H01L2224/32145 ,  H01L2224/73103 ,  H01L2224/73259 ,  H01L2224/73267

摘要： A semiconductor structure including a first semiconductor die and a second semiconductor die is provided. The first semiconductor die includes a first bonding structure. The second semiconductor die is bonded to the first bonding structure of the first semiconductor die. The first bonding structure includes a first dielectric layer, a second dielectric layer covering the first dielectric layer, and first conductors embedded in the first dielectric layer and the second dielectric layer, wherein each of the first conductors includes a first conductive barrier layer covering the first dielectric layer and a first conductive pillar disposed on the first conductive barrier layer, and the first conductive pillars are in contact with the second dielectric layer.

公开(公告)号：US11705425B2

公开(公告)日：2023-07-18

申请号：US17301843

申请日：2021-04-15

申请人： Micron Technology, Inc.

发明人： Benjamin L. McClain ,  Brandon P. Wirz ,  Zhaohui Ma

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56

CPC分类号： H01L24/75 ,  H01L21/4853 ,  H01L21/563 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/13 ,  H01L24/16 ,  H01L24/94 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/16227 ,  H01L2224/27003 ,  H01L2224/2783 ,  H01L2224/2784 ,  H01L2224/27436 ,  H01L2224/32013 ,  H01L2224/32058 ,  H01L2224/32059 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/7532 ,  H01L2224/75251 ,  H01L2224/75252 ,  H01L2224/75303 ,  H01L2224/75312 ,  H01L2224/75318 ,  H01L2224/75745 ,  H01L2224/8182 ,  H01L2224/81169 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81895 ,  H01L2224/83203 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/00012 ,  H01L2224/94 ,  H01L2224/27 ,  H01L2224/94 ,  H01L2224/11 ,  H01L2224/9212 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2224/9211 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/81169 ,  H01L2924/00014 ,  H01L2224/2783 ,  H01L2924/00012

摘要： A bond tip for thermocompression bonding a bottom surface includes a die contact area and a low surface energy material covering at least a portion of the bottom surface. The low surface energy material may cover substantially all of the bottom surface, or only a peripheral portion surrounding the die contact area. The die contact area may be recessed with respect to the peripheral portion a depth at least as great as a thickness of a semiconductor die to be received in the recessed die contact area. A method of thermocompression bonding is also disclosed.

公开(公告)号：US20180278816A1

公开(公告)日：2018-09-27

申请号：US15885886

申请日：2018-02-01

申请人： OLYMPUS CORPORATION

发明人： Jumpei YONEYAMA

IPC分类号： H04N5/225 ,  G02B13/00 ,  G02B23/24 ,  H01L27/146

CPC分类号： H04N5/2254 ,  A61B1/051 ,  G02B13/0085 ,  G02B23/2484 ,  H01L24/14 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L27/14623 ,  H01L27/14636 ,  H01L2224/14151 ,  H01L2224/14155 ,  H01L2224/26175 ,  H01L2224/27312 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/83191 ,  H01L2224/83385 ,  H01L2224/83874 ,  H01L2924/15159 ,  H01L2924/15788 ,  H04N5/2253 ,  H04N2005/2255 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/0635 ,  H01L2924/00012

摘要： An image pickup module includes an image pickup device including a light receiving section and an external electrode on a light receiving surface on which an image pickup optical system including an optical axis forms an object image, and a cover glass including a first main surface and a second main surface, the second main surface being made to adhere to the light receiving surface via resin, and covering the light receiving section and not covering the external electrode, in which in the cover glass, the second main surface is smaller than the first main surface, and the resin sticks out into a space formed by extending the first main surface in a direction toward the second main surface on the optical axis, to form a fillet between the image pickup device and the cover glass.

公开(公告)号：US09985002B2

公开(公告)日：2018-05-29

申请号：US15630084

申请日：2017-06-22

申请人： SK hynix Inc.

发明人： Sang Yong Lee

IPC分类号： H05K1/16 ,  H01L23/48 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/13 ,  H01L25/00 ,  H01L23/538 ,  H01L23/498

CPC分类号： H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3157 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5384 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/50 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/16146 ,  H01L2224/16237 ,  H01L2224/29007 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/8114 ,  H01L2224/81385 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2224/8385 ,  H01L2224/9211 ,  H01L2224/92242 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06562 ,  H01L2924/1435 ,  H01L2924/15156 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/81

摘要： The stack package includes a substrate body layer having a top surface and a bottom surface, first circuit patterns disposed on the bottom surface of the substrate body layer, second circuit patterns disposed on the top surface of the substrate body layer, a first semiconductor chip including first bumps, and a second semiconductor chip including second bumps. The first bumps extend through the substrate body layer to be electrically coupled to the first circuit patterns, and the second bumps extend past sidewalls of the first semiconductor chip to be electrically coupled to the second circuit patterns. The second semiconductor chip is stacked on the first semiconductor chip.

公开(公告)号：US20180061793A1

公开(公告)日：2018-03-01

申请号：US15293309

申请日：2016-10-14

申请人： Kinpo Electronics, Inc.

发明人： Yu-Wei Cheng

IPC分类号： H01L23/00 ,  H01L23/29

CPC分类号： H01L24/09 ,  H01L21/563 ,  H01L23/293 ,  H01L23/49816 ,  H01L23/4985 ,  H01L23/49894 ,  H01L23/564 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/03622 ,  H01L2224/03849 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05568 ,  H01L2224/05571 ,  H01L2224/056 ,  H01L2224/0569 ,  H01L2224/0903 ,  H01L2224/1132 ,  H01L2224/13007 ,  H01L2224/13013 ,  H01L2224/13021 ,  H01L2224/16012 ,  H01L2224/16112 ,  H01L2224/16227 ,  H01L2224/2732 ,  H01L2224/27848 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81815 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/9211 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00014 ,  H01L2924/0675

摘要： A package structure includes a substrate, a patterned solder resist layer, a plurality of solders, a chip and a polymer gel. The substrate includes a plurality of solder pads. The patterned solder resist layer is disposed on the substrate and includes a plurality of stepped openings. The stepped openings expose the solder pads respectively. The solders are disposed on the solder pads and located in the stepped openings respectively. The chip is disposed on the substrate and includes an active surface and a plurality of bond pads. The bond pads are disposed on the active surface and connected to the solder pads by the solders. The polymer gel fills between a top surface of the patterned solder resist layer and the active surface. The polymer gel at least surrounds a disposing region of the solders and fills between two adjacent solders.

公开(公告)号：US09887173B2

公开(公告)日：2018-02-06

申请号：US14130362

申请日：2012-06-26

申请人： Michael Guyenot ,  Michael Guenther ,  Thomas Herboth

发明人： Michael Guyenot ,  Michael Guenther ,  Thomas Herboth

IPC分类号： H01L23/00 ,  H01L23/373

CPC分类号： H01L24/64 ,  H01L23/3735 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/70 ,  H01L24/83 ,  H01L2224/2732 ,  H01L2224/27418 ,  H01L2224/27848 ,  H01L2224/29 ,  H01L2224/29007 ,  H01L2224/29012 ,  H01L2224/29015 ,  H01L2224/29023 ,  H01L2224/29036 ,  H01L2224/29139 ,  H01L2224/29298 ,  H01L2224/3003 ,  H01L2224/30051 ,  H01L2224/3012 ,  H01L2224/30142 ,  H01L2224/3016 ,  H01L2224/30181 ,  H01L2224/32014 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/83048 ,  H01L2224/83203 ,  H01L2224/8384 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/07811 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/1517 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/3512 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/29299 ,  H01L2224/2929 ,  H01L2924/00 ,  H01L2924/00012

摘要： A method for producing a sinter layer connection between a substrate and a chip resulting in an electric and thermal connection therebetween and in reduced mechanical tensions within the chip. The method produces a sinter layer by applying a multitude of sinter elements of a base material forming the sinter layer in structured manner on a contact area of a main surface of a substrate; placing a chip to be joined to the substrate on the sinter elements; and heating and compressing the sinter elements to produce a structured sinter layer connecting the substrate and chip and extending within the contact area, the surface coverage density of the sinter elements on the substrate in a center region of the contact area being greater than the surface coverage density of the sinter elements in an edge region of the contact area, and at least one through channel, extending laterally as to the substrate's main surface being provided towards the contact area's edge. A large-area sinter element is situated in the contact area's center region, and circular sinter elements is situated in a contact area edge region. The sinter elements may also have notches. Also described is a related device.

公开(公告)号：US09780015B2

公开(公告)日：2017-10-03

申请号：US15204488

申请日：2016-07-07

申请人： STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

发明人： Pierre Bar ,  Alisee Taluy ,  Olga Kokshagina

IPC分类号： H01L23/367 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/36

CPC分类号： H01L23/3675 ,  H01L21/32139 ,  H01L21/4853 ,  H01L21/4871 ,  H01L21/4882 ,  H01L21/563 ,  H01L21/565 ,  H01L21/76897 ,  H01L23/3135 ,  H01L23/3157 ,  H01L23/36 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/13147 ,  H01L2224/14131 ,  H01L2224/14519 ,  H01L2224/29013 ,  H01L2224/29082 ,  H01L2224/29111 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/3015 ,  H01L2224/30519 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83193 ,  H01L2224/83801 ,  H01L2224/9211 ,  H01L2924/12042 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/81 ,  H01L2224/83

摘要： A device includes a chip assembled on an interposer. An electrically-insulating layer coats an upper surface of the interposer around the chip. First metal lines run on the upper surface of the interposer and are arranged between conductive elements of connection to the chip. An end of each first metal line is arranged to extend beyond a projection of the chip on the interposer. A thermally-conductive via connects the end of the first metal line to a heat sink supported at an upper surface of the device.

公开(公告)号：US09691805B2

公开(公告)日：2017-06-27

申请号：US15010992

申请日：2016-01-29

申请人： Sony Corporation

发明人： Satoru Wakiyama ,  Hiroshi Ozaki

IPC分类号： H01L27/146 ,  H01L21/56 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L27/14636 ,  H01L21/56 ,  H01L21/563 ,  H01L23/31 ,  H01L24/05 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L27/14605 ,  H01L27/14609 ,  H01L27/14618 ,  H01L27/14625 ,  H01L27/14634 ,  H01L27/14683 ,  H01L27/1469 ,  H01L2224/0401 ,  H01L2224/05571 ,  H01L2224/05624 ,  H01L2224/14515 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/26145 ,  H01L2224/26175 ,  H01L2224/27013 ,  H01L2224/29011 ,  H01L2224/29035 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73103 ,  H01L2224/73104 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83051 ,  H01L2224/83104 ,  H01L2224/83365 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15788 ,  H01L2924/00012 ,  H01L2224/05552 ,  H01L2924/00

摘要： Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.

公开(公告)号：US09673174B2

公开(公告)日：2017-06-06

申请号：US14596088

申请日：2015-01-13

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Tsung-Ding Wang ,  Chen-Shien Chen ,  Kai-Ming Ching ,  Bo-I Lee ,  Chien-Hsun Lee

IPC分类号： H01L29/40 ,  H01L25/065 ,  H01L21/18 ,  H01L23/48 ,  H01L23/00

CPC分类号： H01L25/0657 ,  H01L21/187 ,  H01L23/481 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05573 ,  H01L2224/13 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16113 ,  H01L2224/16146 ,  H01L2224/73103 ,  H01L2224/73204 ,  H01L2224/81 ,  H01L2224/81193 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/06 ,  H01L2924/07025 ,  H01L2924/00014

摘要： System and method for bonding semiconductor substrates is presented. A preferred embodiment comprises forming a buffer layer over a surface of a semiconductor substrate while retaining TSVs that protrude from the buffer layer in order to prevent potential voids that might form. A protective layer is formed on another semiconductor substrate that will be bonded to the first semiconductor substrate. The two substrates are aligned and bonded together, with the buffer layer preventing any short circuit contacts to the surface of the original semiconductor substrate.

公开(公告)号：US09589874B2

公开(公告)日：2017-03-07

申请号：US14857041

申请日：2015-09-17

申请人： STMicroelectronics (Crolles 2) SAS ,  SOCPRA Sciences et Génie S.E.C.

发明人： Louis-Michel Collin ,  Luc Guy Frechette ,  Sandrine Lhostis

IPC分类号： H01L23/48 ,  H01L23/495 ,  H01L21/311 ,  H01L21/48 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01L23/31 ,  H01L23/42 ,  H01L23/492 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/473

CPC分类号： H01L23/42 ,  H01L21/31116 ,  H01L21/481 ,  H01L21/4825 ,  H01L21/4853 ,  H01L21/4875 ,  H01L21/4878 ,  H01L21/52 ,  H01L21/54 ,  H01L21/56 ,  H01L21/563 ,  H01L23/3121 ,  H01L23/315 ,  H01L23/3157 ,  H01L23/3672 ,  H01L23/473 ,  H01L23/492 ,  H01L23/4952 ,  H01L23/49568 ,  H01L23/49811 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/05647 ,  H01L2224/11462 ,  H01L2224/13012 ,  H01L2224/13013 ,  H01L2224/13015 ,  H01L2224/13024 ,  H01L2224/13078 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/136 ,  H01L2224/14051 ,  H01L2224/14151 ,  H01L2224/14152 ,  H01L2224/14154 ,  H01L2224/14177 ,  H01L2224/14517 ,  H01L2224/16058 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/17051 ,  H01L2224/17181 ,  H01L2224/27462 ,  H01L2224/29012 ,  H01L2224/29013 ,  H01L2224/29015 ,  H01L2224/29078 ,  H01L2224/29147 ,  H01L2224/30151 ,  H01L2224/30152 ,  H01L2224/32058 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73253 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83447 ,  H01L2224/83801 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2924/37002 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/1415

摘要： An assembly is made of an integrated circuit chip and a plate. At least one channel is arranged between the chip and the plate. The channel is delimited by metal sidewalls at least partially extending from one surface of the chip to an opposite surface of the plate. The assembly is encapsulated in a body that includes an opening extending to reach the channel. The plate may be one of an interposer, an integrated circuit chip, a support of surface-mount type, or a metal plate.

摘要翻译： 组件由集成电路芯片和板制成。 在芯片和板之间布置至少一个通道。 通道由金属侧壁限定，金属侧壁至少部分地从芯片的一个表面延伸到板的相对表面。 组件被封装在包括延伸到达通道的开口的主体中。 该板可以是插入件，集成电路芯片，表面安装型支架或金属板之一。