公开(公告)号：US11455209B2

公开(公告)日：2022-09-27

申请号：US17412026

申请日：2021-08-25

Applicant: Kioxia Corporation

Inventor： Takahiro Kubota ,  Daiki Watanabe ,  Hironori Uchikawa

IPC: G06F11/00 ,  G06F11/10

Abstract: A memory system includes a non-volatile memory configured to store an N-dimensional error correction code and a memory controller. The memory controller is configured to calculate an ath soft-input value for an ath component code based on correction information of the ath component code (1≤a≤ni) of an ith dimension (1≤i≤N), ath reliability information, and a syndrome value of the ath component code, to calculate a decoded word of the ath component code, the ath correction information, and the ath reliability information by inputting the ath soft-input value and executing a decoding process of the ath component code, to store the ath correction information and bth correction information indicating a corrected position of a bth component code (1≤b≤nj) of a jth dimension (j≠i, 1≤j≤N) in a correction information memory, to store the ath reliability information in a reliability information memory, and to output an output decoded word calculated from the read information and the reliability information of each component code.

公开(公告)号：US11163639B2

公开(公告)日：2021-11-02

申请号：US16816396

申请日：2020-03-12

Applicant: Kioxia Corporation

Inventor： Naoaki Kokubun ,  Daiki Watanabe

IPC: G06F11/10 ,  H03M13/45

Abstract: A memory system according to an embodiment includes a nonvolatile memory and a memory controller. The memory controller converts a received value read from the nonvolatile memory into first likelihood information by using a first conversion table, executes decoding on the first likelihood information and outputting a posterior value, outputs an estimated value of the received value obtained on the basis of the posterior value in a case where the decoding is successful. The memory controller generates a second conversion table on the basis of the posterior value in a case where the decoding fails. The memory controller converts the received value into second likelihood information by using the second conversion table in a case where the second conversion table has been generated, and executes decoding on the second likelihood information and outputs a posterior value.

公开(公告)号：US10951238B1

公开(公告)日：2021-03-16

申请号：US16795657

申请日：2020-02-20

Applicant: Kioxia Corporation

Inventor： Daiki Watanabe

IPC: H03M13/00 ,  H03M13/29 ,  G06F11/10 ,  H03M13/15

Abstract: A memory system of an embodiment includes a non-volatile memory and a memory controller. The memory controller generates an error correction code including a first and second symbol groups. The first symbol group is a set of symbols shared between a first component code and a third component code and/or a fourth component code. The second symbol group is a set of symbols shared between a second component code and the third component code and/or the fourth component code. The first and third component codes have a lower correction capability than the second and fourth component codes, respectively. The ratio of symbols protected by the third component code is smaller in the second symbol group than in the first symbol group. The ratio of symbols protected by the fourth component code is larger in the second symbol group than in the first symbol group.

公开(公告)号：US11768732B2

公开(公告)日：2023-09-26

申请号：US17530748

申请日：2021-11-19

Applicant: KIOXIA CORPORATION

Inventor： Yuta Kumano ,  Hironori Uchikawa ,  Kosuke Morinaga ,  Naoaki Kokubun ,  Masahiro Kiyooka ,  Yoshiki Notani ,  Kenji Sakurada ,  Daiki Watanabe

IPC: G11C29/00 ,  G06F11/10 ,  G11C11/56 ,  H03M13/00 ,  H03M13/37 ,  G11C29/52 ,  H03M13/11 ,  G11C29/04 ,  G11C16/26 ,  G11C29/42

CPC classification number: G06F11/1048 ,  G06F11/1012 ,  G06F11/1044 ,  G06F11/1068 ,  G11C11/5642 ,  G11C29/52 ,  H03M13/3715 ,  H03M13/3746 ,  H03M13/6325 ,  G11C16/26 ,  G11C29/42 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/1108 ,  H03M13/1111

Abstract: According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.