公开(公告)号：US11886738B2

公开(公告)日：2024-01-30

申请号：US17887873

申请日：2022-08-15

Applicant: Kioxia Corporation

Inventor： Takahiro Kubota ,  Hironori Uchikawa ,  Yuta Kumano

IPC: G06F3/06

CPC classification number: G06F3/0658 ,  G06F3/0619 ,  G06F3/0679

Abstract: A memory controller determines the number of pieces of correction information of an a-th correction information for each of M component codes according to a value based on the number of component codes, and determines a correction information address which is an address on a correction information memory of the a-th correction information based on the number of pieces of correction information. The memory controller calculates an a-th soft-input value for an a-th component code, inputting the a-th soft-input value to execute decoding processing of the a-th component code, calculates a decoded word of the a-th component code, a-th correction information, and a-th reliability information, stores the a-th correction information and b-th correction information indicating a b-th corrected location (1≤b≤nj) in a j-th dimension (j≠i, 1≤j≤N) in the correction information address of the correction information memory, stores a-th reliability information in a reliability information memory, and outputs an output decoded word calculated from the read information and the reliability information of each component code.

公开(公告)号：US11652496B2

公开(公告)日：2023-05-16

申请号：US17463818

申请日：2021-09-01

Applicant: Kioxia Corporation

Inventor： Yuta Kumano ,  Hironori Uchikawa

IPC: H03M13/15 ,  G06F11/10

CPC classification number: H03M13/1565 ,  G06F11/1068

Abstract: A memory system of an embodiment includes a non-volatile memory and a memory controller. The memory controller executes a first decoding process of reading data encoded by an error correction code from the non-volatile memory and repeatedly executing bounded distance decoding on a symbol group protected by each of component codes included in N component code groups; executes a second decoding process of repeatedly executing decoding exceeding a bounded distance in units of component codes for an error symbol group determined to include an error due to a syndrome of a component code included in the N component code groups when the first decoding process fails; executes a rollback process when the first decoding process executed after the second decoding process fails; and changes a parameter used in the second decoding process and further executes the second decoding process when it is detected that the second decoding process is not progressed.

公开(公告)号：US11768732B2

公开(公告)日：2023-09-26

申请号：US17530748

申请日：2021-11-19

Applicant: KIOXIA CORPORATION

Inventor： Yuta Kumano ,  Hironori Uchikawa ,  Kosuke Morinaga ,  Naoaki Kokubun ,  Masahiro Kiyooka ,  Yoshiki Notani ,  Kenji Sakurada ,  Daiki Watanabe

IPC: G11C29/00 ,  G06F11/10 ,  G11C11/56 ,  H03M13/00 ,  H03M13/37 ,  G11C29/52 ,  H03M13/11 ,  G11C29/04 ,  G11C16/26 ,  G11C29/42

CPC classification number: G06F11/1048 ,  G06F11/1012 ,  G06F11/1044 ,  G06F11/1068 ,  G11C11/5642 ,  G11C29/52 ,  H03M13/3715 ,  H03M13/3746 ,  H03M13/6325 ,  G11C16/26 ,  G11C29/42 ,  G11C2029/0409 ,  G11C2029/0411 ,  H03M13/1108 ,  H03M13/1111

Abstract: According to one embodiment, a memory system includes a non-volatile memory, a memory interface that reads data recorded in the non-volatile memory as a received value, a converting unit that converts the received value to first likelihood information by using a first conversion table, a decoder that decodes the first likelihood information, a control unit that outputs an estimated value with respect to the received value, which is a decoding result obtained by the decoding, when decoding by the decoder has succeeded, and a generating unit that generates a second conversion table based on a decoding result obtained by the decoding, when decoding of the first likelihood information by the decoder has failed. When the generating unit generates the second conversion table, the converting unit converts the received value to the second likelihood information by using the second conversion table, and the decoder decodes the second likelihood information.

公开(公告)号：US11309918B2

公开(公告)日：2022-04-19

申请号：US17005282

申请日：2020-08-27

Applicant: KIOXIA CORPORATION

Inventor： Yuta Kumano ,  Hironori Uchikawa

IPC: H03M13/00 ,  H03M13/15 ,  G06F11/07 ,  H03M13/11

Abstract: A memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory stores a multidimensional error correction code in which each of a plurality of symbol groups is encoded by both a first component code and a second component code. The memory controller reads the error correction code from the nonvolatile memory, executes a first decoding process using the first component code and the second component code, and when the first decoding process fails, executes a second decoding process on an error symbol group. The second decoding process includes a process of selecting the positions of a plurality of symbols whose values included in the error symbol group are to be inverted according to a decision rule. The decision rule includes a rule for cyclically shifting a position selected for the second decoding process at to decide the position for the second decoding process at the next time.

公开(公告)号：US11664822B2

公开(公告)日：2023-05-30

申请号：US17680164

申请日：2022-02-24

Applicant: KIOXIA CORPORATION

Inventor： Yuta Kumano ,  Hironori Uchikawa

IPC: H03M13/00 ,  H03M13/11 ,  H03M13/15 ,  G06F11/10 ,  H03M13/37 ,  H03M13/45

CPC classification number: H03M13/1111 ,  G06F11/1068 ,  H03M13/1575 ,  H03M13/3723 ,  H03M13/45

Abstract: A memory system includes an encoder and a decoder. The encoder is configured to generate multi-dimensionally-coded data to be written into the non-volatile memory. Data bits of the multi-dimensionally-coded data are grouped into first and second dimensional codes with respect to first and second dimensions, respectively. The decoder is configured to, with respect to each of the first and second dimensional codes included in read multi-dimensionally-coded data, generate a syndrome value of the dimensional code, generate low-reliability location information, generate a soft-input value based on the syndrome value and the low-reliability location information, decode the dimensional code through correction of the dimensional code using the soft-input value, and store modification information indicating a bit of the dimensional code corrected through the correction and reliability information indicating reliability of the correction. The decoder generates the soft-input value also based on the modification information and the reliability information in the memory.

公开(公告)号：US11204831B2

公开(公告)日：2021-12-21

申请号：US16804940

申请日：2020-02-28

Applicant: KIOXIA CORPORATION

Inventor： Yuta Kumano ,  Hironori Uchikawa

IPC: G06F11/10 ,  H03M13/15

Abstract: A memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory has data encoded with an error correction code stored therein. The memory controller reads data from the nonvolatile memory, calculates likelihood information from the read data and an LLR table for calculating the likelihood information, determines a parameter for a decoding process of the read data based on the likelihood information, executes the decoding process based on the determined parameter, and outputs a decoding result obtained by the decoding process.