公开(公告)号：US20110108895A1

公开(公告)日：2011-05-12

申请号：US12983477

申请日：2011-01-03

申请人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

发明人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

IPC分类号： H01L29/78 ,  H01L21/3065

CPC分类号： H01L21/67069 ,  H01J37/32733 ,  H01J2237/20207 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/7835 ,  H01L29/7848 ,  H01L29/78654

摘要： A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.

摘要翻译： 制造不对称间隔物的方法，使用不对称间隔物制造的结构和用于制造不对称间隔物的装置。 该方法包括：在基底上形成具有顶表面和相对的第一和第二侧壁并具有平行于侧壁的纵向轴线的结构; 在所述基底的顶表面，所述结构的顶表面和所述结构的侧壁上形成共形层; 相对于反应离子通量使基板围绕纵向轴线倾斜，反应离子的流量以锐角撞击共形层; 以及将所述共形层暴露于所述反应离子的通量，直到所述共形层从所述结构的顶表面去除并且所述衬底的顶表面在所述第一侧壁上留下第一间隔物，并且在所述第二侧壁上留下第二间隔物，所述第一 间隔物比第二间隔物薄。

公开(公告)号：US07892928B2

公开(公告)日：2011-02-22

申请号：US11690258

申请日：2007-03-23

申请人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

发明人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

IPC分类号： H01L21/336

CPC分类号： H01L21/67069 ,  H01J37/32733 ,  H01J2237/20207 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/7835 ,  H01L29/7848 ,  H01L29/78654

摘要： A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.

摘要翻译： 制造不对称间隔物的方法，使用不对称间隔物制造的结构和用于制造不对称间隔物的装置。 该方法包括：在基底上形成具有顶表面和相对的第一和第二侧壁并具有平行于侧壁的纵向轴线的结构; 在所述基底的顶表面，所述结构的顶表面和所述结构的侧壁上形成共形层; 相对于反应离子通量使基板围绕纵向轴线倾斜，反应离子的流量以锐角撞击共形层; 以及将所述保形层暴露于所述反应性离子的通量，直到所述保形层从所述结构的顶表面去除并且所述衬底的顶表面在所述第一侧壁上离开第一间隔物，并在所述第二侧壁上留下第二间隔物，所述第一 间隔物比第二间隔物薄。

公开(公告)号：US20080233691A1

公开(公告)日：2008-09-25

申请号：US11690258

申请日：2007-03-23

申请人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

发明人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

IPC分类号： H01L21/8234

CPC分类号： H01L21/67069 ,  H01J37/32733 ,  H01J2237/20207 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/7835 ,  H01L29/7848 ,  H01L29/78654

摘要： A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.

摘要翻译： 制造不对称间隔物的方法，使用不对称间隔物制造的结构和用于制造不对称间隔物的装置。 该方法包括：在基底上形成具有顶表面和相对的第一和第二侧壁并具有平行于侧壁的纵向轴线的结构; 在所述基底的顶表面，所述结构的顶表面和所述结构的侧壁上形成共形层; 相对于反应离子通量使基板围绕纵向轴线倾斜，反应离子的流量以锐角撞击共形层; 以及将所述保形层暴露于所述反应性离子的通量，直到所述保形层从所述结构的顶表面去除并且所述衬底的顶表面在所述第一侧壁上离开第一间隔物，并在所述第二侧壁上留下第二间隔物，所述第一 间隔物比第二间隔物更薄。

公开(公告)号：US08829612B2

公开(公告)日：2014-09-09

申请号：US12983477

申请日：2011-01-03

申请人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

发明人： Kangguo Cheng ,  Xi Li ,  Richard Stephen Wise

IPC分类号： H01L29/66

CPC分类号： H01L21/67069 ,  H01J37/32733 ,  H01J2237/20207 ,  H01L21/3086 ,  H01L21/31116 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/66636 ,  H01L29/66659 ,  H01L29/66772 ,  H01L29/7835 ,  H01L29/7848 ,  H01L29/78654

摘要： A method of fabricating asymmetrical spacers, structures fabricated using asymmetrical spacers and an apparatus for fabricating asymmetrical spacers. The method includes: forming on a substrate, a structure having a top surface and opposite first and second sidewalls and having a longitudinal axis parallel to the sidewalls; forming a conformal layer on the top surface of the substrate, the top surface of the structure and the sidewalls of the structure; tilting the substrate about a longitudinal axis relative to a flux of reactive ions, the flux of reactive ions striking the conformal layer at acute angle; and exposing the conformal layer to the flux of reactive ions until the conformal layer is removed from the top surface of the structure and the top surface of the substrate leaving a first spacer on the first sidewall and a second spacer on the second sidewall, the first spacer thinner than the second spacer.

摘要翻译： 制造不对称间隔物的方法，使用不对称间隔物制造的结构和用于制造不对称间隔物的装置。 该方法包括：在基底上形成具有顶表面和相对的第一和第二侧壁并具有平行于侧壁的纵向轴线的结构; 在所述基底的顶表面，所述结构的顶表面和所述结构的侧壁上形成共形层; 相对于反应离子通量使基板围绕纵向轴线倾斜，反应离子的流量以锐角撞击共形层; 以及将所述共形层暴露于所述反应离子的通量，直到所述共形层从所述结构的顶表面去除并且所述衬底的顶表面在所述第一侧壁上留下第一间隔物，并且在所述第二侧壁上留下第二间隔物，所述第一 间隔物比第二间隔物薄。

公开(公告)号：US07833872B2

公开(公告)日：2010-11-16

申请号：US11931112

申请日：2007-10-31

申请人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

发明人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

IPC分类号： H01L21/20 ,  H01L21/311

CPC分类号： H01L21/32137 ,  H01L21/32115 ,  H01L29/66181

摘要： Columnar elements which extend to varying heights above a major surface of a substrate, e.g., polysilicon studs within trenches in the substrate, are recessed to a uniform depth below the major surface. The columnar elements are etched selectively with respect to a material exposed at the surface in an at least partly lateral direction so that the columnar elements are recessed to a uniform depth below the major surface at walls of the trenches.

摘要翻译： 在衬底的主表面上方延伸到不同高度的柱状元件（例如衬底中的沟槽内的多晶硅柱）凹陷到主表面下方的均匀深度。 相对于在表面上以至少部分横向方向暴露的材料，柱状元件被选择性地蚀刻，使得柱状元件在沟槽的壁处凹陷到主表面下方的均匀深度。

公开(公告)号：US07749835B2

公开(公告)日：2010-07-06

申请号：US12048263

申请日：2008-03-14

申请人： Xi Li ,  Kangguo Cheng ,  Johnathan Faltermeier

发明人： Xi Li ,  Kangguo Cheng ,  Johnathan Faltermeier

IPC分类号： H01L21/84 ,  H01L21/8242

CPC分类号： H01L29/945 ,  H01L21/32137 ,  H01L21/76232 ,  H01L21/84 ,  H01L27/1087 ,  H01L29/66181

摘要： A semiconductor structure is described. The structure includes a trench opening formed in a semiconductor substrate having a semiconductor-on-insulator (SOI) layer and a buried insulating (BOX) layer; and a filling material formed in the trench opening, the filling material forming a “V” shape within the trench memory cell, wherein the “V” shape includes a top portion substantially adjacent to a top surface of the BOX layer. A method of fabricating the semiconductor structure is also described. The method includes forming a trench opening in a semiconductor substrate having an SOI layer and a BOX layer; laterally etching the BOX layer such that a portion of the trench opening associated with the BOX layer is substantially greater than a portion of the trench opening associated with the SOI layer; filling the trench opening with a filling material; and recessing the filling material.

摘要翻译： 描述半导体结构。 该结构包括形成在具有绝缘体上半导体（SOI）层和掩埋绝缘（BOX）层的半导体衬底中的沟槽开口; 以及形成在所述沟槽开口中的填充材料，所述填充材料在所述沟槽存储单元内形成“V”形，其中所述“V”形包括基本上邻近所述BOX层的顶表面的顶部。 还描述了制造半导体结构的方法。 该方法包括在具有SOI层和BOX层的半导体衬底中形成沟槽开口; 横向蚀刻BOX层，使得与BOX层相关联的沟槽开口的一部分基本上大于与SOI层相关联的沟槽开口的一部分; 用填充材料填充沟槽开口; 并使填充材料凹陷。

公开(公告)号：US07560387B2

公开(公告)日：2009-07-14

申请号：US11275707

申请日：2006-01-25

申请人： Scott D. Allen ,  Kangguo Cheng ,  Xi Li ,  Kevin R. Winstel

发明人： Scott D. Allen ,  Kangguo Cheng ,  Xi Li ,  Kevin R. Winstel

IPC分类号： H01L21/311

CPC分类号： H01L21/3081 ,  H01L21/31116

摘要： Methods for opening a hard mask and a silicon-on-insulator substrate in a single process chamber are disclosed. In one embodiment, the method includes patterning a photoresist over a stack including an anti-reflective coating (ARC) layer, a silicon dioxide (SiO2) based hard mask layer, a silicon nitride pad layer, a silicon dioxide (SiO2) pad layer and the SOI substrate, wherein the SOI substrate includes a silicon-on-insulator layer and a buried silicon dioxide (SiO2) layer; and in a single process chamber: opening the ARC layer; etching the silicon dioxide (SiO2) based hard mask layer; etching the silicon nitride pad layer; etching the silicon dioxide (SiO2) pad layer; and etching the SOI substrate. Etching all layers in a single chamber reduces the turn-around-time, lowers the process cost, facilitates process control and/or improve a trench profile.

摘要翻译： 公开了在单个处理室中打开硬掩模和绝缘体上硅衬底的方法。 在一个实施例中，该方法包括在包括抗反射涂层（ARC）层，基于二氧化硅（SiO 2）的硬掩模层，氮化硅衬垫层，二氧化硅（SiO 2）衬垫层和叠层 SOI衬底，其中所述SOI衬底包括绝缘体上硅层和掩埋二氧化硅（SiO 2）层; 并在单个处理室中：打开ARC层; 蚀刻基于二氧化硅（SiO 2）的硬掩模层; 蚀刻氮化硅焊盘层; 蚀刻二氧化硅（SiO 2）垫层; 并蚀刻SOI衬底。 在单个室中蚀刻所有层减少了周转时间，降低了工艺成本，便于工艺控制和/或改善沟槽轮廓。

公开(公告)号：US20090108306A1

公开(公告)日：2009-04-30

申请号：US11931112

申请日：2007-10-31

申请人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

发明人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

IPC分类号： H01L29/94 ,  H01L21/311

CPC分类号： H01L21/32137 ,  H01L21/32115 ,  H01L29/66181

摘要： Columnar elements which extend to varying heights above a major surface of a substrate, e.g., polysilicon studs within trenches in the substrate, are recessed to a uniform depth below the major surface. The columnar elements are etched selectively with respect to a material exposed at the surface in an at least partly lateral direction so that the columnar elements are recessed to a uniform depth below the major surface at walls of the trenches.

摘要翻译： 在衬底的主表面上方延伸到不同高度的柱状元件（例如衬底中的沟槽内的多晶硅柱）凹陷到主表面下方的均匀深度。 相对于在表面上以至少部分横向方向暴露的材料选择性地蚀刻柱状元件，使得柱状元件在沟槽的壁处凹陷到主表面下方的均匀深度。

公开(公告)号：US07494891B2

公开(公告)日：2009-02-24

申请号：US11533928

申请日：2006-09-21

申请人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

发明人： Kangguo Cheng ,  Johnathan E. Faltermeier ,  Xi Li

IPC分类号： H01L21/20

CPC分类号： H01L29/945 ,  H01L29/66181

摘要： A method forms a node dielectric in a bottle shaped trench and then deposits an initial conductor within the lower portion of the bottle shaped trench, such that a void is formed within the initial conductor. Next, the method forms an insulating collar in the upper portion of the bottle shaped trench above the initial conductor. Then, the method simultaneously etches a center portion of the insulating collar and the initial conductor until the void is exposed. This etching process forms a center opening within the insulating collar and the initial conductor. Additional conductor is deposited in the center opening such that the additional conductor is formed at least to the level of the surface of the substrate.

摘要翻译： 一种方法在瓶形沟槽中形成节点电介质，然后将初始导体沉积在瓶形沟槽的下部，使得在初始导体内形成空隙。 接下来，该方法在初始导体上方的瓶形沟槽的上部形成绝缘套环。 然后，该方法同时蚀刻绝缘套环的中心部分和初始导体，直到暴露出空隙。 该蚀刻工艺在绝缘环和初始导体内形成中心开口。 附加导体沉积在中心开口中，使得附加导体至少形成至基底表面的水平。

公开(公告)号：US20080248625A1

公开(公告)日：2008-10-09

申请号：US12120535

申请日：2008-05-14

申请人： Kangguo Cheng ,  David M. Dobuzinsky ,  Xi Li

发明人： Kangguo Cheng ,  David M. Dobuzinsky ,  Xi Li

IPC分类号： H01L21/441

CPC分类号： H01L29/945 ,  H01L28/84 ,  H01L29/66181

摘要： Methods for enhancing trench capacitance and a trench capacitor so formed are disclosed. In one embodiment a method includes forming a first portion of a trench; depositing a dielectric layer in the first portion; performing a reactive ion etching including a first stage to etch the dielectric layer and form a micro-mask on a bottom surface of the first portion of the trench and a second stage to form a second portion of the trench having a rough sidewall; depositing a node dielectric; and filling the trench with a conductor. The rough sidewall enhances trench capacitance without increasing processing complexity or cost.