公开(公告)号：US08259453B2

公开(公告)日：2012-09-04

申请号：US12964821

申请日：2010-12-10

申请人： Kaori Morita ,  Tomoyasu Yamada ,  Tamotsu Kiyakawauchi ,  Akitomi Katsumura ,  Koji Shiozawa

发明人： Kaori Morita ,  Tomoyasu Yamada ,  Tamotsu Kiyakawauchi ,  Akitomi Katsumura ,  Koji Shiozawa

IPC分类号： H05K7/02

CPC分类号： G06K19/07743

摘要： Disclosed herein is a card device including a semiconductor package section having memory functions and a substrate section joined to the semiconductor package section by superposition and mounted by a variety of electronic components. The semiconductor package section includes a card-side connector section having card-side terminals for inputting and outputting information signals, and package-side terminals at a location at which the semiconductor package section is joined to the substrate section by superposition. The substrate section includes substrate-side terminals at a location at which the substrate section is connected to the semiconductor package section by superposition. The substrate section is electrically joined to the semiconductor package section by making use of the package-side terminals and the substrate-side terminals. The superposition junction between the semiconductor package section and the substrate section is provided with such an offset that the card-side connector protrudes out off the card device.

摘要翻译： 本文公开了一种卡装置，其包括具有存储功能的半导体封装部分和通过叠加并通过各种电子部件安装而连接到半导体封装部分的基板部分。 半导体封装部分包括具有用于输入和输出信息信号的卡侧端子的卡侧连接器部分和在半导体封装部分通过叠加与基板部分接合的位置处的封装侧端子。 基板部分包括在基板部分通过叠加连接到半导体封装部分的位置处的基板侧端子。 通过使用封装侧端子和基板侧端子将基板部电连接到半导体封装部。 半导体封装部和基板部之间的叠合接合部设置有使卡侧连接器从卡装置突出的偏移。

公开(公告)号：US07271579B2

公开(公告)日：2007-09-18

申请号：US10506641

申请日：2003-03-06

申请人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

发明人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

IPC分类号： G01R19/22

CPC分类号： G01R19/16538 ,  G01R19/04

摘要： An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.

摘要翻译： 由交流电源1产生的交流电压由全波整流电路2整流，产生整流电压。 内部稳压器33对整流电压进行波形整形。 比较器42将来自内部调节器33的整流电压与参考电压V 1进行比较，并检测整流电压超过参考电压V 1的周期。 根据比较器42的输出信号，确定信号生成电路50确定从AC电源1提供的电源电压，并产生确定信号。 因此，不需要用于检测整流电压的峰值的电容器等，并且可以减小AC电压检测电路的尺寸和成本。

公开(公告)号：US07187628B2

公开(公告)日：2007-03-06

申请号：US10914186

申请日：2004-08-10

申请人： Takayuki Iijima ,  Hiroshi Kobayashi ,  Katsuaki Yamanoi ,  Shinichiro Abe ,  Tomoyasu Yamada

发明人： Takayuki Iijima ,  Hiroshi Kobayashi ,  Katsuaki Yamanoi ,  Shinichiro Abe ,  Tomoyasu Yamada

IPC分类号： G11B21/08

CPC分类号： G11B27/105 ,  G11B27/034 ,  G11B27/329 ,  G11B27/34 ,  G11B2220/20 ,  G11B2220/2525 ,  G11B2220/2529 ,  G11B2220/2545

摘要： Management information is read from an information storage medium having the management information recorded thereon, the management information including track number information imparted to at least one track and group management information for managing as selective recording information one or a plurality of tracks as one group. Judgment is then made upon whether the group management information is included in that management information. A display mode is changed depending on a case where the group management information is recorded and a case where it is not recorded, and it is then displayed in a displaying device.

摘要翻译： 从其上记录有管理信息的信息存储介质读取管理信息，管理信息包括赋予至少一个轨道的轨道号信息和用于将一个或多个轨道作为选择记录信息管理为一组的组管理信息。 然后判断组管理信息是否包括在该管理信息中。 显示模式根据记录组管理信息的情况和未被记录的情况而改变，然后显示在显示装置中。

公开(公告)号：US06842350B2

公开(公告)日：2005-01-11

申请号：US10858432

申请日：2004-06-01

申请人： Tomoyasu Yamada ,  Masaaki Simada

发明人： Tomoyasu Yamada ,  Masaaki Simada

IPC分类号： H02M3/28 ,  H02M3/335

CPC分类号： H02M3/33507 ,  H02M3/335 ,  H02M2001/0006

摘要： A dc-to-dc converter includes a transformer having a primary winding connected to an input rectifying and smoothing circuit via an FET or like switching device, and a secondary winding connected to an output rectifying and smoothing circuit. A resonance capacitor is connected in parallel with the switching device. A switch control circuit cyclically turns the switching device on and off so as to keep constant the output voltage of the output rectifying and smoothing circuit by feedback control. The switch control circuit drives the switching device in light load mode when a flyback voltage developed by the transformer terminates earlier than each clock pulse, and in heavy load mode, in which each on-off cycle of the switching device is longer than in the light load mode, when the flyback voltage terminates later than each clock pulse.

摘要翻译： 一个直流 - 直流转换器包括一个变压器，其变压器具有通过FET等开关装置连接到输入整流和平滑电路的初级绕组，以及连接到输出整流和平滑电路的次级绕组。 谐振电容器与开关装置并联连接。 开关控制电路循环地打开和关闭开关装置，以通过反馈控制保持输出整流和平滑电路的输出电压恒定。 当变压器产生的反激电压早于每个时钟脉冲时，开关控制电路在轻负载模式下驱动开关器件，并且在重负载模式中，开关器件的每个开 - 关周期都比在光中长 当回扫电压在每个时钟脉冲之后结束时，负载模式。

公开(公告)号：US6134123A

公开(公告)日：2000-10-17

申请号：US455285

申请日：1999-12-06

申请人： Tomoyasu Yamada

发明人： Tomoyasu Yamada

IPC分类号： H02M3/335 ,  H02M3/24

CPC分类号： H02M3/33507 ,  H02M2001/0025

摘要： The switch-mode dc power supply includes a series circuit, a rectifier, an output smoothing circuit, detection circuit, an adding circuit, a triangular wave generator and a control signal generator. The series circuit includes a primary winding of a HF transformer, a semiconductor switching element and a current detection unit connected between two output terminals of a rectifier/smoothing circuit. The rectifier is connected to an end of a secondary winding of the HF transformer. The output smoothing circuit is connected between the rectifier and other end of the secondary winding. The detection circuit is connected to a connection point between the rectifier and the output smoothing circuit. The adding circuit is connected between the detection circuit and a connection point between the semiconductor switching element and the current detection unit. The adding circuit has a current mirror and a current detector. The triangular wave generator is connected to the adding circuit. And the control signal generator is connected between the adding circuit and a control electrode of the semiconductor switching element, and further is connected to the triangular wave generator. The adding circuit adds a voltage corresponding to a dc output signal at the secondary winding to a voltage corresponding to a current flowing in the semiconductor switching element so as to obtain an augmented voltage signal. The gate electrode is supplied with a drive signal keeping the "H" level until the augmented voltage signal reaches the triangular wave signal. Then, the power supply operates with good stability.

摘要翻译： 开关型直流电源包括串联电路，整流器，输出平滑电路，检测电路，加法电路，三角波发生器和控制信号发生器。 串联电路包括HF变压器的初级绕组，半导体开关元件和连接在整流/平滑电路的两个输出端之间的电流检测单元。 整流器连接到HF变压器的次级绕组的一端。 输出平滑电路连接在整流器与次级绕组的另一端之间。 检测电路连接到整流器和输出平滑电路之间的连接点。 加法电路连接在检测电路和半导体开关元件与电流检测单元之间的连接点之间。 加法电路具有电流镜和电流检测器。 三角波发生器连接到加法电路。 并且控制信号发生器连接在加法电路和半导体开关元件的控制电极之间，并且还连接到三角波发生器。 加法电路将对应于次级绕组上的直流输出信号的电压加到与在半导体开关元件中流动的电流相对应的电压，以获得增强的电压信号。 向门电极提供保持“H”电平的驱动信号，直到增大的电压信号达到三角波信号。 然后，电源稳定运行。

公开(公告)号：US08466531B2

公开(公告)日：2013-06-18

申请号：US13317369

申请日：2011-10-17

申请人： Ryotaro Seo ,  Tohru Itoh ,  Yukihiko Tsukuda ,  Tomoyasu Yamada

发明人： Ryotaro Seo ,  Tohru Itoh ,  Yukihiko Tsukuda ,  Tomoyasu Yamada

IPC分类号： H01L31/0232 ,  H01L21/00

CPC分类号： H01L27/14618 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/49175 ,  H04N5/2253 ,  H04N5/2254 ,  H01L2924/00

摘要： An imaging device package includes: an imaging device chip; a substrate on which the imaging device chip is mounted; a wire that electrically connects the imaging device chip and the substrate at a peripheral edge of the substrate around the imaging device chip; a supporting body that supports an optical member with respect to the substrate; and a bonding section that bonds the supporting body to the substrate while sealing the wire and a bonding terminal of the wire at the peripheral edge of the substrate.

摘要翻译： 一种成像装置包括：成像装置芯片; 其上安装有成像装置芯片的基板; 在成像器件芯片周围的基板的周边缘处电连接成像器件芯片和基板的引线; 支撑体，其相对于所述基板支撑光学构件; 以及接合部，其在将所述线密封的情况下将所述支撑体与所述基板接合，以及所述线在所述基板的周缘处的接合端子。

公开(公告)号：US07639516B2

公开(公告)日：2009-12-29

申请号：US11284986

申请日：2005-11-21

申请人： Hiroshi Usui ,  Tomoyasu Yamada ,  Masaaki Shimada

发明人： Hiroshi Usui ,  Tomoyasu Yamada ,  Masaaki Shimada

IPC分类号： H02M3/335

CPC分类号： H02M3/33507

摘要： The ON duration of an N channel MOS transistor is set based on a target voltage at a node between a resistor and a light receiving element of a photocoupler. A comparator compares the target voltage with a reference voltage at a node between a variable resistor and a resistor. A normal mode and a low frequency operation mode are switched from one to the other based on an output signal from the comparator. The resistance of the variable resistor becomes low when an input voltage from a power source is high. Even when the input voltage is high, therefore, the ON duration of the N channel MOS transistor at the transition between the normal mode and the low frequency operation mode becomes short. This reduces the switching energy in low frequency operation mode, thereby suppressing noise.

摘要翻译： 基于光电耦合器的电阻器和光接收元件之间的节点处的目标电压来设定N沟道MOS晶体管的导通时间。 比较器将目标电压与可变电阻和电阻之间的节点处的参考电压进行比较。 基于来自比较器的输出信号，正常模式和低频操作模式从一个切换到另一个。 当电源的输入电压高时，可变电阻器的电阻变低。 因此即使在输入电压高的情况下，在正常模式与低频工作模式之间的转换时，N沟道MOS晶体管的导通时间变短。 这降低了低频操作模式中的开关能量，从而抑制噪声。

公开(公告)号：US07272018B2

公开(公告)日：2007-09-18

申请号：US10538440

申请日：2003-12-09

申请人： Tomoyasu Yamada ,  Masaaki Shimada

发明人： Tomoyasu Yamada ,  Masaaki Shimada

IPC分类号： H02M3/335

CPC分类号： H02M1/4208 ,  H02M2001/0032 ,  Y02B70/126 ,  Y02B70/16 ,  Y02P80/112

摘要： By an NMOS (22) being switched on or off, a direct-current voltage E0 is charged in a capacitor (24), and a DC/DC converting circuit (30) charges a direct-current output voltage V0 to be supplied to a load L in a capacitor (34). A load state detection circuit (40) determines whether the load L is in a lightly loaded state or in a non-lightly loaded state, and outputs a signal (S40) as a determination signal. When the load state detection circuit (40) outputs a signal (S41) of “L” as a signal representing that it is a lightly loaded state, a time period setting circuit (41) outputs a signal (S41) of “L” after a preset time period elapses. A PFC on/off switching circuit (42) is supplied with the signal (S41) of “L”, and outputs a control signal (S25) of “L” to a power factor improvement circuit (20). Accordingly, in the case where the load L enters a lightly loaded state, the operation of the power factor improvement circuit (20) is stopped when the preset time elapses.

摘要翻译： 通过接通或断开的NMOS（22），在电容器（24）中充电直流电压E ，并且DC / DC转换电路（30）对直流电 输出电压V 0 <0>被提供给电容器34中的负载L. 负载状态检测电路（40）判定负载L是处于轻负载状态还是处于非轻负载状态，并输出信号（S40）作为判定信号。 当负载状态检测电路（40）输出“L”的信号（S41）作为表示轻载状态的信号时，时段设定电路（41）输出“S” “经过预设时间段。 PFC导通/截止开关电路（42）被提供有“L”的信号（S 41），并将一个“L”的控制信号（S25）输出到功率因数改善电路（20）。 因此，在负载L进入轻负载状态的情况下，当经过预设时间时，功率因数改善电路20的动作停止。

公开(公告)号：US20050151567A1

公开(公告)日：2005-07-14

申请号：US10506641

申请日：2003-03-06

申请人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

发明人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

IPC分类号： G01R19/04 ,  G01R19/165 ,  H03K5/153

CPC分类号： G01R19/16538 ,  G01R19/04

摘要： An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.

摘要翻译： 由交流电源1产生的交流电压由全波整流电路2整流，产生整流电压。 内部稳压器33对整流电压进行波形整形。 比较器42将来自内部调节器33的整流电压与参考电压V 1进行比较，并检测整流电压超过参考电压V 1的周期。根据比较器42的输出信号，确定信号产生电路 50确定从AC电源1提供的电源电压并产生确定信号。 因此，不需要用于检测整流电压的峰值的电容器等，并且可以减小AC电压检测电路的尺寸和成本。

公开(公告)号：US20050018458A1

公开(公告)日：2005-01-27

申请号：US10496161

申请日：2002-11-28

申请人： Masaaki Shimada ,  Tomoyasu Yamada

发明人： Masaaki Shimada ,  Tomoyasu Yamada

IPC分类号： H02M1/00 ,  H02M1/42 ,  H02M7/00

CPC分类号： H02M1/4225 ,  H02M2001/0025 ,  Y02B70/126

摘要： A switching power supply such that the step-up ratio of when the power-factor is improved does not increase, and the conversion efficiency can be improved. In a case where the error voltage Ver outputted from a conductance amplifier (23) increases over a reference voltage Vref2, a switching signal of high level is outputted from a comparator (59) to a FET (57) to turn on the FET (57). Therefore a resistor (56) is bypassed, and as a result a reference voltage Vref1 inputted into the conductance amplifier (23) is changed from a reference voltage Vrefl-1 to Vrefl-2 of lower level. Further, since the variation of the error voltage Ver outputted from the conductance amplifier (23) decreases, the output voltage Vout also decreases.

摘要翻译： 开关电源使得功率因数提高时的升压比不增加，并且可以提高转换效率。 在从电导放大器（23）输出的误差电压Ver超过参考电压Vref2的情况下，高电平的开关信号从比较器（59）输出到FET（57）以导通FET（57） ） 因此，旁路电阻（56），结果，输入到电导放大器（23）的参考电压Vref1从较低电平的参考电压Vrefl-1变为Vrefl-2。 此外，由于从电导放大器（23）输出的误差电压Ver的变化减小，所以输出电压Vout也降低。