公开(公告)号：US20070096793A1

公开(公告)日：2007-05-03

申请号：US11469907

申请日：2006-09-05

申请人： Katsuhiro Kato ,  Kenji Ichikawa ,  Atsushi Nagayama

发明人： Katsuhiro Kato ,  Kenji Ichikawa ,  Atsushi Nagayama

IPC分类号： H03H11/40

CPC分类号： H03K19/00315 ,  H01L27/0266

摘要： A semiconductor device includes first and second lines, a first transistor configured to electrically connect with the second line, and a second transistor configured to electrically connect the first line and the first transistor, the second transistor being turned ON when a bias voltage for operation is impressed between the first and second lines.

摘要翻译： 半导体器件包括第一和第二线，被配置为与第二线电连接的第一晶体管和被配置为电连接第一线和第一晶体管的第二晶体管，当操作偏置电压为第二晶体管时，第二晶体管导通 印在第一和第二行之间。

公开(公告)号：US20070012951A1

公开(公告)日：2007-01-18

申请号：US11425706

申请日：2006-06-22

申请人： Katsuhiro Kato ,  Atsushi Nagayama ,  Kenji Ichikawa

发明人： Katsuhiro Kato ,  Atsushi Nagayama ,  Kenji Ichikawa

IPC分类号： H01L27/10

CPC分类号： H01L27/0203 ,  H01L27/0266

摘要： An improved electrostatic discharge (ESD) protection structure that is suitable for use in a large-scale CMOS circuit fabrication technology is disclosed. When surge energy enters the first conductor during an ESD event, the surge current is conducted through the first contacts of the first MOS transistors, the second contacts of the first MOS transistors, the fourth conductor, and the third contacts of the second transistors. As each third contact is paired with each second contact, the surge current is conducted from a second contact to the paired third contact. Then, the surge current is conducted through the third contacts, fourth contacts, and the second conductor. In this operation, electric fields are generated in the direction of the first contacts, the second contacts, the fourth conductor, the third contacts, and the fourth contacts. Thus, the surge current is not conducted by way of the fifth conductor from a second contact to the other second contacts against the electric fields that are generated. Therefore, the surge current is only conducted from a second contact and the paired third contact. In other words, the surge current is dispersed, and is not conducted to a specific second contact.

摘要翻译： 公开了一种适用于大规模CMOS电路制造技术的改进的静电放电（ESD）保护结构。 当在ESD事件期间浪涌能量进入第一导体时，浪涌电流通过第一MOS晶体管的第一触点，第一MOS晶体管的第二触点，第四导体和第二晶体管的第三触点传导。 当每个第三触点与每个第二触点配对时，浪涌电流从第二触点传导到成对的第三触点。 然后，浪涌电流通过第三触点，第四触点和第二导体传导。 在此操作中，在第一触点，第二触点，第四导体，第三触点和第四触点的方向上产生电场。 因此，浪涌电流不是通过第五导体从第二接触到另一个第二接触抵抗所产生的电场而进行的。 因此，浪涌电流仅从第二触点和成对的第三触点传导。 换句话说，浪涌电流是分散的，不会传导到特定的第二接触。

公开(公告)号：US07012308B2

公开(公告)日：2006-03-14

申请号：US10736706

申请日：2003-12-17

申请人： Katsuhiro Kato ,  Kenji Ichikawa

发明人： Katsuhiro Kato ,  Kenji Ichikawa

IPC分类号： H01L23/62

CPC分类号： H01L29/8611 ,  H01L29/0692 ,  H01L29/417

摘要： A diode which eliminates generation of local avalanche breakdown phenomenon when static surges in the backward direction are applied and withstands electrostatic breakdown. A P-type impurity diffused region of high concentration as an anode and an N-type impurity diffused region of high concentration as a cathode that surrounds the P-type impurity diffused region, are formed on the surface of an N-type silicon well region. The surface of the N-type silicon well region on which the impurity diffused regions are formed is covered with an interlayer dielectric, and a metal interconnect layer is formed thereon, to spread to the border line of the N-type impurity diffused region and is electrically connected to the P-type impurity diffused region. Accordingly, a P-type inversion layer IP is uniformly formed in a separation area between the impurity diffused regions when static surges in the backward direction are applied, preventing local avalanche breakdown.

摘要翻译： 一种二极管，可以消除在向后方向上的静电浪涌时产生局部雪崩击穿现象，并承受静电击穿。 作为阳极的高浓度的P型杂质扩散区域和围绕P型杂质扩散区域的高浓度的N型杂质扩散区域形成在N型硅阱区域的表面上 。 其上形成有杂质扩散区域的N型硅阱区的表面被层间电介质覆盖，并且在其上形成金属互连层，以扩散到N型杂质扩散区域的边界线，并且是 电连接到P型杂质扩散区域。 因此，当施加在向后方向上的静电浪涌时，P型反转层IP均匀地形成在杂质扩散区域之间的分离区域中，防止局部雪崩击穿。

公开(公告)号：US07791148B2

公开(公告)日：2010-09-07

申请号：US11624656

申请日：2007-01-18

申请人： Katsuhiro Kato ,  Kenji Ichikawa

发明人： Katsuhiro Kato ,  Kenji Ichikawa

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/0619 ,  H01L27/0266

摘要： A semiconductor device includes a transistor region, a first guard ring, a second guard ring, and a silicide region. A first-conductive-type transistor is formed in the transistor region. The first guard ring is a second-conductive-type first impurity diffusion layer surrounding the transistor region with a first width, and is coupled to a first reference potential. The second guard ring is a first-conductive-type transistor second impurity diffusion layer surrounding the first guard ring with a second width. The silicide region is formed on the surface of the second guard ring such that substantially no silicide is formed on a portion of the surface of the second guard ring on the side facing a drain region of the first-conductive-type transistor, and is connected to a second reference potential line whose potential is higher than that of the first reference potential line.

摘要翻译： 半导体器件包括晶体管区域，第一保护环，第二保护环和硅化物区域。 第一导电型晶体管形成在晶体管区域中。 第一保护环是围绕具有第一宽度的晶体管区域并且耦合到第一参考电位的第二导电型第一杂质扩散层。 第二保护环是围绕具有第二宽度的第一保护环的第一导电型晶体管第二杂质扩散层。 硅化物区域形成在第二保护环的表面上，使得在与第一导电型晶体管的漏极区域相对的一侧的第二保护环的表面的一部分上基本上不形成硅化物，并且连接 到第二参考电位线，其电位高于第一参考电位线的电位。

公开(公告)号：US20050012181A1

公开(公告)日：2005-01-20

申请号：US10736706

申请日：2003-12-17

申请人： Katsuhiro Kato ,  Kenji Ichikawa

发明人： Katsuhiro Kato ,  Kenji Ichikawa

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L29/06 ,  H01L29/417 ,  H01L29/861

CPC分类号： H01L29/8611 ,  H01L29/0692 ,  H01L29/417

摘要： A diode which eliminates the generation of local avalanche breakdown phenomenon when static surges in the backward direction are applied and has excellent properties to withstand electrostatic breakdown is to be provided. A P-type impurity diffused region of high concentration to be an anode and an N-type impurity diffused region of high concentration to be a cathode that surrounds the P-type impurity diffused region are formed on the front surface of an N-type silicon well region. The surface of the N-type silicon well region on which the impurity diffused regions are formed is covered with an interlayer dielectric, and a metal interconnect layer is formed thereon to spread to the border line of the N-type impurity diffused region and electrically connected to the P-type impurity diffused region. Accordingly, a P-type inversion layer IP is uniformly formed in a separation area between the impurity diffused regions when static surges in the backward direction are applied, preventing a local avalanche breakdown phenomenon.

摘要翻译： 提供一种二极管，其消除了在向后方向上的静电浪涌时产生局部雪崩击穿现象，并具有优异的耐静电特性。 在N型硅的前表面上形成作为阳极的高浓度的P型杂质扩散区域和围绕P型杂质扩散区域的作为阴极的高浓度的N型杂质扩散区域 井区。 其上形成有杂质扩散区域的N型硅阱区的表面被层间电介质覆盖，并且在其上形成金属互连层以扩散到N型杂质扩散区的边界线并电连接 到P型杂质扩散区域。 因此，当施加在向后方向上的静电浪涌时，在杂质扩散区域之间的分离区域中均匀地形成P型反型层IP，防止局部雪崩击穿现象。

公开(公告)号：US07850441B2

公开(公告)日：2010-12-14

申请号：US11946198

申请日：2007-11-28

申请人： Toshihiro Usa ,  Kenji Ichikawa ,  Kazunori Komatsu

发明人： Toshihiro Usa ,  Kenji Ichikawa ,  Kazunori Komatsu

IPC分类号： B29D17/00

CPC分类号： G03F7/0002 ,  B82Y10/00 ,  B82Y40/00 ,  G11B5/743 ,  G11B5/855 ,  Y10S425/81

摘要： There is provided a mold structure containing a substrate, and a plurality of convex portions formed in the shape of concentric circles at predetermined intervals on one surface of the substrate, wherein a cross-sectional shape of the convex portions with respect to a radial direction of the concentric circles is such that a middle width M of each of the convex portions with respect to a heightwise direction is greater than a width T of a top portion of each of the convex portions with respect to the radial direction of the concentric circles.

摘要翻译： 提供了一种包含基板的模具结构和在基板的一个表面上以预定间隔形成为同心圆形的多个凸部，其中凸部相对于基板的径向的横截面形状 同心圆使得每个凸部相对于高度方向的中间宽度M相对于同心圆的径向方向大于每个凸部的顶部的宽度T。

公开(公告)号：US07577079B2

公开(公告)日：2009-08-18

申请号：US11377323

申请日：2006-03-17

申请人： Shiho Kamisawa ,  Kenji Ichikawa

发明人： Shiho Kamisawa ,  Kenji Ichikawa

IPC分类号： G11B7/24

CPC分类号： G11B5/865 ,  G11B5/7315 ,  G11B5/82 ,  G11B5/855

摘要： The present invention provides a master disk with high flexibility and high close contact property with a slave disk to be transferred, which bears information to be transferred by magnetic transfer. When incident angle of X-ray is designated by θ, electroforming is performed such that X-ray diffraction pattern of the master substrate 11 has a 200 plane reflection at 2θ=51.0° to 53.0°, and a 220 plane reflection at 2θ=75.5° to 76.5°, and the reflection intensity ratio of X-ray diffraction of the 220 plane with respect to the 200 plane is I[220]/I[200]=2 to 30.

摘要翻译： 本发明提供一种与待传送的从盘具有高灵活性和高紧密接触特性的母盘，其承载要通过磁转移传送的信息。 当通过θ表示X射线的入射角时，进行电铸，使得主衬底11的X射线衍射图在2θ= 51.0°至53.0°处具有200平面反射，在2θ= 75.5°处具有220平面反射 °至76.5°，220平面相对于200平面的X射线衍射的反射强度比为I [220] / I [200] = 2〜30。

公开(公告)号：US20070217047A1

公开(公告)日：2007-09-20

申请号：US11716007

申请日：2007-03-09

申请人： Kenji Ichikawa ,  Toshihiro Usa ,  Kazuhiro Niitsuma ,  Tadashi Yasunaga ,  Sumio Kuroda ,  Tsugito Maruyama

发明人： Kenji Ichikawa ,  Toshihiro Usa ,  Kazuhiro Niitsuma ,  Tadashi Yasunaga ,  Sumio Kuroda ,  Tsugito Maruyama

IPC分类号： G11B5/86 ,  G11B5/82

CPC分类号： G11B5/865 ,  B82Y10/00 ,  G11B5/743 ,  G11B5/82

摘要： An aspect of the present invention provides a master medium for perpendicular magnetic transfer, comprising: a disk-like substrate on a surface of which a plurality of protruding magnetic-layer patterns corresponding to information to be transferred to a magnetic recording medium targeted for transfer are formed. In the master medium for perpendicular magnetic transfer, a ratio of a circumferential width L of the protruding magnetic-layer patterns to a circumferential gap S between the protruding magnetic-layer patterns is L/S

摘要翻译： 本发明的一个方面提供了一种用于垂直磁转移的主介质，其特征在于，包括：一个表面上的盘状衬底，其中多个突出的磁性层图案对应于要传送到用于传送的磁记录介质的信息 形成。 在用于垂直磁转移的主介质中，突出磁层图案的周向宽度L与突出磁层图案之间的周向间隙S的比率为L / S <1。 根据本发明的方面，可以进行良好的磁转移，因此可以获得没有缺陷并具有良好C / N比的垂直磁记录介质（从盘）。 另外，可以进行良好的磁转移。

公开(公告)号：US07102197B2

公开(公告)日：2006-09-05

申请号：US10766899

申请日：2004-01-30

申请人： Kenji Ichikawa

发明人： Kenji Ichikawa

IPC分类号： H01L23/62

CPC分类号： H01L27/1203 ,  H01L21/84

摘要： A salicide block area is provided around a gate electrode. Polysilicon coupling portions are formed, which extend at plurality of points from the gate electrode to an area outside of an active region. A contact provided at this inactive region electrically connects the gate electrode to gate electrode metal wiring, which is provided above the gate electrode.

摘要翻译： 在栅电极周围设置自对准硅化物块区域。 形成多晶硅耦合部分，其在从栅电极到有源区域外部的区域的多个点处延伸。 设置在该非活性区域的触点将栅电极与设置在栅电极上方的栅电极金属布线电连接。

公开(公告)号：US20060157027A1

公开(公告)日：2006-07-20

申请号：US11314204

申请日：2005-12-22

申请人： Kenji Ichikawa ,  Tamikazu Mukasa ,  Koichi Okushima

发明人： Kenji Ichikawa ,  Tamikazu Mukasa ,  Koichi Okushima

IPC分类号： F02D11/10

CPC分类号： F02D9/1065 ,  F02D9/105 ,  F02D11/10

摘要： A transmitting case includes a first case half integrally formed on one side of a throttle body, and a second case half coupled to the first case half. A first assembly is constructed by disposing a final gear inside the first case half and securing it to one end of a valve shaft. A second assembly is constructed by mounting on the second case half an electric motor and an intermediate gear of a speed reduction device for transmitting the rotation of an output shaft of the electric motor to the final gear. Upon coupling of the first case half and the second case half, the intermediate gear and the final gear are meshed with each other. Thus, there is provided an engine intake control system having an excellent assemblability and an improved accuracy of throttle valve opening degree.

摘要翻译： 传动壳体包括一体地形成在节气门体的一侧的第一壳体半部和与第一壳体半部联接的第二壳体半部。 第一组件通过在第一壳体半部内设置最终齿轮并将其固定到阀轴的一端来构造。 第二组件通过安装在第二壳体上而构成半电动机和用于将电动机的输出轴的旋转传递到最终齿轮的减速装置的中间齿轮。 在第一壳体半部和第二壳体半部联接时，中间齿轮和最终齿轮彼此啮合。 因此，提供了具有优异的组装性和提高节气门开度精度的发动机进气控制系统。