Method and apparatus for supporting IC design, and computer product
    3.
    发明授权
    Method and apparatus for supporting IC design, and computer product 有权
    支持IC设计和计算机产品的方法和装置

    公开(公告)号:US07810052B2

    公开(公告)日:2010-10-05

    申请号:US11785897

    申请日:2007-04-20

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A logical-group creating unit creates a logical group from a cell included in a selected range of a logical drawing that is specified in a logical page. A logical-group extracting unit extracts a same/similar logical group by determining whether logical drawings of created logical groups are same or similar to each other. A pattern creating unit creates an implementation pattern of a logical group included in extracted same/similar logical group.

    摘要翻译: 逻辑组创建单元从在逻辑页面中指定的逻辑绘图的选定范围中包括的单元创建逻辑组。 逻辑组提取单元通过确定所创建的逻辑组的逻辑图是否相同或相似来提取相同/相似的逻辑组。 模式创建单元创建包括在提取的相同/相似的逻辑组中的逻辑组的实现模式。

    Method and apparatus for supporting IC design, and computer product
    4.
    发明申请
    Method and apparatus for supporting IC design, and computer product 有权
    支持IC设计和计算机产品的方法和装置

    公开(公告)号:US20080028356A1

    公开(公告)日:2008-01-31

    申请号:US11785897

    申请日:2007-04-20

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A logical-group creating unit creates a logical group from a cell included in a selected range of a logical drawing that is specified in a logical page. A logical-group extracting unit extracts a same/similar logical group by determining whether logical drawings of created logical groups are same or similar to each other. A pattern creating unit creates an implementation pattern of a logical group included in extracted same/similar logical group.

    摘要翻译: 逻辑组创建单元从在逻辑页面中指定的逻辑绘图的选定范围中包括的单元创建逻辑组。 逻辑组提取单元通过确定所创建的逻辑组的逻辑图是否相同或相似来提取相同/相似的逻辑组。 模式创建单元创建包括在提取的相同/相似的逻辑组中的逻辑组的实现模式。

    Semiconductor memory device with a clock circuit for reducing power consumption in a standby state
    5.
    发明授权
    Semiconductor memory device with a clock circuit for reducing power consumption in a standby state 有权
    具有用于在待机状态下降低功耗的时钟电路的半导体存储器件

    公开(公告)号:US09112488B2

    公开(公告)日:2015-08-18

    申请号:US13303153

    申请日:2011-11-23

    申请人: Hiroki Murakami

    发明人: Hiroki Murakami

    摘要: A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

    摘要翻译: 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp,Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极,将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp,Tn的栅极和源极之间的电压幅度大于晶体管Tp,Tn的阈值。

    Method and apparatus for forming silicon nitride film
    7.
    发明授权
    Method and apparatus for forming silicon nitride film 有权
    用于形成氮化硅膜的方法和装置

    公开(公告)号:US08753984B2

    公开(公告)日:2014-06-17

    申请号:US13332691

    申请日:2011-12-21

    IPC分类号: H01L21/20

    CPC分类号: C23C16/345 C23C16/45525

    摘要: A method of forming a silicon nitride film on the surface of an object to be processed, the method including forming a seed layer functioning as a seed of the silicon nitride film on the surface of the object to be processed by using at least an aminosilane-based gas, prior to forming the silicon nitride film on the surface of the object to be processed.

    摘要翻译: 一种在待处理物体的表面上形成氮化硅膜的方法,该方法包括通过使用至少一种氨基硅烷化合物形成在待加工物体的表面上起氮化硅膜的晶种的种子层的作用, 在将待加工物体的表面上形成氮化硅膜之前。

    VEHICLE AIR-CONDITIONING DEVICE
    8.
    发明申请
    VEHICLE AIR-CONDITIONING DEVICE 有权
    车辆空调装置

    公开(公告)号:US20140033752A1

    公开(公告)日:2014-02-06

    申请号:US14113025

    申请日:2011-06-01

    IPC分类号: B60H1/00

    摘要: In vehicle air-conditioning devices including a refrigerant circuit having a compressor, an outdoor heat exchanger, an expansion device, and an indoor heat exchanger that are connected by refrigerant pipes to form a refrigeration cycle; an indoor air-sending device that supplies air to the indoor heat exchanger; and an outdoor air-sending device that supplies air to the outdoor heat exchanger, the refrigerant circuit is installed under the floor of a vehicle and uses carbon dioxide as the refrigerant.

    摘要翻译: 在包括具有压缩机,室外热交换器,膨胀装置和室内热交换器的制冷剂回路的车辆用空调装置中,通过制冷剂管连接而形成制冷循环; 向室内热交换器供给空气的室内送风装置; 以及向室外热交换器供给空气的室外送风装置,将制冷剂回路安装在车辆的地板下方,并使用二氧化碳作为制冷剂。

    SEMICONDUCTOR DEVICE
    9.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20120287712A1

    公开(公告)日:2012-11-15

    申请号:US13303153

    申请日:2011-11-23

    申请人: Hiroki Murakami

    发明人: Hiroki Murakami

    摘要: A semiconductor device including a logic circuit capable of decreasing a leakage current occurred during a standby state is provided. The semiconductor device includes a power supply portion for supplying a first operation voltage or a second operation voltage smaller than the first operation voltage; a P-type low-threshold transistor Tp for receiving the first or the second operation voltage from the power supply portion; and a N-type transistor Tn connected between the transistor Tp and a base potential. The transistors Tp, Tn construct a logic circuit. The power supply portion supplies the first operation voltage to the source of the transistor Tp in the enable state, and supplies the second operation voltage in a standby state. The second operation voltage is set so that voltage amplitude between gate and source of each transistor Tp, Tn is larger than the threshold value of the transistors Tp, Tn.

    摘要翻译: 提供一种包括能够减少在待机状态期间发生的漏电流的逻辑电路的半导体器件。 半导体器件包括用于提供第一操作电压的电源部分或小于第一操作电压的第二操作电压; 用于从电源部分接收第一或第二操作电压的P型低阈值晶体管Tp; 以及连接在晶体管Tp和基极之间的N型晶体管Tn。 晶体管Tp,Tn构成逻辑电路。 电源部在使能状态下将第一工作电压提供给晶体管Tp的源极,将第二工作电压供给到待机状态。 第二操作电压被设置为使得每个晶体管Tp,Tn的栅极和源极之间的电压幅度大于晶体管Tp,Tn的阈值。