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    Signal processing apparatus, signal processing method, and program
    1.
    发明授权
    Signal processing apparatus, signal processing method, and program 有权
    信号处理装置，信号处理方法和程序

    公开(公告)号：US09002489B2

    公开(公告)日：2015-04-07

    申请号：US13079057

    申请日：2011-04-04

    申请人： Keisuke Toyama ,  Mototsugu Abe

    发明人： Keisuke Toyama ,  Mototsugu Abe

    IPC分类号： G06F17/00 ,  H04R29/00 ,  H04B15/00 ,  H04R3/00

    CPC分类号： H04R3/007

    摘要： A signal processing apparatus includes an absolute value unit configured to convert an audio signal into absolute values, a representative value calculation unit configured to calculate representative values of consecutive sample values included in blocks of the audio signal which has been converted into the absolute values using at least maximum sample values among values of the samples included in the blocks for individual blocks, an average value calculation unit configured to determine a section which includes a predetermined number of consecutive blocks as a frame and calculate a maximum value of the representative values of the blocks included in the frame and an average value of the representative values of the blocks included in the frame, and a detector configured to detect click noise in the frame on the basis of a ratio of the maximum value to the average value.

    摘要翻译： 信号处理装置包括被配置为将音频信号转换为绝对值的绝对值单位，代表值计算单元，被配置为计算已经被转换成绝对值的音频信号的块中包括的连续采样值的代表值， 平均值计算单元，被配置为将包含预定数量的连续块的部分确定为帧，并计算块的代表值的最大值 包括在帧中的帧和包括在帧中的块的代表值的平均值，以及被配置为基于最大值与平均值的比率来检测帧中的点击噪声的检测器。

    Signal processing device, signal processing method, and program
    2.
    发明授权
    Signal processing device, signal processing method, and program 有权
    信号处理装置，信号处理方法和程序

    公开(公告)号：US08680386B2

    公开(公告)日：2014-03-25

    申请号：US13277971

    申请日：2011-10-20

    申请人： Takashi Shibuya ,  Keisuke Toyama ,  Mototsugu Abe

    发明人： Takashi Shibuya ,  Keisuke Toyama ,  Mototsugu Abe

    IPC分类号： G10H7/00

    CPC分类号： G06F17/30743 ,  G10H1/0008 ,  G10H2210/031 ,  G10H2210/046 ,  G10H2240/141

    摘要： A signal processing device that identifies a piece of music of an input signal by comparing the input signal with a plurality of reference signals including only a piece of music includes a weight distribution generating section that generates a weight distribution corresponding to a likeness to music in regions of the input signal transformed into a time-frequency domain, and a similarity calculating section that calculates degrees of similarity between a feature quantity in the regions of the input signal transformed into the time-frequency domain and feature quantities in the regions of the reference signals transformed into the time-frequency domain on the basis of the weighting based on the weight distribution.

    摘要翻译： 通过将输入信号与仅包括一段音乐的多个参考信号进行比较来识别输入信号的音乐的信号处理装置包括：权重分布生成部分，生成与区域中的音乐相似的权重分布 以及相似度计算部，其计算变换为时频域的输入信号的区域中的特征量与参考信号的区域中的特征量之间的相似度 基于权重分配的权重，变换成时频域。

    Signal Processing Device, Signal Processing Method, and Program
    4.
    发明申请
    Signal Processing Device, Signal Processing Method, and Program 有权
    信号处理装置，信号处理方法和程序

    公开(公告)号：US20120103166A1

    公开(公告)日：2012-05-03

    申请号：US13277971

    申请日：2011-10-20

    申请人： Takashi SHIBUYA ,  Keisuke Toyama ,  Mototsugu Abe

    发明人： Takashi SHIBUYA ,  Keisuke Toyama ,  Mototsugu Abe

    IPC分类号： G10H7/00

    CPC分类号： G06F17/30743 ,  G10H1/0008 ,  G10H2210/031 ,  G10H2210/046 ,  G10H2240/141

    摘要： A signal processing device that identifies a piece of music of an input signal by comparing the input signal with a plurality of reference signals including only a piece of music includes a weight distribution generating section that generates a weight distribution corresponding to a likeness to music in regions of the input signal transformed into a time-frequency domain, and a similarity calculating section that calculates degrees of similarity between a feature quantity in the regions of the input signal transformed into the time-frequency domain and feature quantities in the regions of the reference signals transformed into the time-frequency domain on the basis of the weighting based on the weight distribution.

    摘要翻译： 通过将输入信号与仅包括一段音乐的多个参考信号进行比较来识别输入信号的音乐的信号处理装置包括：权重分布生成部分，生成与区域中的音乐相似的权重分布 以及相似度计算部，其计算变换为时频域的输入信号的区域中的特征量与参考信号的区域中的特征量之间的相似度 基于权重分配的权重，变换成时频域。

    SoC power management ensuring real-time processing
    6.
    发明申请
    SoC power management ensuring real-time processing 审中-公开
    SoC电源管理确保实时处理

    公开(公告)号：US20080022140A1

    公开(公告)日：2008-01-24

    申请号：US11826640

    申请日：2007-07-17

    申请人： Tetsuya Yamada ,  Makoto Saen ,  Satoshi Misaka ,  Keisuke Toyama ,  Kenichi Osada

    发明人： Tetsuya Yamada ,  Makoto Saen ,  Satoshi Misaka ,  Keisuke Toyama ,  Kenichi Osada

    IPC分类号： G06F1/26

    CPC分类号： G06F1/206 ,  G06F1/3203 ,  G06F1/3237 ,  G06F1/324 ,  Y02D10/126 ,  Y02D10/128 ,  Y02D10/16

    摘要： A chip (1) includes: a resource manager (2); various kinds of functional blocks (3-6); a thermal sensor (13); and a performance counter (15). The resource manager manages tasks that the functional blocks execute, and determines a task progress (38) for each task from an activated ratio (α) provided from the performance counter and a deadline (39) contained in task information (33) and decides priority of each task. When the temperature detected by the thermal sensor during execution of a task is not less than a threshold (T_max), the resource manager reads out a power consumption budget (P_max) from a memory (9) which has been set to make the temperature below the threshold, and stops the clock fed to the functional block executing a task having a lower priority or lowers the frequency of the clock until a chip power consumption value (p_sum) becomes smaller than the power consumption budget.

    摘要翻译： 芯片（1）包括：资源管理器（2）; 各种功能块（3〜6）; 热传感器（13）; 和性能计数器（15）。 所述资源管理器管理所述功能块执行的任务，并根据从所述性能计数器提供的激活的比率（α）和所述任务信息（33）中包含的最后期限（39）来确定每个任务的任务进度（38），并决定优先级 的每个任务。 当在执行任务期间由热传感器检测到的温度不小于阈值（T_max）时，资源管理器从设置为使温度低于的温度的存储器（9）读出功耗预算（P_max） 阈值，并且停止馈送到执行具有较低优先级的任务的功能块的时钟，或者降低时钟的频率，直到芯片功耗值（p_sum）变得小于功耗预算。

    Cache memory allocation method
    7.
    发明授权
    Cache memory allocation method 失效
    缓存内存分配方法

    公开(公告)号：US07000072B1

    公开(公告)日：2006-02-14

    申请号：US09688360

    申请日：2000-10-12

    申请人： Kazuo Aisaka ,  Keisuke Toyama

    发明人： Kazuo Aisaka ,  Keisuke Toyama

    IPC分类号： G06F12/00

    CPC分类号： G06F12/126 ,  G06F12/084 ,  G06F12/0842 ,  G06F2212/6042 ,  Y10S707/99953 ,  Y10S707/99956

    摘要： To assure the multiprocessing performance of CPU on a microprocessor, the invention provides a method of memory mapping for multiple concurrent processes, thus minimizing cache thrashing. An OS maintains a management (mapping) table for controlling the cache occupancy status. When a process is activated, the OS receives from the process the positional information for a specific part (principal part) to be executed most frequently in the process and coordinates addressing of a storage area where the process is loaded by referring to the management table, ensuring that the cache address assigned for the principal part of the process differs from that for any other existing process. Taking cache memory capacity, configuration scheme, and process execution priority into account when executing the above coordination, a computer system is designed such that a highest priority process can have a first priority in using the cache.

    摘要翻译： 为了确保微处理器上的CPU的多处理性能，本发明提供了一种用于多个并发进程的存储器映射的方法，从而最小化缓存抖动。 OS维护用于控制高速缓存占用状态的管理（映射）表。 当处理被激活时，OS从处理中接收在该处理中最频繁执行的特定部分（主要部分）的位置信息，并且通过参考管理表来协调加载处理的存储区域的寻址， 确保为进程的主要部分分配的缓存地址与任何其他现有进程的缓存地址不同。 在执行上述协调时考虑到缓存存储器容量，配置方案和处理执行优先级，设计计算机系统，使得最高优先级进程可以在使用高速缓存时具有第一优先级。

    Encoding device and decoding device
    9.
    发明授权
    Encoding device and decoding device 有权
    编码设备和解码设备

    公开(公告)号：US07933417B2

    公开(公告)日：2011-04-26

    申请号：US11324633

    申请日：2006-01-03

    申请人： Keisuke Toyama ,  Shiro Suzuki ,  Minoru Tsuji

    发明人： Keisuke Toyama ,  Shiro Suzuki ,  Minoru Tsuji

    IPC分类号： H04R5/00 ,  G10L19/00 ,  G10L19/14 ,  H03M7/00 ,  H03M7/34 ,  H04B14/04

    CPC分类号： H04B1/667 ,  G10L19/0208

    摘要： The present invention relates to an encoding device for saving the number of bits of codes. In step S11, the differential value between a normalization coefficient Bi to be encoded and a normalization coefficient Bi-1 for an encoding unit Ai-1 in a band adjacent to the lower side of an encoding unit Ai corresponding to the normalization coefficient Bi is computed. In step S12, reference is made to a table in which a differential value having a high frequency of occurrence is associated with a code having a small number of bits, and a code corresponding to the computed differential value is read. In step S13, it is determined whether or not all normalization coefficients B have been encoded. If it is determined that all normalization coefficients B have been encoded, in step S14, the code read in step S12 is output. The present invention is applicable to an audio recorder.

    摘要翻译： 本发明涉及一种用于节省代码比特数的编码装置。 在步骤S11中，计算要编码的归一化系数Bi与与归一化系数Bi相对应的编码单元Ai的下侧的频带中的编码单位Ai-1的归一化系数Bi-1的差分值 。 在步骤S12中，参考具有高出现频率的差分值与具有少量位的代码相关联的表，并且读取与所计算出的差分值相对应的代码。 在步骤S13中，确定所有归一化系数B是否已被编码。 如果确定所有归一化系数B已被编码，则在步骤S14中，输出在步骤S12中读取的代码。 本发明可应用于音频记录器。

    Semiconductor integrated circuit device and power consumption control device
    10.
    发明授权
    Semiconductor integrated circuit device and power consumption control device 有权
    半导体集成电路器件和功耗控制器件

    公开(公告)号：US07646197B2

    公开(公告)日：2010-01-12

    申请号：US11542133

    申请日：2006-10-04

    申请人： Satoshi Misaka ,  Makoto Saen ,  Tetsuya Yamada ,  Keisuke Toyama ,  Kenichi Osada

    发明人： Satoshi Misaka ,  Makoto Saen ,  Tetsuya Yamada ,  Keisuke Toyama ,  Kenichi Osada

    IPC分类号： G01V3/00

    CPC分类号： G06F1/3203 ,  G06F1/329 ,  Y02D10/24 ,  Y02D50/20

    摘要： To perform execution scheduling of function blocks so as to control the total required power of the function blocks within a supplyable power budget value, and thereby realize stable operations at low power consumption. Function block identifiers are allotted to all the function blocks, and to a RAM area that a power consumption control device can read and write, a list to store identifiers and task priority, power mode value showing power states, and power mode time showing the holding time of power states can be linked. A single or plural link lists for controlling the schedules of tasks operating on the function blocks, a link list for controlling the function block in execution currently in high power mode, a link list for controlling the function block in stop currently in stop mode, and a link list for controlling the function block in execution currently in low power mode are allotted, and thereby the power source and the operation clock are controlled by the power consumption control device.

    摘要翻译： 执行功能块的执行调度，以便在可供电功率预算值内控制功能块的总需求功率，从而在低功耗下实现稳定的操作。 功能块标识符分配给所有功能块，以及功率控制装置可以读写的RAM区域，存储标识符和任务优先级的列表，显示功率状态的功率模式值和显示保持的功率模式时间 电力状态的时间可以联系起来。 用于控制在功能块上操作的任务的调度的单个或多个链接列表，用于控制当前处于高功率模式的执行中的功能块的链接列表，用于控制当前处于停止模式的停止功能块的链接列表，以及 分配用于控制当前处于低功率模式的执行功能块的链接列表，从而由功耗控制装置控制电源和操作时钟。