公开(公告)号：US09536942B2

公开(公告)日：2017-01-03

申请号：US14363914

申请日：2012-08-02

申请人： Tsuyoshi Kawakami ,  Kenji Hamada ,  Kohei Ebihara ,  Akihiko Furukawa ,  Yuji Murakami

发明人： Tsuyoshi Kawakami ,  Kenji Hamada ,  Kohei Ebihara ,  Akihiko Furukawa ,  Yuji Murakami

IPC分类号： H01L21/266 ,  H01L29/78 ,  H01L29/872 ,  H01L29/06 ,  H01L29/861 ,  H01L29/66 ,  H01L29/08 ,  H01L29/16 ,  H01L29/423

CPC分类号： H01L29/063 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/8611 ,  H01L29/872

摘要： A semiconductor device includes an active region formed in an upper layer portion of a semiconductor layer of a first conductivity type, and a plurality of electric field relaxation layers disposed from an edge of the active region toward the outside so as to surround the active region. The plurality of electric field relaxation layers include a plurality of first electric field relaxation layers and a plurality of second electric field relaxation layers alternately disposed adjacent to each other, the first electric field relaxation layer and the second electric field relaxation layer adjacent to each other forming a set. Impurities of a second conductivity type are implanted to the first electric field relaxation layers at a first surface density, widths of which becoming smaller as apart from the active region. Impurities of the second conductivity type are implanted to the second electric field relaxation layers at a second surface density lower than the first surface density, widths of which becoming larger as apart from the active region.

摘要翻译： 半导体器件包括形成在第一导电类型的半导体层的上层部分中的有源区和从有源区的边缘朝向外部设置以围绕有源区的多个电场弛豫层。 多个电场弛豫层包括彼此相邻交替设置的多个第一电场弛豫层和多个第二电场弛豫层，第一电场弛豫层和彼此相邻的第二电场弛豫层形成 一套。 第二导电类型的杂质以第一表面密度注入第一电场弛豫层，其宽度随着活性区域的变小而变小。 第二导电类型的杂质以比第一表面密度低的第二表面密度注入第二电场弛豫层，其宽度随着活性区域的变大而变大。

公开(公告)号：US08866158B2

公开(公告)日：2014-10-21

申请号：US14009628

申请日：2012-03-29

申请人： Kenji Hamada ,  Tsuyoshi Kawakami

发明人： Kenji Hamada ,  Tsuyoshi Kawakami

IPC分类号： H01L29/15 ,  H01L29/16 ,  H01L21/04 ,  H01L29/66 ,  H01L29/06 ,  H01L29/861 ,  H01L29/739 ,  H01L29/78 ,  H01L29/08 ,  H01L29/872

CPC分类号： H01L29/1608 ,  H01L21/046 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0878 ,  H01L29/66128 ,  H01L29/66136 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/8611 ,  H01L29/872

摘要： A semiconductor device having a high withstand voltage in which a stable withstand voltage can be obtained and a method for manufacturing the same. A JTE region having a second conductivity type is formed in a port ion on an outer peripheral end side of an SiC substrate from a second conductivity type SiC region in a vicinal portion of a surface on one of sides in a thickness direction of a first conductivity type SiC epitaxial layer. A first conductivity type SiC region having a higher concentration of an impurity having the first conductivity type than that of the SiC epitaxial layer is formed in at least a vicinal portion of a surface on one of sides in a thickness direction of a portion in which the JTE regions are bonded to each other.

摘要翻译： 具有能够获得稳定耐受电压的高耐受电压的半导体器件及其制造方法。 具有第二导电类型的JTE区域形成在SiC衬底的外周端侧上的端口离子中，该第二导电型SiC区域在第一导电性的厚度方向的一侧的表面的邻近部分中 型SiC外延层。 在第一导电类型的SiC区域中，具有比SiC外延层的第一导电类型的杂质浓度高的第一导电型SiC区域在至少一个侧面中的一个侧面的连续部分上形成， JTE地区相互结合。

公开(公告)号：US08716717B2

公开(公告)日：2014-05-06

申请号：US13816511

申请日：2011-04-15

申请人： Tsuyoshi Kawakami ,  Akihiko Furukawa ,  Naruhisa Miura ,  Yasuhiro Kagawa ,  Kenji Hamada ,  Yoshiyuki Nakaki

发明人： Tsuyoshi Kawakami ,  Akihiko Furukawa ,  Naruhisa Miura ,  Yasuhiro Kagawa ,  Kenji Hamada ,  Yoshiyuki Nakaki

IPC分类号： H01L29/12

CPC分类号： H01L29/12 ,  H01L21/0465 ,  H01L21/265 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/66128 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/8611 ,  H01L29/872

摘要： A RESURF layer including a plurality of P-type implantation layers having a low concentration of P-type impurity is formed adjacent to an active region. The RESURF layer includes a first RESURF layer, a second RESURF layer, a third RESURF layer, a fourth RESURF layer, and a fifth RESURF layer that are arranged sequentially from the P-type base side so as to surround the P-type base. The second RESURF layer is configured with small regions having an implantation amount equal to that of the first RESURF layer and small regions having an implantation amount equal to that of the third RESURF layer being alternately arranged in multiple. The fourth RESURF layer is configured with small regions having an implantation amount equal to that of the third RESURF layer and small regions having an implantation amount equal to that of the fifth RESURF layer being alternately arranged in multiple.

摘要翻译： 在活性区域附近形成包括具有低浓度P型杂质的多个P型注入层的RESURF层。 RESURF层包括从P型基底侧依次布置以围绕P型基底的第一RESURF层，第二RESURF层，第三RESURF层，第四RESURF层和第五RESURF层。 第二RESURF层配置有具有等于第一RESURF层的注入量的小区域，并且具有与第三RESURF层的注入量相等的注入量的小区域被交替排列成多个。 第四RESURF层配置有具有等于第三RESURF层的注入量的小区域，并且具有与第五RESURF层的注入量相等的注入量的小区域被交替排列成多个。

公开(公告)号：US20140353678A1

公开(公告)日：2014-12-04

申请号：US14363914

申请日：2012-08-02

申请人： Tsuyoshi Kawakami ,  Kenji Hamada ,  Kohei Ebihara ,  Akihiko Furukawa ,  Yuji Murakami

发明人： Tsuyoshi Kawakami ,  Kenji Hamada ,  Kohei Ebihara ,  Akihiko Furukawa ,  Yuji Murakami

IPC分类号： H01L29/06 ,  H01L29/66 ,  H01L29/861 ,  H01L29/78 ,  H01L21/266 ,  H01L29/872

CPC分类号： H01L29/063 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/42368 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/8611 ,  H01L29/872

摘要： A semiconductor device includes an active region formed in an upper layer portion of a semiconductor layer of a first conductivity type, and a plurality of electric field relaxation layers disposed from an edge of the active region toward the outside so as to surround the active region. The plurality of electric field relaxation layers include a plurality of first electric field relaxation layers and a plurality of second electric field relaxation layers alternately disposed adjacent to each other, the first electric field relaxation layer and the second electric field relaxation layer adjacent to each other forming a set. Impurities of a second conductivity type are implanted to the first electric field relaxation layers at a first surface density, widths of which becoming smaller as apart from the active region. Impurities of the second conductivity type are implanted to the second electric field relaxation layers at a second surface density lower than the first surface density, widths of which becoming larger as apart from the active region.

摘要翻译： 半导体器件包括形成在第一导电类型的半导体层的上层部分中的有源区和从有源区的边缘朝向外部设置以围绕有源区的多个电场弛豫层。 多个电场弛豫层包括彼此相邻交替设置的多个第一电场弛豫层和多个第二电场弛豫层，第一电场弛豫层和彼此相邻的第二电场弛豫层形成 一套。 第二导电类型的杂质以第一表面密度注入第一电场弛豫层，其宽度随着活性区域的变小而变小。 第二导电类型的杂质以比第一表面密度低的第二表面密度注入第二电场弛豫层，其宽度随着活性区域的变大而变大。

公开(公告)号：US20140021489A1

公开(公告)日：2014-01-23

申请号：US14009628

申请日：2012-03-29

申请人： Kenji Hamada ,  Tsuyoshi Kawakami

发明人： Kenji Hamada ,  Tsuyoshi Kawakami

IPC分类号： H01L29/16

CPC分类号： H01L29/1608 ,  H01L21/046 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0878 ,  H01L29/66128 ,  H01L29/66136 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/8611 ,  H01L29/872

摘要： A semiconductor device having a high withstand voltage in which a stable withstand voltage can be obtained and a method for manufacturing the same. A JTE region having a second conductivity type is formed in a portion on an outer peripheral end side of an SiC substrate from a second conductivity type SiC region in a vicinal portion of a surface on one of sides in a thickness direction of a first conductivity type SiC epitaxial layer. A first conductivity type SiC region having a higher concentration of an impurity having the first conductivity type than that of the SiC epitaxial layer is formed in at least a vicinal portion of a surface on one of sides in a thickness direction of a portion in which the JTE regions are bonded to each other.

摘要翻译： 具有能够获得稳定耐受电压的高耐受电压的半导体器件及其制造方法。 具有第二导电类型的JTE区域形成在SiC衬底的外周端侧的从第一导电类型的厚度方向的一侧的表面的相邻部分中的第二导电型SiC区域的部分中 SiC外延层。 在第一导电类型的SiC区域中，具有比SiC外延层的第一导电类型的杂质浓度高的第一导电型SiC区域在至少一个侧面中的一个侧面的连续部分上形成， JTE地区相互结合。

公开(公告)号：US20130140582A1

公开(公告)日：2013-06-06

申请号：US13816511

申请日：2011-04-15

申请人： Tsuyoshi Kawakami ,  Akihiko Furukawa ,  Naruhisa Miura ,  Yasuhiro Kagawa ,  Kenji Hamada ,  Yoshiyuki Nakaki

发明人： Tsuyoshi Kawakami ,  Akihiko Furukawa ,  Naruhisa Miura ,  Yasuhiro Kagawa ,  Kenji Hamada ,  Yoshiyuki Nakaki

IPC分类号： H01L29/12 ,  H01L21/265

CPC分类号： H01L29/12 ,  H01L21/0465 ,  H01L21/265 ,  H01L21/266 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/66128 ,  H01L29/66143 ,  H01L29/66659 ,  H01L29/7835 ,  H01L29/8611 ,  H01L29/872

摘要： The present invention relates to a semiconductor device and a method for manufacturing the same. A RESURF layer (101) including a plurality of P-type implantation layers having a relatively low concentration of P-type impurity is formed adjacent to an active region (2). The RESURF layer (101) includes a first RESURF layer (11), a second RESURF layer (12), a third RESURF layer (13), a fourth RESURF layer (14), and a fifth RESURF layer (15) that are arranged sequentially from the P-type base (2) side so as to surround the P-type base (2). The second RESURF layer (12) is configured with small regions (11′) having an implantation amount equal to that of the first RESURF layer (11) and small regions (13′) having an implantation amount equal to that of the third RESURF layer (13) being alternately arranged in multiple. The fourth RESURF layer (14) is configured with small regions (13′) having an implantation amount equal to that of the third RESURF layer (13) and small regions (15′) having an implantation amount equal to that of the fifth RESURF layer (15) being alternately arranged in multiple.

摘要翻译： 半导体器件及其制造方法技术领域本发明涉及半导体器件及其制造方法。 在活性区域（2）附近形成包括具有相对低浓度的P型杂质的多个P型注入层的RESURF层（101）。 RESURF层（101）包括第一RESURF层（11），第二RESURF层（12），第三RESURF层（13），第四RESURF层（14）和第五RESURF层（15） 从P型基底（2）侧顺序地包围P型基底（2）。 第二RESURF层（12）配置有具有等于第一RESURF层（11）的注入量的小区域（11'）和具有等于第三RESURF层的注入量的小区域（13'） （13）交替布置成多个。 第四RESURF层（14）配置有具有等于第三RESURF层（13）的注入量的小区域（13'）和具有等于第五RESURF层的注入量的小区域（15'） （15）交替排列成多个。

公开(公告)号：US09599979B2

公开(公告)日：2017-03-21

申请号：US13994961

申请日：2011-09-14

申请人： Kenji Hamada

发明人： Kenji Hamada

IPC分类号： G05B19/42 ,  G06F19/00 ,  G05D5/00 ,  G05D3/12 ,  G05D9/00 ,  G05D11/00 ,  B24B49/00 ,  B24B1/00 ,  G05B19/406 ,  G05B19/404

CPC分类号： G05B19/406 ,  G05B19/404 ,  G05B2219/49186

摘要： The present invention discloses a machining error calculation apparatus for calculating the machining error more precisely through analysis. The apparatus comprises: a tool center displacement amount calculation part for calculating a displacement amount of a rotation center of the rotation tool according to the cutting resistance force in the rotation tool, in the case that the cutting resistance force generated in the rotation tool during said interrupted cutting is varied; a relative tool-edge position calculation part for calculating a relative tool-edge position of the cutting-edge portion with respect to the rotation center of the rotation tool; an absolute tool-edge position calculation part for calculating an absolute tool-edge position of the cutting-edge portion with respect to the workpiece, based on the displacement amount of the rotation center of the rotation tool and the relative tool-edge position; a machined shape calculation part for calculating the machined shape of the workpiece through transferring the absolute tool-edge position on the workpiece; and a machining error calculation unit for calculating a machining error of the workpiece based on a difference between the machined shape of the workpiece and an objective shape of the workpiece.

公开(公告)号：US20150001124A1

公开(公告)日：2015-01-01

申请号：US14485151

申请日：2014-09-12

申请人： Kenji Yamashita ,  Akiyoshi Yasusato ,  Tetsuya Yamashita ,  Kenji Hamada ,  Goro Kuratani ,  Masakazu Sugino ,  Yuko Hanazono ,  Yoshihiko Matsuoka

发明人： Kenji Yamashita ,  Akiyoshi Yasusato ,  Tetsuya Yamashita ,  Kenji Hamada ,  Goro Kuratani ,  Masakazu Sugino ,  Yuko Hanazono ,  Yoshihiko Matsuoka

IPC分类号： B65D75/32

CPC分类号： B65D75/327 ,  A61J1/035 ,  B65D83/0445 ,  Y10T29/49826

摘要： A press-through package for articles such as medicines which can reliably prevent a recipient from accidentally swallowing the whole package without opening it, including solid medicines M stored in a plurality of pockets of a base sheet one by one and the pockets sealed by a cover film having attached to the rear surface of the base sheet, wherein the entire package of the press-through package is made in a cylindrical form which cannot allow a recipient from accidentally swallowing and from which the medicines can be taken out easily.

摘要翻译： 一种用于能够可靠地防止接收者意外吞咽整个包装而不打开它的物品的压穿包装，包括一个接一个地存储在基片的多个口袋中的固体药物M和由盖子封闭的口袋 薄膜附着在基片的后表面上，其中压入包装的整个包装制成圆柱形，不能容许接收者意外吞咽，并且药物可以容易地从中取出。

公开(公告)号：US08882671B2

公开(公告)日：2014-11-11

申请号：US12579541

申请日：2009-10-15

申请人： Takuya Sasaki ,  Kenji Hamada

发明人： Takuya Sasaki ,  Kenji Hamada

IPC分类号： A61B8/00 ,  G01S7/52 ,  A61B8/14 ,  A61B8/08

CPC分类号： A61B8/14 ,  A61B8/0866 ,  A61B8/4461 ,  A61B8/523 ,  G01S7/52073 ,  G01S7/52074 ,  G01S7/52085 ,  G01S7/52098

摘要： Volume data are collected by swing scanning in which frames in different field angle settings are mixed by a wide scan set at a wide field angle to image a diagnostic target and an index part for recognizing the position of the diagnostic target and by a narrow scan set at a field angle θ2 narrower than the field angle in the wide scan to image the diagnostic target with high time resolution. Then, the wide ultrasonic image is used to set spatial coordinates based on the index part. The spatial coordinates are used to align the narrow ultrasonic image. While this positional relation is being maintained, the wide ultrasonic image, the narrow ultrasonic image and a given ultrasonic image are displayed in a predetermined form.

摘要翻译： 通过摆动扫描来收集体数据，其中不同场角设置中的帧通过宽视场角的宽扫描组合来混合以对诊断目标进行成像和用于识别诊断目标的位置的索引部分和窄扫描集 在视角角度; 2在宽扫描中比场角窄，以高时间分辨率对诊断目标进行成像。 然后，使用宽超声波图像基于索引部分设置空间坐标。 空间坐标用于对齐窄的超声波图像。 在保持这种位置关系的同时，以预定的形式显示宽的超声波图像，窄的超声波图像和给定的超声波图像。

公开(公告)号：US20100099987A1

公开(公告)日：2010-04-22

申请号：US12579541

申请日：2009-10-15

申请人： Takuya Sasaki ,  Kenji Hamada

发明人： Takuya Sasaki ,  Kenji Hamada

IPC分类号： A61B8/14

CPC分类号： A61B8/14 ,  A61B8/0866 ,  A61B8/4461 ,  A61B8/523 ,  G01S7/52073 ,  G01S7/52074 ,  G01S7/52085 ,  G01S7/52098

摘要： Volume data are collected by swing scanning in which frames in different field angle settings are mixed by a wide scan set at a wide field angle to image a diagnostic target and an index part for recognizing the position of the diagnostic target and by a narrow scan set at a field angle θ2 narrower than the field angle in the wide scan to image the diagnostic target with high time resolution. Then, the wide ultrasonic image is used to set spatial coordinates based on the index part. The spatial coordinates are used to align the narrow ultrasonic image. While this positional relation is being maintained, the wide ultrasonic image, the narrow ultrasonic image and a given ultrasonic image are displayed in a predetermined form.

摘要翻译： 通过摆动扫描来收集体数据，其中不同场角设置中的帧通过宽视场角的宽扫描组合来混合以对诊断目标进行成像和用于识别诊断目标的位置的索引部分和窄扫描集 在视角角度; 2在宽扫描中比场角窄，以高时间分辨率对诊断目标进行成像。 然后，使用宽超声波图像基于索引部分设置空间坐标。 空间坐标用于对齐窄的超声波图像。 在保持这种位置关系的同时，以预定的形式显示宽的超声波图像，窄的超声波图像和给定的超声波图像。