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109 条记录 (耗时 0.044 秒)

    Etch stop layer system
    1.
    发明授权
    Etch stop layer system 有权

    公开(公告)号：US06689211B1

    公开(公告)日：2004-02-10

    申请号：US09599260

    申请日：2000-06-22

    申请人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Jeffrey T. Borenstein ,  Gianna Taraschi

    发明人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Jeffrey T. Borenstein ,  Gianna Taraschi

    IPC分类号： C30B2522

    CPC分类号： H01L21/30608 ,  H01L21/76256 ,  Y10S117/915

    摘要： A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e., differences in etch rate versus pure undoped silicon. This is attributed to the change in energy band structure by the addition of germanium. Furthermore, the nondegenerate doping in the Si1−xGex alloy should not affect the etch-stop behavior. The etch-stop of the invention includes the use of a graded-composition buffer between the silicon substrate and the SiGe etch-stop material. Nominally, the buffer has a linearly-changing composition with respect to thickness, from pure silicon at the substrate/buffer interface to a composition of germanium, and dopant if also present, at the buffer/etch-stop interface which can still be etched at an appreciable rate. Here, there is a strategic jump in germanium and concentration from the buffer side of the interface to the etch-stop material, such that the etch-stop layer is considerably more resistant to the etchant. This process and layer structure allows for an entire range of new materials for microelectronics. The etch-stop capabilities introduce new novel processes and structures such as relaxed SiGe alloys on Si, SiO2, and SiO2/Si. Such materials are useful for future strained Si MOSFET devices and circuits.

    Etch stop layer system
    2.
    发明授权
    Etch stop layer system 有权
    蚀刻停止层系统

    公开(公告)号：US07227176B2

    公开(公告)日：2007-06-05

    申请号：US10603852

    申请日：2003-06-25

    申请人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Gianni Taraschi ,  Jeffrey T. Borenstein

    发明人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Gianni Taraschi ,  Jeffrey T. Borenstein

    IPC分类号： H01L29/06

    CPC分类号： H01L21/02505 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/2007 ,  H01L21/30608 ,  H01L21/76256

    摘要： A semiconductor structure including a uniform etch-stop layer. The uniform etch stop layer has a relative etch rate which is less than approximately the relative etch rate of Si doped with 7×1019 boron atoms/cm3. A method for forming a semiconductor structure includes forming a uniform etch-stop layer providing a handle wafer, and bonding the uniform etch-stop layer to the handle wafer. The uniform etch-stop layer has a relative etch rate which is less than approximately the relative etch rate of Si doped with 7×1019 boron atoms/cm3.

    摘要翻译： 包括均匀蚀刻停止层的半导体结构。 均匀的蚀刻停止层的相对蚀刻速率小于约7×10 19硼原子/ cm 3的Si的相对蚀刻速率。 一种用于形成半导体结构的方法包括形成均匀的蚀刻停止层，提供处理晶片，并将均匀的蚀刻停止层结合到处理晶片。 均匀的蚀刻停止层的相对蚀刻速率小于约7×10 19个硼原子/ cm 3掺杂的Si的相对蚀刻速率。

    Etch stop layer system
    3.
    发明授权
    Etch stop layer system 有权
    蚀刻停止层系统

    公开(公告)号：US06521041B2

    公开(公告)日：2003-02-18

    申请号：US09289514

    申请日：1999-04-09

    申请人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Jeffrey T. Borenstein

    发明人： Kenneth C. Wu ,  Eugene A. Fitzgerald ,  Jeffrey T. Borenstein

    IPC分类号： C30B2502

    CPC分类号： H01L21/02505 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/0251 ,  H01L21/02532 ,  H01L21/2007 ,  H01L21/30608 ,  H01L21/76256 ,  Y10S117/915

    摘要： A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. For example, a cantilever can be made of this etch-stop material system, then released from its substrate and surrounding material, i.e., “micromachined”, by exposure to one of these etchants. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e., differences in etch rate versus pure undoped silicon. This is attributed to the change in energy band structure by the addition of germanium. Furthermore, the nondegenerate doping in the Si1−xGex alloy should not affect the etch-stop behavior. The etch-stop of the invention includes the use of a graded-composition buffer between the silicon substrate and the SiGe etch-stop material. Nominally, the buffer has a linearly-changing composition with respect to thickness, from pure silicon at the substrate/buffer interface to a composition of germanium, and dopant if also present, at the buffer/etch-stop interface which can still be etched at an appreciable rate. Here, there is a strategic jump in germanium and concentration from the buffer side of the interface to the etch-stop material, such that the etch-stop layer is considerably more resistant to the etchant.

    摘要翻译： 单晶硅衬底上的SiGe单晶蚀刻停止材料体系。 蚀刻停止材料系统可以精确的组成变化，但是掺杂或未掺杂的Si1-xGex合金，其x通常在0.2和0.5之间。 在其厚度上，蚀刻停止材料本身在组成上是均匀的。 蚀刻终止剂用于由诸如氢氧化钾，氢氧化钠，氢氧化锂，乙二胺/邻苯二酚/吡嗪（EDP），TMAH和肼的水的各向异性蚀刻剂的微加工。 例如，悬臂可以由该蚀刻停止材料体系制成，然后通过暴露于这些蚀刻剂之一从其衬底和周围的材料即“微加工”释放。 这些溶液通常蚀刻含有小于7×10 19 cm -3的小于7×10 19 cm -3的x或x x小于约18的未掺杂的Si1-xGex合金的硅。使用适度浓度的锗合金化硅导致优异的蚀刻选择性，即蚀刻速率与纯未掺杂的差异 硅。 这归因于通过添加锗的能带结构的变化。 此外，Si1-xGex合金中的非退化掺杂不应影响蚀刻停止性能。 本发明的蚀刻停止包括在硅衬底和SiGe蚀刻停止材料之间使用渐变组成缓冲液。 名义上，缓冲液具有相对于厚度的线性变化的组成，从衬底/缓冲液界面处的纯硅到锗的组成，以及如果还存在，则在缓冲/蚀刻 - 停止界面处的掺杂剂，其仍然可以在 一个明显的利率。 在这里，从界面的缓冲侧到蚀刻停止材料的锗和浓度存在着战略上的跳跃，使得蚀刻停止层相对于蚀刻剂更具有抵抗力。

    High-efficiency solar-cell arrays with integrated devices and methods for forming them
    5.
    发明授权
    High-efficiency solar-cell arrays with integrated devices and methods for forming them 有权
    具有集成器件的高效率太阳能电池阵列及其形成方法

    公开(公告)号：US08604330B1

    公开(公告)日：2013-12-10

    申请号：US13310856

    申请日：2011-12-05

    申请人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

    发明人： John J. Hennessy ,  Andrew C. Malonis ,  Arthur J. Pitera ,  Eugene A. Fitzgerald ,  Steven A. Ringel

    IPC分类号： H01L35/34 ,  H01L21/00

    CPC分类号： H01L31/05 ,  H01L27/1421 ,  H01L31/02021 ,  H01L31/06875 ,  Y02E10/544 ,  Y02P70/521

    摘要： In various embodiments, an array of discrete solar cells with associated devices such as bypass diodes is formed over a single substrate. In one instance, a method of forming a solar-cell array with integrated bypass diodes comprising: providing a semiconductor substrate, a first cell comprising a SiGe p-n junction or SiGe p-i-n junction, one or more second cells each comprising a III-V semiconductor p-n junction or III-V semiconductor p-i-n junction; forming a bypass diode that is discrete and laterally separate from its associated solar cell and comprises an unremoved portion of the first cell, the formation comprising removing an unremoved portion of the one or more second cells thereover.

    摘要翻译： 在各种实施例中，在单个衬底上形成具有诸如旁路二极管的相关器件的分立太阳能电池阵列。 在一个实例中，一种形成具有集成旁路二极管的太阳能电池阵列的方法，包括：提供半导体衬底，包含SiGe pn结或SiGe pin结的第一单元，每个包含III-V半导体pn的一个或多个第二单元 结或III-V半导体针结; 形成与其相关联的太阳能电池离散且横向分离的旁路二极管，并且包括第一电池的未移动部分，该组件包括从其中去除一个或多个第二电池的未移动部分。

    Structure and method for a high-speed semiconductor device having a Ge channel layer
    6.
    发明授权
    Structure and method for a high-speed semiconductor device having a Ge channel layer 有权
    具有Ge沟道层的高速半导体器件的结构和方法

    公开(公告)号：US08436336B2

    公开(公告)日：2013-05-07

    申请号：US11877186

    申请日：2007-10-23

    申请人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    发明人： Minjoo L. Lee ,  Christopher W. Leitz ,  Eugene A. Fitzgerald

    IPC分类号： H01L29/06

    CPC分类号： H01L29/78696 ,  H01L29/1054 ,  H01L29/78684

    摘要： The invention provides semiconductor structure comprising a strained Ge channel layer, and a gate dielectric disposed over the strained Ge channel layer. In one aspect of the invention, a strained Ge channel MOSFET is provided. The strained Ge channel MOSFET includes a relaxed SiGe virtual substrate with a Ge content between 50-95%, and a strained Ge channel formed on the virtual substrate. A gate structure is formed upon the strained Ge channel, whereupon a MOSFET is formed with increased performance over bulk Si. In another embodiment of the invention, a semiconductor structure comprising a relaxed Ge channel layer and a virtual substrate, wherein the relaxed Ge channel layer is disposed above the virtual substrate. In a further aspect of the invention, a relaxed Ge channel MOSFET is provided. The method includes providing a relaxed virtual substrate with a Ge composition of approximately 100% and a relaxed Ge channel formed on the virtual substrate.

    摘要翻译： 本发明提供包括应变Ge沟道层的半导体结构和设置在应变Ge沟道层上的栅极电介质。 在本发明的一个方面，提供了应变的Ge沟道MOSFET。 应变Ge沟道MOSFET包括Ge含量在50-95％之间的弛豫SiGe虚拟衬底和形成在虚拟衬底上的应变Ge沟道。 在应变Ge通道上形成栅极结构，于是形成具有在体积Si上增加的性能的MOSFET。 在本发明的另一实施例中，包括松弛的Ge沟道层和虚拟衬底的半导体结构，其中放宽的Ge沟道层设置在虚拟衬底之上。 在本发明的另一方面，提供了一种放宽的Ge沟道MOSFET。 该方法包括提供具有约100％的Ge组成的松弛虚拟衬底和形成在虚拟衬底上的松弛Ge沟道。