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    DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE
    1.
    发明申请
    DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权
    显示基板和制造显示基板的方法

    公开(公告)号：US20120211753A1

    公开(公告)日：2012-08-23

    申请号：US13328658

    申请日：2011-12-16

    申请人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

    发明人： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

    IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L33/00

    CPC分类号： H01L27/1225 ,  H01L27/1288

    摘要： In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

    摘要翻译： 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20120228604A1

    公开(公告)日：2012-09-13

    申请号：US13400931

    申请日：2012-02-21

    申请人： Seung-Ha CHOI ,  Sung Haeng CHO ,  Woo Geun LEE ,  Kap Soo YOON ,  Sho Yeon KIM

    发明人： Seung-Ha CHOI ,  Sung Haeng CHO ,  Woo Geun LEE ,  Kap Soo YOON ,  Sho Yeon KIM

    IPC分类号： H01L29/786 ,  H01L21/336

    CPC分类号： H01L29/7869 ,  H01L27/1225 ,  H01L27/1288

    摘要： A thin film transistor array panel includes a gate electrode on an insulating substrate, a gate insulating layer on the gate electrode, a semiconductor on the gate insulating layer, a thin film transistor including a source electrode and a drain electrode on the oxide semiconductor, and a pixel electrode which is connected to the drain electrode. The semiconductor includes a first layer having a relatively low fluorine content and a second layer having a relatively high fluorine content. The second layer of the semiconductor is only between the first layer of the semiconductor and the source electrode, and between the first layer of the semiconductor and the drain electrode.

    摘要翻译： 薄膜晶体管阵列面板包括绝缘基板上的栅极电极，栅电极上的栅极绝缘层，栅极绝缘层上的半导体，氧化物半导体上包括源电极和漏电极的薄膜晶体管，以及 连接到漏电极的像素电极。 半导体包括具有相对低的氟含量的第一层和具有相对高的氟含量的第二层。 半导体的第二层仅在半导体的第一层和源电极之间以及半导体的第一层和漏电极之间。

    THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD OF THE SAME
    5.
    发明申请
    THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD OF THE SAME 有权
    薄膜晶体管显示面板及其制造方法

    公开(公告)号：US20110297930A1

    公开(公告)日：2011-12-08

    申请号：US13151102

    申请日：2011-06-01

    申请人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

    发明人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

    IPC分类号： H01L29/786 ,  H01L21/44

    CPC分类号： H01L21/76804 ,  G02F1/133345 ,  G02F1/136227 ,  G02F1/136286 ,  H01L21/76816 ,  H01L27/1225 ,  H01L27/1244 ,  H01L27/1248 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

    摘要： A TFT display panel having a high charge mobility and making it possible to obtain uniform electric characteristics with respect to a large-area display is provided as well as a manufacturing method thereof. A TFT display panel includes a gate electrode formed on an insulation substrate, a first gate insulting layer formed of SiNx on the gate electrode, a second gate insulting layer formed of SiOx on the first gate insulting layer, an oxide semiconductor layer formed to overlap the gate electrode and having a channel part, and a passivation layer formed of SiOx on the oxide semiconductor layer and the gate electrode, and the passivation layer includes a contact hole exposing the drain electrode. The contact hole has a shape in which the passivation layer of a portion directly exposed together with a metal occupies an area smaller than the upper passivation layer.

    摘要翻译： 提供具有高电荷迁移率并且可以获得相对于大面积显示器的均匀电特性的TFT显示面板及其制造方法。 TFT显示面板包括形成在绝缘基板上的栅极电极，栅极上由SiNx形成的第一栅极绝缘层，在第一栅极绝缘层上由SiOx形成的第二栅极绝缘层，形成为与栅极电极重叠的氧化物半导体层 栅电极，并具有通道部分，以及由氧化物半导体层和栅电极上的SiO x形成的钝化层，并且钝化层包括暴露漏电极的接触孔。 接触孔具有直接与金属一起暴露的部分的钝化层占据比上钝化层小的形状。

    DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE
    6.
    发明申请
    DISPLAY SUBSTRATE, DISPLAY DEVICE, AND METHOD OF MANUFACTURING THE DISPLAY SUBSTRATE 有权
    显示基板，显示装置以及制造显示基板的方法

    公开(公告)号：US20120113346A1

    公开(公告)日：2012-05-10

    申请号：US13277114

    申请日：2011-10-19

    申请人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

    发明人： Seung-Ha CHOI ,  Kyoung-Jae Chung ,  Woo-Geun Lee

    IPC分类号： G02F1/136 ,  H01L33/08

    CPC分类号： H01L21/3086 ,  G02F1/136227 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/7869

    摘要： Provided are a display substrate, a display device, and a method of manufacturing the display substrate. The display substrate includes: a substrate in which a pixel region is defined; a gate electrode and a gate pad are formed on the substrate; a gate insulating layer formed on the gate electrode and the gate pad; a buffer layer pattern overlaps the gate electrode and is formed on the gate insulating layer; an insulating film pattern formed on the buffer layer pattern; an oxide semiconductor pattern formed on the insulating film pattern; a source electrode formed on the oxide semiconductor pattern; and a drain electrode formed on the oxide semiconductor pattern and is separated from the source electrode.

    摘要翻译： 提供了显示基板，显示装置和制造显示基板的方法。 显示基板包括：限定像素区域的基板; 在基板上形成栅电极和栅极焊盘; 形成在栅极电极和栅极焊盘上的栅极绝缘层; 缓冲层图案与栅电极重叠并形成在栅极绝缘层上; 形成在缓冲层图案上的绝缘膜图案; 形成在所述绝缘膜图案上的氧化物半导体图案; 形成在所述氧化物半导体图案上的源电极; 以及形成在氧化物半导体图案上并与源电极分离的漏电极。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US20120037906A1

    公开(公告)日：2012-02-16

    申请号：US13115088

    申请日：2011-05-24

    申请人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

    发明人： Hye-Young RYU ,  Woo-Geun LEE ,  Young-Joo CHOI ,  Kyoung-Jae CHUNG ,  Jin-Won LEE ,  Seung-Ha CHOI ,  Hee-Jun BYEON ,  Pil-Sang YUN

    IPC分类号： H01L29/786 ,  H01L21/44

    CPC分类号： H01L27/1214 ,  H01L27/1225 ,  H01L27/1255

    摘要： A thin film transistor array substrate capable of reducing degradation of a device due to degradation of an oxide semiconductor pattern and a method of fabricating the same are provided. The thin film transistor array substrate may include an insulating substrate on which a gate electrode is formed, a gate insulating film formed on the insulating substrate, an oxide semiconductor pattern disposed on the gate insulating film, an anti-etching pattern formed on the oxide semiconductor pattern, and a source electrode and a drain electrode formed on the anti-etching pattern. The oxide semiconductor pattern may include an edge portion positioned between the source electrode and the drain electrode, and the edge portion may include at least one conductive region and at least one non-conductive region.

    摘要翻译： 提供了能够降低由于氧化物半导体图案的劣化引起的器件劣化的薄膜晶体管阵列基板及其制造方法。 薄膜晶体管阵列基板可以包括其上形成有栅极的绝缘基板，形成在绝缘基板上的栅极绝缘膜，设置在栅极绝缘膜上的氧化物半导体图案，形成在氧化物半导体上的抗蚀刻图案 图案，以及形成在防蚀刻图案上的源电极和漏电极。 氧化物半导体图案可以包括位于源电极和漏电极之间的边缘部分，并且边缘部分可以包括至少一个导电区域和至少一个非导电区域。

    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME
    9.
    发明申请
    THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME 审中-公开
    薄膜晶体管基板及其制造方法

    公开(公告)号：US20100032760A1

    公开(公告)日：2010-02-11

    申请号：US12508972

    申请日：2009-07-24

    申请人： Seung-Ha CHOI ,  Sang-Gab Kim ,  Shin-II Choi ,  Ki-Yeup Lee ,  Dong-Ju Yang ,  Hong-Kee Chin ,  Yu-Gwang Jeong

    发明人： Seung-Ha CHOI ,  Sang-Gab Kim ,  Shin-II Choi ,  Ki-Yeup Lee ,  Dong-Ju Yang ,  Hong-Kee Chin ,  Yu-Gwang Jeong

    IPC分类号： H01L29/786 ,  H01L21/20

    CPC分类号： H01L29/458 ,  H01L27/124 ,  H01L27/1288

    摘要： The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less.

    摘要翻译： 本发明提供了可以简单且成本低廉地制造的薄膜晶体管（TFT）基板，以及制造TFT基板的方法。 TFT基板包括：绝缘基板; 在第一方向上在绝缘基板上延伸的栅极布线; 数据布线，其在第二方向上在栅极布线上延伸，并且包括下层和上层; 以及配置在数据配线下方的半导体图形，并且具有与除了沟道区域以外的数据布线基本相同的形状，其中数据布线的顶面的均方根粗糙度为3nm以下。

    THIN FILM TRANSISTOR PANEL AND MANUFACTURING METHOD OF THE SAME
    10.
    发明申请
    THIN FILM TRANSISTOR PANEL AND MANUFACTURING METHOD OF THE SAME 审中-公开
    薄膜晶体管面板及其制造方法

    公开(公告)号：US20090224257A1

    公开(公告)日：2009-09-10

    申请号：US12390076

    申请日：2009-02-20

    申请人： Hong-Kee CHIN ,  Shin-Il CHOI ,  Sang-Gab KIM ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Dong-Ju YANG

    发明人： Hong-Kee CHIN ,  Shin-Il CHOI ,  Sang-Gab KIM ,  Min-Seok OH ,  Yu-Gwang JEONG ,  Seung-Ha CHOI ,  Dong-Ju YANG

    IPC分类号： H01L33/00

    CPC分类号： H01L29/458 ,  H01L27/124

    摘要： A thin film transistor array panel includes a gate line formed on a substrate and including a gate electrode, a semiconductor layer formed on a surface of the substrate having the gate line, a data line formed on the semiconductor layer, insulatedly intersecting the gate line, and including a source electrode disposed on the gate electrode, a drain electrode separated from the source electrode by a channel, disposed on the gate electrode, and formed from the same layer as the data line, a passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode, and a pixel electrode formed on the passivation layer and contacting the drain electrode through the first contact hole. The data line and the drain electrode may include a first layer and a second layer formed on the first layer, a planar edge of the first layer protrudes from a planar edge of the second layer, and the first layer is formed by dry-etching and the second layer is formed by wet-etching.

    摘要翻译： 薄膜晶体管阵列面板包括形成在基板上并包括栅电极的栅极线，形成在具有栅极线的基板的表面上的半导体层，形成在半导体层上的与栅极线绝缘相交的数据线， 并且包括设置在栅电极上的源电极，通过沟道与源电极分离的漏极，设置在栅电极上，并由与数据线相同的层形成，形成在数据线上的钝化层和 漏极，并且具有暴露漏电极的第一接触孔，以及形成在钝化层上并通过第一接触孔接触漏电极的像素电极。 数据线和漏极可以包括形成在第一层上的第一层和第二层，第一层的平面边缘从第二层的平坦边缘突出，并且第一层通过干蚀刻形成， 第二层通过湿法蚀刻形成。